xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/sm8450-hdk.dts (revision cb7aa33ac6cd46a5434798e50363136e64f3ae98)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Copyright (c) 2022, Linaro Limited
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
9#include <dt-bindings/sound/qcom,q6dsp-lpass-ports.h>
10#include "sm8450.dtsi"
11#include "pm8350.dtsi"
12#include "pm8350b.dtsi"
13#include "pm8350c.dtsi"
14#include "pm8450.dtsi"
15#include "pmk8350.dtsi"
16#include "pmr735a.dtsi"
17#include "pmr735b.dtsi"
18
19/ {
20	model = "Qualcomm Technologies, Inc. SM8450 HDK";
21	compatible = "qcom,sm8450-hdk", "qcom,sm8450";
22
23	aliases {
24		serial0 = &uart7;
25	};
26
27	wcd938x: audio-codec {
28		compatible = "qcom,wcd9380-codec";
29
30		pinctrl-names = "default";
31		pinctrl-0 = <&wcd_default>;
32
33		qcom,micbias1-microvolt = <1800000>;
34		qcom,micbias2-microvolt = <1800000>;
35		qcom,micbias3-microvolt = <1800000>;
36		qcom,micbias4-microvolt = <1800000>;
37		qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
38		qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
39		qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
40		qcom,rx-device = <&wcd_rx>;
41		qcom,tx-device = <&wcd_tx>;
42
43		reset-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>;
44
45		vdd-buck-supply = <&vreg_s10b_1p8>;
46		vdd-rxtx-supply = <&vreg_s10b_1p8>;
47		vdd-io-supply = <&vreg_s10b_1p8>;
48		vdd-mic-bias-supply = <&vreg_bob>;
49
50		#sound-dai-cells = <1>;
51	};
52
53	chosen {
54		stdout-path = "serial0:115200n8";
55	};
56
57	hdmi-out {
58		compatible = "hdmi-connector";
59		type = "a";
60
61		port {
62			hdmi_connector_out: endpoint {
63				remote-endpoint = <&lt9611_out>;
64			};
65		};
66	};
67
68	lt9611_1v2: lt9611-vdd12-regulator {
69		compatible = "regulator-fixed";
70		regulator-name = "LT9611_1V2";
71
72		vin-supply = <&vph_pwr>;
73		regulator-min-microvolt = <1200000>;
74		regulator-max-microvolt = <1200000>;
75		gpio = <&tlmm 9 GPIO_ACTIVE_HIGH>;
76		enable-active-high;
77	};
78
79	lt9611_3v3: lt9611-3v3-regulator {
80		compatible = "regulator-fixed";
81		regulator-name = "LT9611_3V3";
82
83		vin-supply = <&vreg_bob>;
84		gpio = <&tlmm 109 GPIO_ACTIVE_HIGH>;
85		regulator-min-microvolt = <3300000>;
86		regulator-max-microvolt = <3300000>;
87		enable-active-high;
88	};
89
90	vph_pwr: vph-pwr-regulator {
91		compatible = "regulator-fixed";
92		regulator-name = "vph_pwr";
93		regulator-min-microvolt = <3700000>;
94		regulator-max-microvolt = <3700000>;
95
96		regulator-always-on;
97		regulator-boot-on;
98	};
99};
100
101&apps_rsc {
102	regulators-0 {
103		compatible = "qcom,pm8350-rpmh-regulators";
104		qcom,pmic-id = "b";
105
106		vdd-s1-supply = <&vph_pwr>;
107		vdd-s2-supply = <&vph_pwr>;
108		vdd-s3-supply = <&vph_pwr>;
109		vdd-s4-supply = <&vph_pwr>;
110		vdd-s5-supply = <&vph_pwr>;
111		vdd-s6-supply = <&vph_pwr>;
112		vdd-s7-supply = <&vph_pwr>;
113		vdd-s8-supply = <&vph_pwr>;
114		vdd-s9-supply = <&vph_pwr>;
115		vdd-s10-supply = <&vph_pwr>;
116		vdd-s11-supply = <&vph_pwr>;
117		vdd-s12-supply = <&vph_pwr>;
118
119		vdd-l1-l4-supply = <&vreg_s11b_0p95>;
120		vdd-l2-l7-supply = <&vreg_bob>;
121		vdd-l3-l5-supply = <&vreg_bob>;
122		vdd-l6-l9-l10-supply = <&vreg_s12b_1p25>;
123		vdd-l8-supply = <&vreg_s2h_0p95>;
124
125		vreg_s10b_1p8: smps10 {
126			regulator-name = "vreg_s10b_1p8";
127			regulator-min-microvolt = <1800000>;
128			regulator-max-microvolt = <1800000>;
129		};
130
131		vreg_s11b_0p95: smps11 {
132			regulator-name = "vreg_s11b_0p95";
133			regulator-min-microvolt = <966000>;
134			regulator-max-microvolt = <1104000>;
135		};
136
137		vreg_s12b_1p25: smps12 {
138			regulator-name = "vreg_s12b_1p25";
139			regulator-min-microvolt = <1350000>;
140			regulator-max-microvolt = <1400000>;
141		};
142
143		vreg_l1b_0p91: ldo1 {
144			regulator-name = "vreg_l1b_0p91";
145			regulator-min-microvolt = <912000>;
146			regulator-max-microvolt = <920000>;
147			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
148		};
149
150		vreg_l2b_3p07: ldo2 {
151			regulator-name = "vreg_l2b_3p07";
152			regulator-min-microvolt = <3072000>;
153			regulator-max-microvolt = <3072000>;
154			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
155		};
156
157		vreg_l3b_0p9: ldo3 {
158			regulator-name = "vreg_l3b_0p9";
159			regulator-min-microvolt = <904000>;
160			regulator-max-microvolt = <904000>;
161			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
162		};
163
164		vreg_l5b_0p88: ldo5 {
165			regulator-name = "vreg_l5b_0p88";
166			regulator-min-microvolt = <880000>;
167			regulator-max-microvolt = <888000>;
168			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
169		};
170
171		vreg_l6b_1p2: ldo6 {
172			regulator-name = "vreg_l6b_1p2";
173			regulator-min-microvolt = <1200000>;
174			regulator-max-microvolt = <1200000>;
175			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
176		};
177
178		vreg_l7b_2p5: ldo7 {
179			regulator-name = "vreg_l7b_2p5";
180			regulator-min-microvolt = <2504000>;
181			regulator-max-microvolt = <2504000>;
182			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
183		};
184
185		vreg_l9b_1p2: ldo9 {
186			regulator-name = "vreg_l9b_1p2";
187			regulator-min-microvolt = <1200000>;
188			regulator-max-microvolt = <1200000>;
189			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
190		};
191	};
192
193	regulators-1 {
194		compatible = "qcom,pm8350c-rpmh-regulators";
195		qcom,pmic-id = "c";
196
197		vdd-s1-supply = <&vph_pwr>;
198		vdd-s2-supply = <&vph_pwr>;
199		vdd-s3-supply = <&vph_pwr>;
200		vdd-s4-supply = <&vph_pwr>;
201		vdd-s5-supply = <&vph_pwr>;
202		vdd-s6-supply = <&vph_pwr>;
203		vdd-s7-supply = <&vph_pwr>;
204		vdd-s8-supply = <&vph_pwr>;
205		vdd-s9-supply = <&vph_pwr>;
206		vdd-s10-supply = <&vph_pwr>;
207
208		vdd-l1-l12-supply = <&vreg_bob>;
209		vdd-l2-l8-supply = <&vreg_bob>;
210		vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>;
211		vdd-l6-l9-l11-supply = <&vreg_bob>;
212		vdd-l10-supply = <&vreg_s12b_1p25>;
213
214		vdd-bob-supply = <&vph_pwr>;
215
216		vreg_s1c_1p86: smps1 {
217			regulator-name = "vreg_s1c_1p86";
218			regulator-min-microvolt = <1800000>;
219			regulator-max-microvolt = <2024000>;
220		};
221
222		vreg_s10c_1p05: smps10 {
223			regulator-name = "vreg_s10c_1p05";
224			regulator-min-microvolt = <1000000>;
225			regulator-max-microvolt = <1100000>;
226		};
227
228		vreg_bob: bob {
229			regulator-name = "vreg_bob";
230			regulator-min-microvolt = <3008000>;
231			regulator-max-microvolt = <3960000>;
232			regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
233		};
234
235		vreg_l1c_1p8: ldo1 {
236			regulator-name = "vreg_l1c_1p8";
237			regulator-min-microvolt = <1800000>;
238			regulator-max-microvolt = <1800000>;
239			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
240		};
241
242		vreg_l3c_3p0: ldo3 {
243			regulator-name = "vreg_l3c_3p0";
244			regulator-min-microvolt = <3296000>;
245			regulator-max-microvolt = <3304000>;
246			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
247		};
248
249		vreg_l4c_1p8: ldo4 {
250			regulator-name = "vreg_l4c_1p8";
251			regulator-min-microvolt = <1704000>;
252			regulator-max-microvolt = <3000000>;
253			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
254		};
255
256		vreg_l5c_1p8: ldo5 {
257			regulator-name = "vreg_l5c_1p8";
258			regulator-min-microvolt = <1704000>;
259			regulator-max-microvolt = <3000000>;
260			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
261		};
262
263		vreg_l6c_1p8: ldo6 {
264			regulator-name = "vreg_l6c_1p8";
265			regulator-min-microvolt = <1800000>;
266			regulator-max-microvolt = <3008000>;
267			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268		};
269
270		vreg_l7c_3p0: ldo7 {
271			regulator-name = "vreg_l7c_3p0";
272			regulator-min-microvolt = <3008000>;
273			regulator-max-microvolt = <3008000>;
274			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
275		};
276
277		vreg_l8c_1p8: ldo8 {
278			regulator-name = "vreg_l8c_1p8";
279			regulator-min-microvolt = <1800000>;
280			regulator-max-microvolt = <1800000>;
281			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
282		};
283
284		vreg_l9c_2p96: ldo9 {
285			regulator-name = "vreg_l9c_2p96";
286			regulator-min-microvolt = <2960000>;
287			regulator-max-microvolt = <3008000>;
288			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
289		};
290
291		vreg_l12c_1p8: ldo12 {
292			regulator-name = "vreg_l12c_1p8";
293			regulator-min-microvolt = <1800000>;
294			regulator-max-microvolt = <1968000>;
295			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
296		};
297
298		vreg_l13c_3p0: ldo13 {
299			regulator-name = "vreg_l13c_3p0";
300			regulator-min-microvolt = <3000000>;
301			regulator-max-microvolt = <3000000>;
302			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
303		};
304	};
305
306	regulators-2 {
307		compatible = "qcom,pm8450-rpmh-regulators";
308		qcom,pmic-id = "h";
309
310		vdd-s1-supply = <&vph_pwr>;
311		vdd-s2-supply = <&vph_pwr>;
312		vdd-s3-supply = <&vph_pwr>;
313		vdd-s4-supply = <&vph_pwr>;
314		vdd-s5-supply = <&vph_pwr>;
315		vdd-s6-supply = <&vph_pwr>;
316
317		vdd-l2-supply = <&vreg_bob>;
318		vdd-l3-supply = <&vreg_bob>;
319		vdd-l4-supply = <&vreg_bob>;
320
321		vreg_s2h_0p95: smps2 {
322			regulator-name = "vreg_s2h_0p95";
323			regulator-min-microvolt = <848000>;
324			regulator-max-microvolt = <1104000>;
325		};
326
327		vreg_s3h_0p5: smps3 {
328			regulator-name = "vreg_s3h_0p5";
329			regulator-min-microvolt = <500000>;
330			regulator-max-microvolt = <500000>;
331		};
332
333		vreg_l2h_0p91: ldo2 {
334			regulator-name = "vreg_l2h_0p91";
335			regulator-min-microvolt = <880000>;
336			regulator-max-microvolt = <912000>;
337			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
338		};
339
340		vreg_l3h_0p91: ldo3 {
341			regulator-name = "vreg_l3h_0p91";
342			regulator-min-microvolt = <912000>;
343			regulator-max-microvolt = <912000>;
344			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
345		};
346
347	};
348
349	regulators-3 {
350		compatible = "qcom,pmr735a-rpmh-regulators";
351		qcom,pmic-id = "e";
352
353		vdd-s1-supply = <&vph_pwr>;
354		vdd-s2-supply = <&vph_pwr>;
355		vdd-s3-supply = <&vph_pwr>;
356
357		vdd-l1-l2-supply = <&vreg_s2e_0p85>;
358		vdd-l3-supply = <&vreg_s1e_1p25>;
359		vdd-l4-supply = <&vreg_s1c_1p86>;
360		vdd-l5-l6-supply = <&vreg_s1c_1p86>;
361		vdd-l7-bob-supply = <&vreg_bob>;
362
363		vreg_s1e_1p25: smps1 {
364			regulator-name = "vreg_s1e_1p25";
365			regulator-min-microvolt = <1200000>;
366			regulator-max-microvolt = <1296000>;
367		};
368
369		vreg_s2e_0p85: smps2 {
370			regulator-name = "vreg_s2e_0p85";
371			regulator-min-microvolt = <500000>;
372			regulator-max-microvolt = <1040000>;
373		};
374
375		vreg_l1e_0p8: ldo1 {
376			regulator-name = "vreg_l1e_0p8";
377			regulator-min-microvolt = <800000>;
378			regulator-max-microvolt = <800000>;
379		};
380
381		vreg_l2e_0p8: ldo2 {
382			regulator-name = "vreg_l2e_0p8";
383			regulator-min-microvolt = <800000>;
384			regulator-max-microvolt = <800000>;
385		};
386
387		vreg_l3e_1p2: ldo3 {
388			regulator-name = "vreg_l3e_1p2";
389			regulator-min-microvolt = <1200000>;
390			regulator-max-microvolt = <1200000>;
391		};
392
393		vreg_l4e_1p7: ldo4 {
394			regulator-name = "vreg_l4e_1p7";
395			regulator-min-microvolt = <1776000>;
396			regulator-max-microvolt = <1776000>;
397		};
398
399		vreg_l5e_0p88: ldo5 {
400			regulator-name = "vreg_l5e_0p88";
401			regulator-min-microvolt = <880000>;
402			regulator-max-microvolt = <880000>;
403		};
404
405		vreg_l6e_1p2: ldo6 {
406			regulator-name = "vreg_l6e_1p2";
407			regulator-min-microvolt = <1200000>;
408			regulator-max-microvolt = <1200000>;
409		};
410
411		vreg_l7e_2p8: ldo7 {
412			regulator-name = "vreg_l7e_2p8";
413			regulator-min-microvolt = <2800000>;
414			regulator-max-microvolt = <2800000>;
415		};
416	};
417};
418
419&dispcc {
420	status = "okay";
421};
422
423&i2c9 {
424	clock-frequency = <400000>;
425	status = "okay";
426
427	lt9611_codec: hdmi-bridge@2b {
428		compatible = "lontium,lt9611uxc";
429		reg = <0x2b>;
430
431		interrupts-extended = <&tlmm 44 IRQ_TYPE_EDGE_FALLING>;
432
433		reset-gpios = <&tlmm 107 GPIO_ACTIVE_HIGH>;
434
435		vdd-supply = <&lt9611_1v2>;
436		vcc-supply = <&lt9611_3v3>;
437
438		pinctrl-names = "default";
439		pinctrl-0 = <&lt9611_irq_pin &lt9611_rst_pin>;
440
441		ports {
442			#address-cells = <1>;
443			#size-cells = <0>;
444
445			port@0 {
446				reg = <0>;
447
448				lt9611_a: endpoint {
449					remote-endpoint = <&mdss_dsi0_out>;
450				};
451			};
452
453			port@2 {
454				reg = <2>;
455
456				lt9611_out: endpoint {
457					remote-endpoint = <&hdmi_connector_out>;
458				};
459			};
460		};
461	};
462};
463
464&mdss {
465	status = "okay";
466};
467
468&mdss_dsi0 {
469	vdda-supply = <&vreg_l6b_1p2>;
470	status = "okay";
471};
472
473&mdss_dsi0_out {
474	remote-endpoint = <&lt9611_a>;
475	data-lanes = <0 1 2 3>;
476};
477
478&mdss_dsi0_phy {
479	vdds-supply = <&vreg_l5b_0p88>;
480	status = "okay";
481};
482
483&mdss_mdp {
484	status = "okay";
485};
486
487&pcie0 {
488	status = "okay";
489	max-link-speed = <2>;
490};
491
492&pcie0_phy {
493	status = "okay";
494	vdda-phy-supply = <&vreg_l5b_0p88>;
495	vdda-pll-supply = <&vreg_l6b_1p2>;
496};
497
498&pcie1 {
499	status = "okay";
500};
501
502&pcie1_phy {
503	status = "okay";
504	vdda-phy-supply = <&vreg_l2h_0p91>;
505	vdda-pll-supply = <&vreg_l6b_1p2>;
506};
507
508&remoteproc_adsp {
509	status = "okay";
510	firmware-name = "qcom/sm8450/adsp.mbn";
511};
512
513&remoteproc_cdsp {
514	status = "okay";
515	firmware-name = "qcom/sm8450/cdsp.mbn";
516};
517
518&remoteproc_mpss {
519	status = "okay";
520	firmware-name = "qcom/sm8450/modem.mbn";
521};
522
523&remoteproc_slpi {
524	status = "okay";
525	firmware-name = "qcom/sm8450/slpi.mbn";
526};
527
528&qupv3_id_0 {
529	status = "okay";
530};
531
532&qupv3_id_1 {
533	status = "okay";
534};
535
536&sdhc_2 {
537	cd-gpios = <&tlmm 92 GPIO_ACTIVE_HIGH>;
538	pinctrl-names = "default", "sleep";
539	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
540	pinctrl-1 = <&sdc2_sleep_state &sdc2_card_det_n>;
541	vmmc-supply = <&vreg_l9c_2p96>;
542	vqmmc-supply = <&vreg_l6c_1p8>;
543	no-sdio;
544	no-mmc;
545	status = "okay";
546};
547
548&sound {
549	compatible = "qcom,sm8450-sndcard";
550	model = "SM8450-HDK";
551	audio-routing = "SpkrLeft IN", "WSA_SPK1 OUT",
552			"SpkrRight IN", "WSA_SPK2 OUT",
553			"IN1_HPHL", "HPHL_OUT",
554			"IN2_HPHR", "HPHR_OUT",
555			"AMIC2", "MIC BIAS2",
556			"VA DMIC0", "MIC BIAS1",
557			"VA DMIC1", "MIC BIAS1",
558			"VA DMIC2", "MIC BIAS3",
559			"TX DMIC0", "MIC BIAS1",
560			"TX DMIC1", "MIC BIAS2",
561			"TX DMIC2", "MIC BIAS3",
562			"TX SWR_ADC1", "ADC2_OUTPUT";
563
564	wcd-playback-dai-link {
565		link-name = "WCD Playback";
566
567		cpu {
568			sound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;
569		};
570
571		codec {
572			sound-dai = <&wcd938x 0>, <&swr1 0>, <&rxmacro 0>;
573		};
574
575		platform {
576			sound-dai = <&q6apm>;
577		};
578	};
579
580	wcd-capture-dai-link {
581		link-name = "WCD Capture";
582
583		cpu {
584			sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
585		};
586
587		codec {
588			sound-dai = <&wcd938x 1>, <&swr2 0>, <&txmacro 0>;
589		};
590
591		platform {
592			sound-dai = <&q6apm>;
593		};
594	};
595
596	wsa-dai-link {
597		link-name = "WSA Playback";
598
599		cpu {
600			sound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;
601		};
602
603		codec {
604			sound-dai = <&left_spkr>, <&right_spkr>, <&swr0 0>, <&wsamacro 0>;
605		};
606
607		platform {
608			sound-dai = <&q6apm>;
609		};
610	};
611
612	va-dai-link {
613		link-name = "VA Capture";
614
615		cpu {
616			sound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;
617		};
618
619		codec {
620			sound-dai = <&vamacro 0>;
621		};
622
623		platform {
624			sound-dai = <&q6apm>;
625		};
626	};
627};
628
629&swr0 {
630	status = "okay";
631
632	left_spkr: speaker@0,1 {
633		compatible = "sdw10217020200";
634		reg = <0 1>;
635		pinctrl-names = "default";
636		pinctrl-0 = <&spkr_1_sd_n_active>;
637		powerdown-gpios = <&tlmm 1 GPIO_ACTIVE_LOW>;
638		#sound-dai-cells = <0>;
639		sound-name-prefix = "SpkrLeft";
640		#thermal-sensor-cells = <0>;
641		vdd-supply = <&vreg_s10b_1p8>;
642	};
643
644	right_spkr: speaker@0,2 {
645		compatible = "sdw10217020200";
646		reg = <0 2>;
647		pinctrl-names = "default";
648		pinctrl-0 = <&spkr_2_sd_n_active>;
649		powerdown-gpios = <&tlmm 89 GPIO_ACTIVE_LOW>;
650		#sound-dai-cells = <0>;
651		sound-name-prefix = "SpkrRight";
652		#thermal-sensor-cells = <0>;
653		vdd-supply = <&vreg_s10b_1p8>;
654	};
655};
656
657&swr1 {
658	status = "okay";
659
660	wcd_rx: codec@0,4 {
661		compatible = "sdw20217010d00";
662		reg = <0 4>;
663		qcom,rx-port-mapping = <1 2 3 4 5>;
664	};
665};
666
667&swr2 {
668	status = "okay";
669
670	wcd_tx: codec@0,3 {
671		compatible = "sdw20217010d00";
672		reg = <0 3>;
673		qcom,tx-port-mapping = <1 1 2 3>;
674	};
675};
676
677&tlmm {
678	gpio-reserved-ranges = <28 4>, <36 4>;
679
680	lt9611_irq_pin: lt9611-irq-state {
681		pins = "gpio44";
682		function = "gpio";
683		bias-disable;
684	};
685
686	lt9611_rst_pin: lt9611-rst-state {
687		pins = "gpio107";
688		function = "gpio";
689		output-high;
690	};
691
692	sdc2_card_det_n: sd-card-det-n-state {
693		pins = "gpio92";
694		function = "gpio";
695		drive-strength = <2>;
696		bias-pull-up;
697	};
698};
699
700&uart7 {
701	status = "okay";
702};
703
704&ufs_mem_hc {
705	status = "okay";
706
707	reset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;
708
709	vcc-supply = <&vreg_l7b_2p5>;
710	vcc-max-microamp = <1100000>;
711	vccq-supply = <&vreg_l9b_1p2>;
712	vccq-max-microamp = <1200000>;
713};
714
715&ufs_mem_phy {
716	status = "okay";
717
718	vdda-phy-supply = <&vreg_l5b_0p88>;
719	vdda-pll-supply = <&vreg_l6b_1p2>;
720};
721
722&usb_1 {
723	status = "okay";
724};
725
726&usb_1_dwc3 {
727	dr_mode = "peripheral";
728};
729
730&usb_1_hsphy {
731	status = "okay";
732
733	vdda-pll-supply = <&vreg_l5b_0p88>;
734	vdda18-supply = <&vreg_l1c_1p8>;
735	vdda33-supply = <&vreg_l2b_3p07>;
736};
737
738&usb_1_qmpphy {
739	status = "okay";
740
741	vdda-phy-supply = <&vreg_l6b_1p2>;
742	vdda-pll-supply = <&vreg_l1b_0p91>;
743};
744
745&vamacro {
746	pinctrl-0 = <&dmic01_default>, <&dmic02_default>;
747	pinctrl-names = "default";
748	vdd-micb-supply = <&vreg_s10b_1p8>;
749	qcom,dmic-sample-rate = <600000>;
750
751	status = "okay";
752};
753
754&tlmm {
755	spkr_1_sd_n_active: spkr-1-sd-n-active-state {
756		pins = "gpio1";
757		function = "gpio";
758		drive-strength = <4>;
759		bias-disable;
760		output-low;
761	};
762
763	spkr_2_sd_n_active: spkr-2-sd-n-active-state {
764		pins = "gpio89";
765		function = "gpio";
766		drive-strength = <4>;
767		bias-disable;
768		output-low;
769	};
770
771	wcd_default: wcd-default-state {
772		pins = "gpio43";
773		function = "gpio";
774		bias-disable;
775	};
776};
777