1// SPDX-License-Identifier: BSD-3-Clause 2/* 3 * Copyright (c) 2020-2021, Linaro Limited 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 9#include "sm8350.dtsi" 10 11/ { 12 model = "Qualcomm Technologies, Inc. SM8350 HDK"; 13 compatible = "qcom,sm8350-hdk", "qcom,sm8350"; 14 15 aliases { 16 serial0 = &uart2; 17 }; 18 19 chosen { 20 stdout-path = "serial0:115200n8"; 21 }; 22 23 hdmi-connector { 24 compatible = "hdmi-connector"; 25 type = "a"; 26 27 port { 28 hdmi_con: endpoint { 29 remote-endpoint = <<9611_out>; 30 }; 31 }; 32 }; 33 34 vph_pwr: vph-pwr-regulator { 35 compatible = "regulator-fixed"; 36 regulator-name = "vph_pwr"; 37 regulator-min-microvolt = <3700000>; 38 regulator-max-microvolt = <3700000>; 39 40 regulator-always-on; 41 regulator-boot-on; 42 }; 43 44 lt9611_1v2: lt9611-1v2-regulator { 45 compatible = "regulator-fixed"; 46 regulator-name = "LT9611_1V2"; 47 48 vin-supply = <&vph_pwr>; 49 regulator-min-microvolt = <1200000>; 50 regulator-max-microvolt = <1200000>; 51 gpio = <&tlmm 49 GPIO_ACTIVE_HIGH>; 52 enable-active-high; 53 regulator-boot-on; 54 }; 55 56 lt9611_3v3: lt9611-3v3-regulator { 57 compatible = "regulator-fixed"; 58 regulator-name = "LT9611_3V3"; 59 60 vin-supply = <&vreg_bob>; 61 gpio = <&tlmm 47 GPIO_ACTIVE_HIGH>; 62 regulator-min-microvolt = <3300000>; 63 regulator-max-microvolt = <3300000>; 64 enable-active-high; 65 regulator-boot-on; 66 regulator-always-on; 67 }; 68}; 69 70&adsp { 71 status = "okay"; 72 firmware-name = "qcom/sm8350/adsp.mbn"; 73}; 74 75&apps_rsc { 76 regulators-0 { 77 compatible = "qcom,pm8350-rpmh-regulators"; 78 qcom,pmic-id = "b"; 79 80 vdd-s1-supply = <&vph_pwr>; 81 vdd-s2-supply = <&vph_pwr>; 82 vdd-s3-supply = <&vph_pwr>; 83 vdd-s4-supply = <&vph_pwr>; 84 vdd-s5-supply = <&vph_pwr>; 85 vdd-s6-supply = <&vph_pwr>; 86 vdd-s7-supply = <&vph_pwr>; 87 vdd-s8-supply = <&vph_pwr>; 88 vdd-s9-supply = <&vph_pwr>; 89 vdd-s10-supply = <&vph_pwr>; 90 vdd-s11-supply = <&vph_pwr>; 91 vdd-s12-supply = <&vph_pwr>; 92 93 vdd-l1-l4-supply = <&vreg_s11b_0p95>; 94 vdd-l2-l7-supply = <&vreg_bob>; 95 vdd-l3-l5-supply = <&vreg_bob>; 96 vdd-l6-l9-l10-supply = <&vreg_s11b_0p95>; 97 98 vreg_s10b_1p8: smps10 { 99 regulator-name = "vreg_s10b_1p8"; 100 regulator-min-microvolt = <1800000>; 101 regulator-max-microvolt = <1800000>; 102 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 103 }; 104 105 vreg_s11b_0p95: smps11 { 106 regulator-name = "vreg_s11b_0p95"; 107 regulator-min-microvolt = <952000>; 108 regulator-max-microvolt = <952000>; 109 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 110 }; 111 112 vreg_s12b_1p25: smps12 { 113 regulator-name = "vreg_s12b_1p25"; 114 regulator-min-microvolt = <1256000>; 115 regulator-max-microvolt = <1256000>; 116 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 117 }; 118 119 vreg_l1b_0p88: ldo1 { 120 regulator-name = "vreg_l1b_0p88"; 121 regulator-min-microvolt = <912000>; 122 regulator-max-microvolt = <920000>; 123 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 124 }; 125 126 vreg_l2b_3p07: ldo2 { 127 regulator-name = "vreg_l2b_3p07"; 128 regulator-min-microvolt = <3072000>; 129 regulator-max-microvolt = <3072000>; 130 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 131 }; 132 133 vreg_l3b_0p9: ldo3 { 134 regulator-name = "vreg_l3b_0p9"; 135 regulator-min-microvolt = <904000>; 136 regulator-max-microvolt = <904000>; 137 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 138 }; 139 140 vreg_l5b_0p88: ldo5 { 141 regulator-name = "vreg_l5b_0p88"; 142 regulator-min-microvolt = <880000>; 143 regulator-max-microvolt = <888000>; 144 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 145 regulator-allow-set-load; 146 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 147 RPMH_REGULATOR_MODE_HPM>; 148 }; 149 150 vreg_l6b_1p2: ldo6 { 151 regulator-name = "vreg_l6b_1p2"; 152 regulator-min-microvolt = <1200000>; 153 regulator-max-microvolt = <1208000>; 154 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 155 regulator-allow-set-load; 156 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 157 RPMH_REGULATOR_MODE_HPM>; 158 }; 159 160 vreg_l7b_2p96: ldo7 { 161 regulator-name = "vreg_l7b_2p96"; 162 regulator-min-microvolt = <2504000>; 163 regulator-max-microvolt = <2504000>; 164 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 165 regulator-allow-set-load; 166 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 167 RPMH_REGULATOR_MODE_HPM>; 168 }; 169 170 vreg_l9b_1p2: ldo9 { 171 regulator-name = "vreg_l9b_1p2"; 172 regulator-min-microvolt = <1200000>; 173 regulator-max-microvolt = <1200000>; 174 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 175 regulator-allow-set-load; 176 regulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM 177 RPMH_REGULATOR_MODE_HPM>; 178 }; 179 }; 180 181 regulators-1 { 182 compatible = "qcom,pm8350c-rpmh-regulators"; 183 qcom,pmic-id = "c"; 184 185 vdd-s1-supply = <&vph_pwr>; 186 vdd-s2-supply = <&vph_pwr>; 187 vdd-s3-supply = <&vph_pwr>; 188 vdd-s4-supply = <&vph_pwr>; 189 vdd-s5-supply = <&vph_pwr>; 190 vdd-s6-supply = <&vph_pwr>; 191 vdd-s7-supply = <&vph_pwr>; 192 vdd-s8-supply = <&vph_pwr>; 193 vdd-s9-supply = <&vph_pwr>; 194 vdd-s10-supply = <&vph_pwr>; 195 196 vdd-l1-l12-supply = <&vreg_s1c_1p86>; 197 vdd-l2-l8-supply = <&vreg_s1c_1p86>; 198 vdd-l3-l4-l5-l7-l13-supply = <&vreg_bob>; 199 vdd-l6-l9-l11-supply = <&vreg_bob>; 200 vdd-l10-supply = <&vreg_s12b_1p25>; 201 202 vdd-bob-supply = <&vph_pwr>; 203 204 vreg_s1c_1p86: smps1 { 205 regulator-name = "vreg_s1c_1p86"; 206 regulator-min-microvolt = <1856000>; 207 regulator-max-microvolt = <1880000>; 208 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 209 }; 210 211 vreg_bob: bob { 212 regulator-name = "vreg_bob"; 213 regulator-min-microvolt = <3008000>; 214 regulator-max-microvolt = <3960000>; 215 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 216 }; 217 218 vreg_l1c_1p8: ldo1 { 219 regulator-name = "vreg_l1c_1p8"; 220 regulator-min-microvolt = <1800000>; 221 regulator-max-microvolt = <1800000>; 222 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 223 }; 224 225 vreg_l2c_1p8: ldo2 { 226 regulator-name = "vreg_l2c_1p8"; 227 regulator-min-microvolt = <1800000>; 228 regulator-max-microvolt = <1800000>; 229 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 230 }; 231 232 vreg_l6c_1p8: ldo6 { 233 regulator-name = "vreg_l6c_1p8"; 234 regulator-min-microvolt = <1800000>; 235 regulator-max-microvolt = <2960000>; 236 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 237 }; 238 239 vreg_l9c_2p96: ldo9 { 240 regulator-name = "vreg_l9c_2p96"; 241 regulator-min-microvolt = <2960000>; 242 regulator-max-microvolt = <3008000>; 243 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 244 }; 245 246 vreg_l10c_1p2: ldo10 { 247 regulator-name = "vreg_l10c_1p2"; 248 regulator-min-microvolt = <1200000>; 249 regulator-max-microvolt = <1200000>; 250 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 251 }; 252 }; 253}; 254 255&cdsp { 256 status = "okay"; 257 firmware-name = "qcom/sm8350/cdsp.mbn"; 258}; 259 260&dispcc { 261 status = "okay"; 262}; 263 264&mdss_dsi0 { 265 vdda-supply = <&vreg_l6b_1p2>; 266 status = "okay"; 267 268 ports { 269 port@1 { 270 endpoint { 271 remote-endpoint = <<9611_a>; 272 data-lanes = <0 1 2 3>; 273 }; 274 }; 275 }; 276}; 277 278&mdss_dsi0_phy { 279 vdds-supply = <&vreg_l5b_0p88>; 280 status = "okay"; 281}; 282 283&gpi_dma1 { 284 status = "okay"; 285}; 286 287&gpu { 288 status = "okay"; 289 290 zap-shader { 291 firmware-name = "qcom/sm8350/a660_zap.mbn"; 292 }; 293}; 294 295&i2c15 { 296 clock-frequency = <400000>; 297 status = "okay"; 298 299 lt9611_codec: hdmi-bridge@2b { 300 compatible = "lontium,lt9611uxc"; 301 reg = <0x2b>; 302 303 interrupts-extended = <&tlmm 50 IRQ_TYPE_EDGE_FALLING>; 304 reset-gpios = <&tlmm 48 GPIO_ACTIVE_HIGH>; 305 306 vdd-supply = <<9611_1v2>; 307 vcc-supply = <<9611_3v3>; 308 309 pinctrl-names = "default"; 310 pinctrl-0 = <<9611_state>; 311 312 ports { 313 #address-cells = <1>; 314 #size-cells = <0>; 315 316 port@0 { 317 reg = <0>; 318 319 lt9611_a: endpoint { 320 remote-endpoint = <&mdss_dsi0_out>; 321 }; 322 }; 323 324 port@2 { 325 reg = <2>; 326 327 lt9611_out: endpoint { 328 remote-endpoint = <&hdmi_con>; 329 }; 330 }; 331 }; 332 }; 333}; 334 335&mdss { 336 status = "okay"; 337}; 338 339&mdss_mdp { 340 status = "okay"; 341}; 342 343&mpss { 344 status = "okay"; 345 firmware-name = "qcom/sm8350/modem.mbn"; 346}; 347 348&pcie0 { 349 pinctrl-names = "default"; 350 pinctrl-0 = <&pcie0_default_state>; 351 352 perst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>; 353 wake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>; 354 355 status = "okay"; 356}; 357 358&pcie0_phy { 359 vdda-phy-supply = <&vreg_l5b_0p88>; 360 vdda-pll-supply = <&vreg_l6b_1p2>; 361 362 status = "okay"; 363}; 364 365&pcie1 { 366 perst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>; 367 wake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>; 368 369 pinctrl-names = "default"; 370 pinctrl-0 = <&pcie1_default_state>; 371 372 status = "okay"; 373}; 374 375&pcie1_phy { 376 status = "okay"; 377 vdda-phy-supply = <&vreg_l5b_0p88>; 378 vdda-pll-supply = <&vreg_l6b_1p2>; 379}; 380 381&qupv3_id_0 { 382 status = "okay"; 383}; 384 385&qupv3_id_2 { 386 status = "okay"; 387}; 388 389&slpi { 390 status = "okay"; 391 firmware-name = "qcom/sm8350/slpi.mbn"; 392}; 393 394&tlmm { 395 gpio-reserved-ranges = <52 8>; 396 397 gpio-line-names = 398 "APPS_I2C_SDA", /* GPIO_0 */ 399 "APPS_I2C_SCL", 400 "FSA_INT_N", 401 "USER_LED3_EN", 402 "SMBUS_SDA_1P8", 403 "SMBUS_SCL_1P8", 404 "2M2_3P3_EN", 405 "ALERT_DUAL_M2_N", 406 "EXP_UART_CTS", 407 "EXP_UART_RFR", 408 "EXP_UART_TX", /* GPIO_10 */ 409 "EXP_UART_RX", 410 "NC", 411 "NC", 412 "RCM_MARKER1", 413 "WSA0_EN", 414 "CAM1_RESET_N", 415 "CAM0_RESET_N", 416 "DEBUG_UART_TX", 417 "DEBUG_UART_RX", 418 "TS_I2C_SDA", /* GPIO_20 */ 419 "TS_I2C_SCL", 420 "TS_RESET_N", 421 "TS_INT_N", 422 "DISP0_RESET_N", 423 "DISP1_RESET_N", 424 "ETH_RESET", 425 "RCM_MARKER2", 426 "CAM_DC_MIPI_MUX_EN", 427 "CAM_DC_MIPI_MUX_SEL", 428 "AFC_PHY_TA_D_PLUS", /* GPIO_30 */ 429 "AFC_PHY_TA_D_MINUS", 430 "PM8008_1_IRQ", 431 "PM8008_1_RESET_N", 432 "PM8008_2_IRQ", 433 "PM8008_2_RESET_N", 434 "CAM_DC_I3C_SDA", 435 "CAM_DC_I3C_SCL", 436 "FP_INT_N", 437 "FP_WUHB_INT_N", 438 "SMB_SPMI_DATA", /* GPIO_40 */ 439 "SMB_SPMI_CLK", 440 "USB_HUB_RESET", 441 "FORCE_USB_BOOT", 442 "LRF_IRQ", 443 "NC", 444 "IMU2_INT", 445 "HDMI_3P3_EN", 446 "HDMI_RSTN", 447 "HDMI_1P2_EN", 448 "HDMI_INT", /* GPIO_50 */ 449 "USB1_ID", 450 "FP_SPI_MISO", 451 "FP_SPI_MOSI", 452 "FP_SPI_CLK", 453 "FP_SPI_CS_N", 454 "NFC_ESE_SPI_MISO", 455 "NFC_ESE_SPI_MOSI", 456 "NFC_ESE_SPI_CLK", 457 "NFC_ESE_SPI_CS", 458 "NFC_I2C_SDA", /* GPIO_60 */ 459 "NFC_I2C_SCLC", 460 "NFC_EN", 461 "NFC_CLK_REQ", 462 "HST_WLAN_EN", 463 "HST_BT_EN", 464 "HST_SW_CTRL", 465 "NC", 466 "HST_BT_UART_CTS", 467 "HST_BT_UART_RFR", 468 "HST_BT_UART_TX", /* GPIO_70 */ 469 "HST_BT_UART_RX", 470 "CAM_DC_SPI0_MISO", 471 "CAM_DC_SPI0_MOSI", 472 "CAM_DC_SPI0_CLK", 473 "CAM_DC_SPI0_CS_N", 474 "CAM_DC_SPI1_MISO", 475 "CAM_DC_SPI1_MOSI", 476 "CAM_DC_SPI1_CLK", 477 "CAM_DC_SPI1_CS_N", 478 "HALL_INT_N", /* GPIO_80 */ 479 "USB_PHY_PS", 480 "MDP_VSYNC_P", 481 "MDP_VSYNC_S", 482 "ETH_3P3_EN", 483 "RADAR_INT", 484 "NFC_DWL_REQ", 485 "SM_GPIO_87", 486 "WCD_RESET_N", 487 "ALSP_INT_N", 488 "PRESS_INT", /* GPIO_90 */ 489 "SAR_INT_N", 490 "SD_CARD_DET_N", 491 "NC", 492 "PCIE0_RESET_N", 493 "PCIE0_CLK_REQ_N", 494 "PCIE0_WAKE_N", 495 "PCIE1_RESET_N", 496 "PCIE1_CLK_REQ_N", 497 "PCIE1_WAKE_N", 498 "CAM_MCLK0", /* GPIO_100 */ 499 "CAM_MCLK1", 500 "CAM_MCLK2", 501 "CAM_MCLK3", 502 "CAM_MCLK4", 503 "CAM_MCLK5", 504 "CAM2_RESET_N", 505 "CCI_I2C0_SDA", 506 "CCI_I2C0_SCL", 507 "CCI_I2C1_SDA", 508 "CCI_I2C1_SCL", /* GPIO_110 */ 509 "CCI_I2C2_SDA", 510 "CCI_I2C2_SCL", 511 "CCI_I2C3_SDA", 512 "CCI_I2C3_SCL", 513 "CAM5_RESET_N", 514 "CAM4_RESET_N", 515 "CAM3_RESET_N", 516 "IMU1_INT", 517 "MAG_INT_N", 518 "MI2S2_I2S_SCK", /* GPIO_120 */ 519 "MI2S2_I2S_DAT0", 520 "MI2S2_I2S_WS", 521 "HIFI_DAC_I2S_MCLK", 522 "MI2S2_I2S_DAT1", 523 "HIFI_DAC_I2S_SCK", 524 "HIFI_DAC_I2S_DAT0", 525 "NC", 526 "HIFI_DAC_I2S_WS", 527 "HST_BT_WLAN_SLIMBUS_CLK", 528 "HST_BT_WLAN_SLIMBUS_DAT0", /* GPIO_130 */ 529 "BT_LED_EN", 530 "WLAN_LED_EN", 531 "NC", 532 "NC", 533 "NC", 534 "UIM2_PRESENT", 535 "NC", 536 "NC", 537 "NC", 538 "UIM1_PRESENT", /* GPIO_140 */ 539 "NC", 540 "SM_RFFE0_DATA", 541 "NC", 542 "SM_RFFE1_DATA", 543 "SM_MSS_GRFC4", 544 "SM_MSS_GRFC5", 545 "SM_MSS_GRFC6", 546 "SM_MSS_GRFC7", 547 "SM_RFFE4_CLK", 548 "SM_RFFE4_DATA", /* GPIO_150 */ 549 "WLAN_COEX_UART1_RX", 550 "WLAN_COEX_UART1_TX", 551 "HST_SW_CTRL", 552 "DSI0_STATUS", 553 "DSI1_STATUS", 554 "APPS_PBL_BOOT_SPEED_1", 555 "APPS_BOOT_FROM_ROM", 556 "APPS_PBL_BOOT_SPEED_0", 557 "QLINK0_REQ", 558 "QLINK0_EN", /* GPIO_160 */ 559 "QLINK0_WMSS_RESET_N", 560 "NC", 561 "NC", 562 "NC", 563 "NC", 564 "NC", 565 "NC", 566 "WCD_SWR_TX_CLK", 567 "WCD_SWR_TX_DATA0", 568 "WCD_SWR_TX_DATA1", /* GPIO_170 */ 569 "WCD_SWR_RX_CLK", 570 "WCD_SWR_RX_DATA0", 571 "WCD_SWR_RX_DATA1", 572 "DMIC01_CLK", 573 "DMIC01_DATA", 574 "DMIC23_CLK", 575 "DMIC23_DATA", 576 "WSA_SWR_CLK", 577 "WSA_SWR_DATA", 578 "DMIC45_CLK", /* GPIO_180 */ 579 "DMIC45_DATA", 580 "WCD_SWR_TX_DATA2", 581 "SENSOR_I3C_SDA", 582 "SENSOR_I3C_SCL", 583 "CAM_OIS0_I3C_SDA", 584 "CAM_OIS0_I3C_SCL", 585 "IMU_SPI_MISO", 586 "IMU_SPI_MOSI", 587 "IMU_SPI_CLK", 588 "IMU_SPI_CS_N", /* GPIO_190 */ 589 "MAG_I2C_SDA", 590 "MAG_I2C_SCL", 591 "SENSOR_I2C_SDA", 592 "SENSOR_I2C_SCL", 593 "RADAR_SPI_MISO", 594 "RADAR_SPI_MOSI", 595 "RADAR_SPI_CLK", 596 "RADAR_SPI_CS_N", 597 "HST_BLE_UART_TX", 598 "HST_BLE_UART_RX", /* GPIO_200 */ 599 "HST_WLAN_UART_TX", 600 "HST_WLAN_UART_RX"; 601 602 pcie0_default_state: pcie0-default-state { 603 perst-pins { 604 pins = "gpio94"; 605 function = "gpio"; 606 drive-strength = <2>; 607 bias-pull-down; 608 }; 609 610 clkreq-pins { 611 pins = "gpio95"; 612 function = "pcie0_clkreqn"; 613 drive-strength = <2>; 614 bias-pull-up; 615 }; 616 617 wake-pins { 618 pins = "gpio96"; 619 function = "gpio"; 620 drive-strength = <2>; 621 bias-pull-up; 622 }; 623 }; 624 625 pcie1_default_state: pcie1-default-state { 626 perst-pins { 627 pins = "gpio97"; 628 function = "gpio"; 629 drive-strength = <2>; 630 bias-pull-down; 631 }; 632 633 clkreq-pins { 634 pins = "gpio98"; 635 function = "pcie1_clkreqn"; 636 drive-strength = <2>; 637 bias-pull-up; 638 }; 639 640 wake-pins { 641 pins = "gpio99"; 642 function = "gpio"; 643 drive-strength = <2>; 644 bias-pull-up; 645 }; 646 }; 647 648}; 649 650&uart2 { 651 status = "okay"; 652}; 653 654&ufs_mem_hc { 655 status = "okay"; 656 657 reset-gpios = <&tlmm 203 GPIO_ACTIVE_LOW>; 658 659 vcc-supply = <&vreg_l7b_2p96>; 660 vcc-max-microamp = <800000>; 661 vccq-supply = <&vreg_l9b_1p2>; 662 vccq-max-microamp = <900000>; 663}; 664 665&ufs_mem_phy { 666 status = "okay"; 667 668 vdda-phy-supply = <&vreg_l5b_0p88>; 669 vdda-pll-supply = <&vreg_l6b_1p2>; 670}; 671 672&usb_1 { 673 status = "okay"; 674}; 675 676&usb_1_dwc3 { 677 /* TODO: Define USB-C connector properly */ 678 dr_mode = "peripheral"; 679}; 680 681&usb_1_hsphy { 682 status = "okay"; 683 684 vdda-pll-supply = <&vreg_l5b_0p88>; 685 vdda18-supply = <&vreg_l1c_1p8>; 686 vdda33-supply = <&vreg_l2b_3p07>; 687}; 688 689&usb_1_qmpphy { 690 status = "okay"; 691 692 vdda-phy-supply = <&vreg_l6b_1p2>; 693 vdda-pll-supply = <&vreg_l1b_0p88>; 694}; 695 696&usb_2 { 697 status = "okay"; 698}; 699 700&usb_2_dwc3 { 701 dr_mode = "host"; 702 703 pinctrl-names = "default"; 704 pinctrl-0 = <&usb_hub_enabled_state>; 705}; 706 707&usb_2_hsphy { 708 status = "okay"; 709 710 vdda-pll-supply = <&vreg_l5b_0p88>; 711 vdda18-supply = <&vreg_l1c_1p8>; 712 vdda33-supply = <&vreg_l2b_3p07>; 713}; 714 715&usb_2_qmpphy { 716 status = "okay"; 717 718 vdda-phy-supply = <&vreg_l6b_1p2>; 719 vdda-pll-supply = <&vreg_l5b_0p88>; 720}; 721 722/* PINCTRL - additions to nodes defined in sm8350.dtsi */ 723 724&tlmm { 725 usb_hub_enabled_state: usb-hub-enabled-state { 726 pins = "gpio42"; 727 function = "gpio"; 728 729 drive-strength = <2>; 730 output-low; 731 }; 732 733 lt9611_state: lt9611-state { 734 rst-pins { 735 pins = "gpio48"; 736 function = "gpio"; 737 738 output-high; 739 input-disable; 740 }; 741 742 irq-pins { 743 pins = "gpio50"; 744 function = "gpio"; 745 bias-disable; 746 }; 747 }; 748}; 749