xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/sdm850-lenovo-yoga-c630.dts (revision c7046f76c2c027b00c0e6ba57cfd28f1a78f5e23)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * Lenovo Yoga C630
4 *
5 * Copyright (c) 2019, Linaro Ltd.
6 */
7
8/dts-v1/;
9
10#include <dt-bindings/input/gpio-keys.h>
11#include <dt-bindings/input/input.h>
12#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
13#include <dt-bindings/sound/qcom,q6afe.h>
14#include <dt-bindings/sound/qcom,q6asm.h>
15#include "sdm850.dtsi"
16#include "pm8998.dtsi"
17
18/*
19 * Update following upstream (sdm845.dtsi) reserved
20 * memory mappings for firmware loading to succeed
21 * and enable the IPA device.
22 */
23/delete-node/ &ipa_fw_mem;
24/delete-node/ &ipa_gsi_mem;
25/delete-node/ &gpu_mem;
26/delete-node/ &adsp_mem;
27/delete-node/ &wlan_msa_mem;
28
29/ {
30	model = "Lenovo Yoga C630";
31	compatible = "lenovo,yoga-c630", "qcom,sdm845";
32	chassis-type = "convertible";
33
34	aliases {
35		hsuart0 = &uart6;
36	};
37
38	gpio-keys {
39		compatible = "gpio-keys";
40
41		pinctrl-names = "default";
42		pinctrl-0 = <&lid_pin_active>, <&mode_pin_active>;
43
44		lid {
45			gpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;
46			linux,input-type = <EV_SW>;
47			linux,code = <SW_LID>;
48			wakeup-source;
49			wakeup-event-action = <EV_ACT_DEASSERTED>;
50		};
51
52		mode {
53			gpios = <&tlmm 95 GPIO_ACTIVE_HIGH>;
54			linux,input-type = <EV_SW>;
55			linux,code = <SW_TABLET_MODE>;
56		};
57	};
58
59	/* Reserved memory changes for IPA */
60	reserved-memory {
61		wlan_msa_mem: memory@8c400000 {
62			reg = <0 0x8c400000 0 0x100000>;
63			no-map;
64		};
65
66		gpu_mem: memory@8c515000 {
67			reg = <0 0x8c515000 0 0x2000>;
68			no-map;
69		};
70
71		ipa_fw_mem: memory@8c517000 {
72			reg = <0 0x8c517000 0 0x5a000>;
73			no-map;
74		};
75
76		adsp_mem: memory@8c600000 {
77			reg = <0 0x8c600000 0 0x1a00000>;
78			no-map;
79		};
80	};
81
82	sn65dsi86_refclk: sn65dsi86-refclk {
83		compatible = "fixed-clock";
84		#clock-cells = <0>;
85
86		clock-frequency = <19200000>;
87	};
88
89	backlight: backlight {
90		compatible = "pwm-backlight";
91		pwms = <&sn65dsi86 1000000>;
92		enable-gpios = <&tlmm 11 GPIO_ACTIVE_HIGH>;
93	};
94};
95
96&adsp_pas {
97	firmware-name = "qcom/LENOVO/81JL/qcadsp850.mbn";
98	status = "okay";
99};
100
101&apps_rsc {
102	pm8998-rpmh-regulators {
103		compatible = "qcom,pm8998-rpmh-regulators";
104		qcom,pmic-id = "a";
105
106		vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>;
107		vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>;
108
109		vreg_s2a_1p125: smps2 {
110		};
111
112		vreg_s3a_1p35: smps3 {
113			regulator-min-microvolt = <1352000>;
114			regulator-max-microvolt = <1352000>;
115			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
116		};
117
118		vreg_s4a_1p8: smps4 {
119			regulator-min-microvolt = <1800000>;
120			regulator-max-microvolt = <1800000>;
121			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
122		};
123
124		vreg_s5a_2p04: smps5 {
125			regulator-min-microvolt = <2040000>;
126			regulator-max-microvolt = <2040000>;
127			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
128		};
129
130		vreg_s7a_1p025: smps7 {
131		};
132
133		vdd_qusb_hs0:
134		vdda_hp_pcie_core:
135		vdda_mipi_csi0_0p9:
136		vdda_mipi_csi1_0p9:
137		vdda_mipi_csi2_0p9:
138		vdda_mipi_dsi0_pll:
139		vdda_mipi_dsi1_pll:
140		vdda_qlink_lv:
141		vdda_qlink_lv_ck:
142		vdda_qrefs_0p875:
143		vdda_pcie_core:
144		vdda_pll_cc_ebi01:
145		vdda_pll_cc_ebi23:
146		vdda_sp_sensor:
147		vdda_ufs1_core:
148		vdda_ufs2_core:
149		vdda_usb1_ss_core:
150		vdda_usb2_ss_core:
151		vreg_l1a_0p875: ldo1 {
152			regulator-min-microvolt = <880000>;
153			regulator-max-microvolt = <880000>;
154			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
155		};
156
157		vddpx_10:
158		vreg_l2a_1p2: ldo2 {
159			regulator-min-microvolt = <1200000>;
160			regulator-max-microvolt = <1200000>;
161			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
162			regulator-always-on;
163		};
164
165		vreg_l3a_1p0: ldo3 {
166		};
167
168		vdd_wcss_cx:
169		vdd_wcss_mx:
170		vdda_wcss_pll:
171		vreg_l5a_0p8: ldo5 {
172			regulator-min-microvolt = <800000>;
173			regulator-max-microvolt = <800000>;
174			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
175		};
176
177		vddpx_13:
178		vreg_l6a_1p8: ldo6 {
179			regulator-min-microvolt = <1800000>;
180			regulator-max-microvolt = <1800000>;
181			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
182		};
183
184		vreg_l7a_1p8: ldo7 {
185			regulator-min-microvolt = <1800000>;
186			regulator-max-microvolt = <1800000>;
187			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188		};
189
190		vreg_l8a_1p2: ldo8 {
191		};
192
193		vreg_l9a_1p8: ldo9 {
194		};
195
196		vreg_l10a_1p8: ldo10 {
197		};
198
199		vreg_l11a_1p0: ldo11 {
200		};
201
202		vdd_qfprom:
203		vdd_qfprom_sp:
204		vdda_apc1_cs_1p8:
205		vdda_gfx_cs_1p8:
206		vdda_qrefs_1p8:
207		vdda_qusb_hs0_1p8:
208		vddpx_11:
209		vreg_l12a_1p8: ldo12 {
210			regulator-min-microvolt = <1800000>;
211			regulator-max-microvolt = <1800000>;
212			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213		};
214
215		vddpx_2:
216		vreg_l13a_2p95: ldo13 {
217		};
218
219		vreg_l14a_1p88: ldo14 {
220			regulator-min-microvolt = <1880000>;
221			regulator-max-microvolt = <1880000>;
222			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
223			regulator-always-on;
224		};
225
226		vreg_l15a_1p8: ldo15 {
227		};
228
229		vreg_l16a_2p7: ldo16 {
230		};
231
232		vreg_l17a_1p3: ldo17 {
233			regulator-min-microvolt = <1304000>;
234			regulator-max-microvolt = <1304000>;
235			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
236		};
237
238		vreg_l18a_2p7: ldo18 {
239		};
240
241		vreg_l19a_3p0: ldo19 {
242			regulator-min-microvolt = <3100000>;
243			regulator-max-microvolt = <3108000>;
244			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
245		};
246
247		vreg_l20a_2p95: ldo20 {
248			regulator-min-microvolt = <2960000>;
249			regulator-max-microvolt = <2960000>;
250			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
251		};
252
253		vreg_l21a_2p95: ldo21 {
254		};
255
256		vreg_l22a_2p85: ldo22 {
257		};
258
259		vreg_l23a_3p3: ldo23 {
260			regulator-min-microvolt = <3300000>;
261			regulator-max-microvolt = <3312000>;
262			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
263		};
264
265		vdda_qusb_hs0_3p1:
266		vreg_l24a_3p075: ldo24 {
267			regulator-min-microvolt = <3075000>;
268			regulator-max-microvolt = <3083000>;
269			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
270		};
271
272		vreg_l25a_3p3: ldo25 {
273			regulator-min-microvolt = <3104000>;
274			regulator-max-microvolt = <3112000>;
275			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
276		};
277
278		vdda_hp_pcie_1p2:
279		vdda_hv_ebi0:
280		vdda_hv_ebi1:
281		vdda_hv_ebi2:
282		vdda_hv_ebi3:
283		vdda_mipi_csi_1p25:
284		vdda_mipi_dsi0_1p2:
285		vdda_mipi_dsi1_1p2:
286		vdda_pcie_1p2:
287		vdda_ufs1_1p2:
288		vdda_ufs2_1p2:
289		vdda_usb1_ss_1p2:
290		vdda_usb2_ss_1p2:
291		vreg_l26a_1p2: ldo26 {
292			regulator-min-microvolt = <1200000>;
293			regulator-max-microvolt = <1208000>;
294			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
295		};
296
297		vreg_l28a_3p0: ldo28 {
298		};
299
300		vreg_lvs1a_1p8: lvs1 {
301		};
302
303		vreg_lvs2a_1p8: lvs2 {
304		};
305	};
306};
307
308&cdsp_pas {
309	firmware-name = "qcom/LENOVO/81JL/qccdsp850.mbn";
310	status = "okay";
311};
312
313&dsi0 {
314	status = "okay";
315	vdda-supply = <&vreg_l26a_1p2>;
316
317	ports {
318		port@1 {
319			endpoint {
320				remote-endpoint = <&sn65dsi86_in_a>;
321				data-lanes = <0 1 2 3>;
322			};
323		};
324	};
325};
326
327&dsi0_phy {
328	status = "okay";
329	vdds-supply = <&vreg_l1a_0p875>;
330};
331
332&gcc {
333	protected-clocks = <GCC_QSPI_CORE_CLK>,
334			   <GCC_QSPI_CORE_CLK_SRC>,
335			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
336			   <GCC_LPASS_Q6_AXI_CLK>,
337			   <GCC_LPASS_SWAY_CLK>;
338};
339
340&gmu {
341	status = "okay";
342};
343
344&gpu {
345	status = "okay";
346	zap-shader {
347		memory-region = <&gpu_mem>;
348		firmware-name = "qcom/LENOVO/81JL/qcdxkmsuc850.mbn";
349	};
350};
351
352&i2c1 {
353	status = "okay";
354	clock-frequency = <400000>;
355};
356
357&i2c3 {
358	status = "okay";
359	clock-frequency = <400000>;
360	/* Overwrite pinctrl-0 from sdm845.dtsi */
361	pinctrl-0 = <&qup_i2c3_default &i2c3_hid_active>;
362
363	tsel: hid@15 {
364		compatible = "hid-over-i2c";
365		reg = <0x15>;
366		hid-descr-addr = <0x1>;
367
368		interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
369	};
370
371	tsc2: hid@2c {
372		compatible = "hid-over-i2c";
373		reg = <0x2c>;
374		hid-descr-addr = <0x20>;
375
376		interrupts-extended = <&tlmm 37 IRQ_TYPE_LEVEL_HIGH>;
377	};
378};
379
380&i2c5 {
381	status = "okay";
382	clock-frequency = <400000>;
383
384	tsc1: hid@10 {
385		compatible = "hid-over-i2c";
386		reg = <0x10>;
387		hid-descr-addr = <0x1>;
388
389		interrupts-extended = <&tlmm 125 IRQ_TYPE_LEVEL_LOW>;
390
391		pinctrl-names = "default";
392		pinctrl-0 = <&i2c5_hid_active>;
393	};
394};
395
396&i2c10 {
397	status = "okay";
398	clock-frequency = <400000>;
399
400	sn65dsi86: bridge@2c {
401		compatible = "ti,sn65dsi86";
402		reg = <0x2c>;
403		pinctrl-names = "default";
404		pinctrl-0 = <&sn65dsi86_pin_active>;
405
406		enable-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;
407
408		vpll-supply = <&vreg_l14a_1p88>;
409		vccio-supply = <&vreg_l14a_1p88>;
410
411		clocks = <&sn65dsi86_refclk>;
412		clock-names = "refclk";
413
414		no-hpd;
415		#pwm-cells = <1>;
416
417		ports {
418			#address-cells = <1>;
419			#size-cells = <0>;
420
421			port@0 {
422				reg = <0>;
423				sn65dsi86_in_a: endpoint {
424					remote-endpoint = <&dsi0_out>;
425				};
426			};
427
428			port@1 {
429				reg = <1>;
430				sn65dsi86_out: endpoint {
431					remote-endpoint = <&panel_in_edp>;
432				};
433			};
434		};
435
436		aux-bus {
437			panel: panel {
438				compatible = "boe,nv133fhm-n61";
439				backlight = <&backlight>;
440
441				port {
442					panel_in_edp: endpoint {
443						remote-endpoint = <&sn65dsi86_out>;
444					};
445				};
446			};
447		};
448	};
449};
450
451&i2c11 {
452	status = "okay";
453	clock-frequency = <400000>;
454
455	ecsh: hid@5c {
456		compatible = "hid-over-i2c";
457		reg = <0x5c>;
458		hid-descr-addr = <0x1>;
459
460		interrupts-extended = <&tlmm 92 IRQ_TYPE_LEVEL_LOW>;
461
462		pinctrl-names = "default";
463		pinctrl-0 = <&i2c11_hid_active>;
464	};
465};
466
467&ipa {
468	status = "okay";
469	memory-region = <&ipa_fw_mem>;
470};
471
472&mdss {
473	status = "okay";
474};
475
476&mss_pil {
477	status = "okay";
478	firmware-name = "qcom/LENOVO/81JL/qcdsp1v2850.mbn", "qcom/LENOVO/81JL/qcdsp2850.mbn";
479};
480
481&qup_i2c10_default {
482	pinconf {
483		pins = "gpio55", "gpio56";
484		drive-strength = <2>;
485		bias-disable;
486	};
487};
488
489&qup_i2c12_default {
490	drive-strength = <2>;
491	bias-disable;
492};
493
494&qup_uart6_default {
495	pinmux {
496		 pins = "gpio45", "gpio46", "gpio47", "gpio48";
497		 function = "qup6";
498	};
499
500	cts {
501		pins = "gpio45";
502		bias-pull-down;
503	};
504
505	rts-tx {
506		pins = "gpio46", "gpio47";
507		drive-strength = <2>;
508		bias-disable;
509	};
510
511	rx {
512		pins = "gpio48";
513		bias-pull-up;
514	};
515};
516
517&qupv3_id_0 {
518	status = "okay";
519};
520
521&qupv3_id_1 {
522	status = "okay";
523};
524
525&q6asmdai {
526	dai@0 {
527		reg = <0>;
528	};
529
530	dai@1 {
531		reg = <1>;
532	};
533
534	dai@2 {
535		reg = <2>;
536	};
537};
538
539&sound {
540	compatible = "qcom,db845c-sndcard";
541	model = "Lenovo-YOGA-C630-13Q50";
542
543	audio-routing =
544		"RX_BIAS", "MCLK",
545		"AMIC2", "MIC BIAS2",
546		"SpkrLeft IN", "SPK1 OUT",
547		"SpkrRight IN", "SPK2 OUT",
548		"MM_DL1",  "MultiMedia1 Playback",
549		"MM_DL3",  "MultiMedia3 Playback",
550		"MultiMedia2 Capture", "MM_UL2";
551
552	mm1-dai-link {
553		link-name = "MultiMedia1";
554		cpu {
555			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA1>;
556		};
557	};
558
559	mm2-dai-link {
560		link-name = "MultiMedia2";
561		cpu {
562			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA2>;
563		};
564	};
565
566	mm3-dai-link {
567		link-name = "MultiMedia3";
568		cpu {
569			sound-dai = <&q6asmdai  MSM_FRONTEND_DAI_MULTIMEDIA3>;
570		};
571	};
572
573	slim-dai-link {
574		link-name = "SLIM Playback";
575		cpu {
576			sound-dai = <&q6afedai SLIMBUS_0_RX>;
577		};
578
579		platform {
580			sound-dai = <&q6routing>;
581		};
582
583		codec {
584			sound-dai =  <&left_spkr>, <&right_spkr>, <&swm 0>, <&wcd9340 0>;
585		};
586	};
587
588	slimcap-dai-link {
589		link-name = "SLIM Capture";
590		cpu {
591			sound-dai = <&q6afedai SLIMBUS_0_TX>;
592		};
593
594		platform {
595			sound-dai = <&q6routing>;
596		};
597
598		codec {
599			sound-dai = <&wcd9340 1>;
600		};
601	};
602
603	slim-wcd-dai-link {
604		link-name = "SLIM WCD Playback";
605		cpu {
606			sound-dai = <&q6afedai SLIMBUS_1_RX>;
607		};
608
609		platform {
610			sound-dai = <&q6routing>;
611		};
612
613		codec {
614			sound-dai =  <&wcd9340 2>;
615		};
616	};
617};
618
619&tlmm {
620	gpio-reserved-ranges = <0 4>, <81 4>;
621
622	sn65dsi86_pin_active: sn65dsi86-enable {
623		pins = "gpio96";
624		drive-strength = <2>;
625		bias-disable;
626	};
627
628	i2c3_hid_active: i2c2-hid-active {
629		pins = "gpio37";
630		function = "gpio";
631
632		input-enable;
633		bias-pull-up;
634		drive-strength = <2>;
635	};
636
637	i2c5_hid_active: i2c5-hid-active {
638		pins = "gpio125";
639		function = "gpio";
640
641		input-enable;
642		bias-pull-up;
643		drive-strength = <2>;
644	};
645
646	i2c11_hid_active: i2c11-hid-active {
647		pins = "gpio92";
648		function = "gpio";
649
650		input-enable;
651		bias-pull-up;
652		drive-strength = <2>;
653	};
654
655	wcd_intr_default: wcd_intr_default {
656		pins = "gpio54";
657		function = "gpio";
658
659		input-enable;
660		bias-pull-down;
661		drive-strength = <2>;
662	};
663
664	lid_pin_active: lid-pin {
665		pins = "gpio124";
666		function = "gpio";
667
668		input-enable;
669		bias-disable;
670	};
671
672	mode_pin_active: mode-pin {
673		pins = "gpio95";
674		function = "gpio";
675
676		input-enable;
677		bias-disable;
678	};
679};
680
681&uart6 {
682	status = "okay";
683
684	bluetooth {
685		compatible = "qcom,wcn3990-bt";
686
687		vddio-supply = <&vreg_s4a_1p8>;
688		vddxo-supply = <&vreg_l7a_1p8>;
689		vddrf-supply = <&vreg_l17a_1p3>;
690		vddch0-supply = <&vreg_l25a_3p3>;
691		vddch1-supply = <&vreg_l23a_3p3>;
692		max-speed = <3200000>;
693	};
694};
695
696&ufs_mem_hc {
697	status = "okay";
698
699	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
700
701	vcc-supply = <&vreg_l20a_2p95>;
702	vcc-max-microamp = <600000>;
703};
704
705&ufs_mem_phy {
706	status = "okay";
707
708	vdda-phy-supply = <&vdda_ufs1_core>;
709	vdda-pll-supply = <&vdda_ufs1_1p2>;
710};
711
712&usb_1 {
713	status = "okay";
714};
715
716&usb_1_dwc3 {
717	dr_mode = "host";
718};
719
720&usb_1_hsphy {
721	status = "okay";
722
723	vdd-supply = <&vdda_usb1_ss_core>;
724	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
725	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
726
727	qcom,imp-res-offset-value = <8>;
728	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
729	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
730	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
731};
732
733&usb_1_qmpphy {
734	status = "okay";
735
736	vdda-phy-supply = <&vdda_usb1_ss_1p2>;
737	vdda-pll-supply = <&vdda_usb1_ss_core>;
738};
739
740&usb_2 {
741	status = "okay";
742};
743
744&usb_2_dwc3 {
745	dr_mode = "host";
746};
747
748&usb_2_hsphy {
749	status = "okay";
750
751	vdd-supply = <&vdda_usb2_ss_core>;
752	vdda-pll-supply = <&vdda_qusb_hs0_1p8>;
753	vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>;
754
755	qcom,imp-res-offset-value = <8>;
756	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_22_8_MA>;
757};
758
759&usb_2_qmpphy {
760	status = "okay";
761
762	vdda-phy-supply = <&vdda_usb2_ss_1p2>;
763	vdda-pll-supply = <&vdda_usb2_ss_core>;
764};
765
766&venus {
767	status = "okay";
768};
769
770&wcd9340{
771	pinctrl-0 = <&wcd_intr_default>;
772	pinctrl-names = "default";
773	clock-names = "extclk";
774	clocks = <&rpmhcc RPMH_LN_BB_CLK2>;
775	reset-gpios = <&tlmm 64 0>;
776	vdd-buck-supply = <&vreg_s4a_1p8>;
777	vdd-buck-sido-supply = <&vreg_s4a_1p8>;
778	vdd-tx-supply = <&vreg_s4a_1p8>;
779	vdd-rx-supply = <&vreg_s4a_1p8>;
780	vdd-io-supply = <&vreg_s4a_1p8>;
781	qcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;
782	qcom,mbhc-headset-vthreshold-microvolt = <1700000>;
783	qcom,mbhc-headphone-vthreshold-microvolt = <50000>;
784
785	swm: swm@c85 {
786		left_spkr: wsa8810-left{
787			compatible = "sdw10217211000";
788			reg = <0 3>;
789			powerdown-gpios = <&wcdgpio 1 GPIO_ACTIVE_HIGH>;
790			#thermal-sensor-cells = <0>;
791			sound-name-prefix = "SpkrLeft";
792			#sound-dai-cells = <0>;
793		};
794
795		right_spkr: wsa8810-right{
796			compatible = "sdw10217211000";
797			powerdown-gpios = <&wcdgpio 2 GPIO_ACTIVE_HIGH>;
798			reg = <0 4>;
799			#thermal-sensor-cells = <0>;
800			sound-name-prefix = "SpkrRight";
801			#sound-dai-cells = <0>;
802		};
803	};
804};
805
806&wifi {
807	status = "okay";
808
809	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
810	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
811	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
812	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
813	vdd-3.3-ch1-supply = <&vreg_l23a_3p3>;
814
815	qcom,snoc-host-cap-8bit-quirk;
816};
817
818&crypto {
819	/* FIXME: qce_start triggers an SError */
820	status= "disable";
821};
822