xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/sdm845-xiaomi-beryllium.dts (revision dd41de95a84d979615a2ef11df6850622bf6184e)
1// SPDX-License-Identifier: GPL-2.0
2
3/dts-v1/;
4
5#include <dt-bindings/gpio/gpio.h>
6#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
7#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
8#include "sdm845.dtsi"
9#include "pm8998.dtsi"
10#include "pmi8998.dtsi"
11
12/*
13 * Delete following upstream (sdm845.dtsi) reserved
14 * memory mappings which are different in this device.
15 */
16/delete-node/ &tz_mem;
17/delete-node/ &adsp_mem;
18/delete-node/ &wlan_msa_mem;
19/delete-node/ &mpss_region;
20/delete-node/ &venus_mem;
21/delete-node/ &cdsp_mem;
22/delete-node/ &mba_region;
23/delete-node/ &slpi_mem;
24/delete-node/ &spss_mem;
25/delete-node/ &rmtfs_mem;
26
27/ {
28	model = "Xiaomi Pocophone F1";
29	compatible = "xiaomi,beryllium", "qcom,sdm845";
30
31	/* required for bootloader to select correct board */
32	qcom,board-id = <69 0>;
33	qcom,msm-id = <321 0x20001>;
34
35	aliases {
36		hsuart0 = &uart6;
37	};
38
39	gpio-keys {
40		compatible = "gpio-keys";
41		autorepeat;
42
43		pinctrl-names = "default";
44		pinctrl-0 = <&vol_up_pin_a>;
45
46		vol-up {
47			label = "Volume Up";
48			linux,code = <KEY_VOLUMEUP>;
49			gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>;
50		};
51	};
52
53	/* Reserved memory changes from downstream */
54	reserved-memory {
55		tz_mem: memory@86200000 {
56			reg = <0 0x86200000 0 0x4900000>;
57			no-map;
58		};
59
60		adsp_mem: memory@8c500000 {
61			reg = <0 0x8c500000 0 0x1e00000>;
62			no-map;
63		};
64
65		wlan_msa_mem: memory@8e300000 {
66			reg = <0 0x8e300000 0 0x100000>;
67			no-map;
68		};
69
70		mpss_region: memory@8e400000 {
71			reg = <0 0x8e400000 0 0x7800000>;
72			no-map;
73		};
74
75		venus_mem: memory@95c00000 {
76			reg = <0 0x95c00000 0 0x500000>;
77			no-map;
78		};
79
80		cdsp_mem: memory@96100000 {
81			reg = <0 0x96100000 0 0x800000>;
82			no-map;
83		};
84
85		mba_region: memory@96900000 {
86			reg = <0 0x96900000 0 0x200000>;
87			no-map;
88		};
89
90		slpi_mem: memory@96b00000 {
91			reg = <0 0x96b00000 0 0x1400000>;
92			no-map;
93		};
94
95		spss_mem: memory@97f00000 {
96			reg = <0 0x97f00000 0 0x100000>;
97			no-map;
98		};
99
100		rmtfs_mem: memory@f6301000 {
101			compatible = "qcom,rmtfs-mem";
102			reg = <0 0xf6301000 0 0x200000>;
103			no-map;
104
105			qcom,client-id = <1>;
106			qcom,vmid = <15>;
107		};
108	};
109
110	vreg_s4a_1p8: vreg-s4a-1p8 {
111		compatible = "regulator-fixed";
112		regulator-name = "vreg_s4a_1p8";
113
114		regulator-min-microvolt = <1800000>;
115		regulator-max-microvolt = <1800000>;
116		regulator-always-on;
117	};
118};
119
120&adsp_pas {
121	status = "okay";
122	firmware-name = "qcom/sdm845/adsp.mdt";
123};
124
125&apps_rsc {
126	pm8998-rpmh-regulators {
127		compatible = "qcom,pm8998-rpmh-regulators";
128		qcom,pmic-id = "a";
129
130		vreg_l1a_0p875: ldo1 {
131			regulator-min-microvolt = <880000>;
132			regulator-max-microvolt = <880000>;
133			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
134		};
135
136		vreg_l5a_0p8: ldo5 {
137			regulator-min-microvolt = <800000>;
138			regulator-max-microvolt = <800000>;
139			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
140		};
141
142		vreg_l7a_1p8: ldo7 {
143			regulator-min-microvolt = <1800000>;
144			regulator-max-microvolt = <1800000>;
145			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
146		};
147
148		vreg_l12a_1p8: ldo12 {
149			regulator-min-microvolt = <1800000>;
150			regulator-max-microvolt = <1800000>;
151			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
152		};
153
154		vreg_l13a_2p95: ldo13 {
155			regulator-min-microvolt = <1800000>;
156			regulator-max-microvolt = <2960000>;
157			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
158		};
159
160		vreg_l17a_1p3: ldo17 {
161			regulator-min-microvolt = <1304000>;
162			regulator-max-microvolt = <1304000>;
163			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
164		};
165
166		vreg_l20a_2p95: ldo20 {
167			regulator-min-microvolt = <2960000>;
168			regulator-max-microvolt = <2968000>;
169			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
170		};
171
172		vreg_l21a_2p95: ldo21 {
173			regulator-min-microvolt = <2960000>;
174			regulator-max-microvolt = <2968000>;
175			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
176		};
177
178		vreg_l24a_3p075: ldo24 {
179			regulator-min-microvolt = <3088000>;
180			regulator-max-microvolt = <3088000>;
181			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
182		};
183
184		vreg_l25a_3p3: ldo25 {
185			regulator-min-microvolt = <3300000>;
186			regulator-max-microvolt = <3312000>;
187			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
188		};
189
190		vreg_l26a_1p2: ldo26 {
191			regulator-min-microvolt = <1200000>;
192			regulator-max-microvolt = <1200000>;
193			regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
194		};
195	};
196};
197
198&cdsp_pas {
199	status = "okay";
200	firmware-name = "qcom/sdm845/cdsp.mdt";
201};
202
203&gcc {
204	protected-clocks = <GCC_QSPI_CORE_CLK>,
205			   <GCC_QSPI_CORE_CLK_SRC>,
206			   <GCC_QSPI_CNOC_PERIPH_AHB_CLK>,
207			   <GCC_LPASS_Q6_AXI_CLK>,
208			   <GCC_LPASS_SWAY_CLK>;
209};
210
211&gpu {
212	zap-shader {
213		memory-region = <&gpu_mem>;
214		firmware-name = "qcom/sdm845/a630_zap.mbn";
215	};
216};
217
218&mss_pil {
219	status = "okay";
220	firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mdt";
221};
222
223&pm8998_gpio {
224	vol_up_pin_a: vol-up-active {
225		pins = "gpio6";
226		function = "normal";
227		input-enable;
228		bias-pull-up;
229		qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>;
230	};
231};
232
233&pm8998_pon {
234	resin {
235		compatible = "qcom,pm8941-resin";
236		interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>;
237		debounce = <15625>;
238		bias-pull-up;
239		linux,code = <KEY_VOLUMEDOWN>;
240	};
241};
242
243&qupv3_id_0 {
244	status = "okay";
245};
246
247&sdhc_2 {
248	status = "okay";
249
250	pinctrl-names = "default";
251	pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>;
252
253	vmmc-supply = <&vreg_l21a_2p95>;
254	vqmmc-supply = <&vreg_l13a_2p95>;
255
256	bus-width = <4>;
257	cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>;
258};
259
260&tlmm {
261	gpio-reserved-ranges = <0 4>, <81 4>;
262
263	sdc2_default_state: sdc2-default {
264		clk {
265			pins = "sdc2_clk";
266			bias-disable;
267			drive-strength = <16>;
268		};
269
270		cmd {
271			pins = "sdc2_cmd";
272			bias-pull-up;
273			drive-strength = <10>;
274		};
275
276		data {
277			pins = "sdc2_data";
278			bias-pull-up;
279			drive-strength = <10>;
280		};
281	};
282
283	sdc2_card_det_n: sd-card-det-n {
284		pins = "gpio126";
285		function = "gpio";
286		bias-pull-up;
287	};
288};
289
290&uart6 {
291	status = "okay";
292
293	bluetooth {
294		compatible = "qcom,wcn3990-bt";
295
296		vddio-supply = <&vreg_s4a_1p8>;
297		vddxo-supply = <&vreg_l7a_1p8>;
298		vddrf-supply = <&vreg_l17a_1p3>;
299		vddch0-supply = <&vreg_l25a_3p3>;
300		max-speed = <3200000>;
301	};
302};
303
304&ufs_mem_hc {
305	status = "okay";
306
307	reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>;
308
309	vcc-supply = <&vreg_l20a_2p95>;
310	vcc-max-microamp = <800000>;
311};
312
313&ufs_mem_phy {
314	status = "okay";
315
316	vdda-phy-supply = <&vreg_l1a_0p875>;
317	vdda-pll-supply = <&vreg_l26a_1p2>;
318};
319
320&usb_1 {
321	status = "okay";
322};
323
324&usb_1_dwc3 {
325	dr_mode = "peripheral";
326};
327
328&usb_1_hsphy {
329	status = "okay";
330
331	vdd-supply = <&vreg_l1a_0p875>;
332	vdda-pll-supply = <&vreg_l12a_1p8>;
333	vdda-phy-dpdm-supply = <&vreg_l24a_3p075>;
334
335	qcom,imp-res-offset-value = <8>;
336	qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>;
337	qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>;
338	qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>;
339};
340
341&usb_1_qmpphy {
342	status = "okay";
343
344	vdda-phy-supply = <&vreg_l26a_1p2>;
345	vdda-pll-supply = <&vreg_l1a_0p875>;
346};
347
348&wifi {
349	status = "okay";
350
351	vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>;
352	vdd-1.8-xo-supply = <&vreg_l7a_1p8>;
353	vdd-1.3-rfa-supply = <&vreg_l17a_1p3>;
354	vdd-3.3-ch0-supply = <&vreg_l25a_3p3>;
355};
356
357/* PINCTRL - additions to nodes defined in sdm845.dtsi */
358
359&qup_uart6_default {
360	pinmux {
361		pins = "gpio45", "gpio46", "gpio47", "gpio48";
362		function = "qup6";
363	};
364
365	cts {
366		pins = "gpio45";
367		bias-disable;
368	};
369
370	rts-tx {
371		pins = "gpio46", "gpio47";
372		drive-strength = <2>;
373		bias-disable;
374	};
375
376	rx {
377		pins = "gpio48";
378		bias-pull-up;
379	};
380};
381