1// SPDX-License-Identifier: GPL-2.0 2 3/dts-v1/; 4 5#include <dt-bindings/gpio/gpio.h> 6#include <dt-bindings/pinctrl/qcom,pmic-gpio.h> 7#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 8#include "sdm845.dtsi" 9#include "pm8998.dtsi" 10#include "pmi8998.dtsi" 11 12/* 13 * Delete following upstream (sdm845.dtsi) reserved 14 * memory mappings which are different in this device. 15 */ 16/delete-node/ &tz_mem; 17/delete-node/ &adsp_mem; 18/delete-node/ &wlan_msa_mem; 19/delete-node/ &mpss_region; 20/delete-node/ &venus_mem; 21/delete-node/ &cdsp_mem; 22/delete-node/ &mba_region; 23/delete-node/ &slpi_mem; 24/delete-node/ &spss_mem; 25/delete-node/ &rmtfs_mem; 26 27/ { 28 model = "Xiaomi Pocophone F1"; 29 compatible = "xiaomi,beryllium", "qcom,sdm845"; 30 31 /* required for bootloader to select correct board */ 32 qcom,board-id = <69 0>; 33 qcom,msm-id = <321 0x20001>; 34 35 aliases { 36 hsuart0 = &uart6; 37 }; 38 39 gpio-keys { 40 compatible = "gpio-keys"; 41 autorepeat; 42 43 pinctrl-names = "default"; 44 pinctrl-0 = <&vol_up_pin_a>; 45 46 vol-up { 47 label = "Volume Up"; 48 linux,code = <KEY_VOLUMEUP>; 49 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 50 }; 51 }; 52 53 /* Reserved memory changes from downstream */ 54 reserved-memory { 55 tz_mem: memory@86200000 { 56 reg = <0 0x86200000 0 0x4900000>; 57 no-map; 58 }; 59 60 adsp_mem: memory@8c500000 { 61 reg = <0 0x8c500000 0 0x1e00000>; 62 no-map; 63 }; 64 65 wlan_msa_mem: memory@8e300000 { 66 reg = <0 0x8e300000 0 0x100000>; 67 no-map; 68 }; 69 70 mpss_region: memory@8e400000 { 71 reg = <0 0x8e400000 0 0x7800000>; 72 no-map; 73 }; 74 75 venus_mem: memory@95c00000 { 76 reg = <0 0x95c00000 0 0x500000>; 77 no-map; 78 }; 79 80 cdsp_mem: memory@96100000 { 81 reg = <0 0x96100000 0 0x800000>; 82 no-map; 83 }; 84 85 mba_region: memory@96900000 { 86 reg = <0 0x96900000 0 0x200000>; 87 no-map; 88 }; 89 90 slpi_mem: memory@96b00000 { 91 reg = <0 0x96b00000 0 0x1400000>; 92 no-map; 93 }; 94 95 spss_mem: memory@97f00000 { 96 reg = <0 0x97f00000 0 0x100000>; 97 no-map; 98 }; 99 100 rmtfs_mem: memory@f6301000 { 101 compatible = "qcom,rmtfs-mem"; 102 reg = <0 0xf6301000 0 0x200000>; 103 no-map; 104 105 qcom,client-id = <1>; 106 qcom,vmid = <15>; 107 }; 108 }; 109 110 vreg_s4a_1p8: vreg-s4a-1p8 { 111 compatible = "regulator-fixed"; 112 regulator-name = "vreg_s4a_1p8"; 113 114 regulator-min-microvolt = <1800000>; 115 regulator-max-microvolt = <1800000>; 116 regulator-always-on; 117 }; 118}; 119 120&adsp_pas { 121 status = "okay"; 122 firmware-name = "qcom/sdm845/adsp.mdt"; 123}; 124 125&apps_rsc { 126 pm8998-rpmh-regulators { 127 compatible = "qcom,pm8998-rpmh-regulators"; 128 qcom,pmic-id = "a"; 129 130 vreg_l1a_0p875: ldo1 { 131 regulator-min-microvolt = <880000>; 132 regulator-max-microvolt = <880000>; 133 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 134 }; 135 136 vreg_l5a_0p8: ldo5 { 137 regulator-min-microvolt = <800000>; 138 regulator-max-microvolt = <800000>; 139 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 140 }; 141 142 vreg_l7a_1p8: ldo7 { 143 regulator-min-microvolt = <1800000>; 144 regulator-max-microvolt = <1800000>; 145 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 146 }; 147 148 vreg_l12a_1p8: ldo12 { 149 regulator-min-microvolt = <1800000>; 150 regulator-max-microvolt = <1800000>; 151 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 152 }; 153 154 vreg_l13a_2p95: ldo13 { 155 regulator-min-microvolt = <1800000>; 156 regulator-max-microvolt = <2960000>; 157 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 158 }; 159 160 vreg_l14a_1p8: ldo14 { 161 regulator-min-microvolt = <1800000>; 162 regulator-max-microvolt = <1800000>; 163 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 164 regulator-boot-on; 165 regulator-always-on; 166 }; 167 168 vreg_l17a_1p3: ldo17 { 169 regulator-min-microvolt = <1304000>; 170 regulator-max-microvolt = <1304000>; 171 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 172 }; 173 174 vreg_l20a_2p95: ldo20 { 175 regulator-min-microvolt = <2960000>; 176 regulator-max-microvolt = <2968000>; 177 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 178 }; 179 180 vreg_l21a_2p95: ldo21 { 181 regulator-min-microvolt = <2960000>; 182 regulator-max-microvolt = <2968000>; 183 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 184 }; 185 186 vreg_l24a_3p075: ldo24 { 187 regulator-min-microvolt = <3088000>; 188 regulator-max-microvolt = <3088000>; 189 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 190 }; 191 192 vreg_l25a_3p3: ldo25 { 193 regulator-min-microvolt = <3300000>; 194 regulator-max-microvolt = <3312000>; 195 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 196 }; 197 198 vreg_l26a_1p2: ldo26 { 199 regulator-min-microvolt = <1200000>; 200 regulator-max-microvolt = <1200000>; 201 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 202 regulator-boot-on; 203 }; 204 }; 205}; 206 207&cdsp_pas { 208 status = "okay"; 209 firmware-name = "qcom/sdm845/cdsp.mdt"; 210}; 211 212&dsi0 { 213 status = "okay"; 214 vdda-supply = <&vreg_l26a_1p2>; 215 216 #address-cells = <1>; 217 #size-cells = <0>; 218 219 panel@0 { 220 compatible = "tianma,fhd-video"; 221 reg = <0>; 222 vddi0-supply = <&vreg_l14a_1p8>; 223 vddpos-supply = <&lab>; 224 vddneg-supply = <&ibb>; 225 226 #address-cells = <1>; 227 #size-cells = <0>; 228 229 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; 230 231 port { 232 tianma_nt36672a_in_0: endpoint { 233 remote-endpoint = <&dsi0_out>; 234 }; 235 }; 236 }; 237}; 238 239&dsi0_out { 240 remote-endpoint = <&tianma_nt36672a_in_0>; 241 data-lanes = <0 1 2 3>; 242}; 243 244&dsi0_phy { 245 status = "okay"; 246 vdds-supply = <&vreg_l1a_0p875>; 247}; 248 249&gcc { 250 protected-clocks = <GCC_QSPI_CORE_CLK>, 251 <GCC_QSPI_CORE_CLK_SRC>, 252 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 253 <GCC_LPASS_Q6_AXI_CLK>, 254 <GCC_LPASS_SWAY_CLK>; 255}; 256 257&gpu { 258 zap-shader { 259 memory-region = <&gpu_mem>; 260 firmware-name = "qcom/sdm845/a630_zap.mbn"; 261 }; 262}; 263 264&ibb { 265 regulator-min-microvolt = <4600000>; 266 regulator-max-microvolt = <6000000>; 267 regulator-over-current-protection; 268 regulator-pull-down; 269 regulator-soft-start; 270 qcom,discharge-resistor-kohms = <300>; 271}; 272 273&lab { 274 regulator-min-microvolt = <4600000>; 275 regulator-max-microvolt = <6000000>; 276 regulator-over-current-protection; 277 regulator-pull-down; 278 regulator-soft-start; 279}; 280 281&mdss { 282 status = "okay"; 283}; 284 285&mdss_mdp { 286 status = "okay"; 287}; 288 289&mss_pil { 290 status = "okay"; 291 firmware-name = "qcom/sdm845/mba.mbn", "qcom/sdm845/modem.mdt"; 292}; 293 294&pm8998_gpio { 295 vol_up_pin_a: vol-up-active { 296 pins = "gpio6"; 297 function = "normal"; 298 input-enable; 299 bias-pull-up; 300 qcom,drive-strength = <PMIC_GPIO_STRENGTH_NO>; 301 }; 302}; 303 304&pm8998_pon { 305 resin { 306 compatible = "qcom,pm8941-resin"; 307 interrupts = <0x0 0x8 1 IRQ_TYPE_EDGE_BOTH>; 308 debounce = <15625>; 309 bias-pull-up; 310 linux,code = <KEY_VOLUMEDOWN>; 311 }; 312}; 313 314&qupv3_id_0 { 315 status = "okay"; 316}; 317 318&sdhc_2 { 319 status = "okay"; 320 321 pinctrl-names = "default"; 322 pinctrl-0 = <&sdc2_default_state &sdc2_card_det_n>; 323 324 vmmc-supply = <&vreg_l21a_2p95>; 325 vqmmc-supply = <&vreg_l13a_2p95>; 326 327 bus-width = <4>; 328 cd-gpios = <&tlmm 126 GPIO_ACTIVE_HIGH>; 329}; 330 331&tlmm { 332 gpio-reserved-ranges = <0 4>, <81 4>; 333 334 sdc2_default_state: sdc2-default { 335 clk { 336 pins = "sdc2_clk"; 337 bias-disable; 338 drive-strength = <16>; 339 }; 340 341 cmd { 342 pins = "sdc2_cmd"; 343 bias-pull-up; 344 drive-strength = <10>; 345 }; 346 347 data { 348 pins = "sdc2_data"; 349 bias-pull-up; 350 drive-strength = <10>; 351 }; 352 }; 353 354 sdc2_card_det_n: sd-card-det-n { 355 pins = "gpio126"; 356 function = "gpio"; 357 bias-pull-up; 358 }; 359}; 360 361&uart6 { 362 status = "okay"; 363 364 bluetooth { 365 compatible = "qcom,wcn3990-bt"; 366 367 vddio-supply = <&vreg_s4a_1p8>; 368 vddxo-supply = <&vreg_l7a_1p8>; 369 vddrf-supply = <&vreg_l17a_1p3>; 370 vddch0-supply = <&vreg_l25a_3p3>; 371 max-speed = <3200000>; 372 }; 373}; 374 375&ufs_mem_hc { 376 status = "okay"; 377 378 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 379 380 vcc-supply = <&vreg_l20a_2p95>; 381 vcc-max-microamp = <800000>; 382}; 383 384&ufs_mem_phy { 385 status = "okay"; 386 387 vdda-phy-supply = <&vreg_l1a_0p875>; 388 vdda-pll-supply = <&vreg_l26a_1p2>; 389}; 390 391&usb_1 { 392 status = "okay"; 393}; 394 395&usb_1_dwc3 { 396 dr_mode = "peripheral"; 397}; 398 399&usb_1_hsphy { 400 status = "okay"; 401 402 vdd-supply = <&vreg_l1a_0p875>; 403 vdda-pll-supply = <&vreg_l12a_1p8>; 404 vdda-phy-dpdm-supply = <&vreg_l24a_3p075>; 405 406 qcom,imp-res-offset-value = <8>; 407 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 408 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 409 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 410}; 411 412&usb_1_qmpphy { 413 status = "okay"; 414 415 vdda-phy-supply = <&vreg_l26a_1p2>; 416 vdda-pll-supply = <&vreg_l1a_0p875>; 417}; 418 419&wifi { 420 status = "okay"; 421 422 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 423 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 424 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 425 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 426}; 427 428/* PINCTRL - additions to nodes defined in sdm845.dtsi */ 429 430&qup_uart6_default { 431 pinmux { 432 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 433 function = "qup6"; 434 }; 435 436 cts { 437 pins = "gpio45"; 438 bias-disable; 439 }; 440 441 rts-tx { 442 pins = "gpio46", "gpio47"; 443 drive-strength = <2>; 444 bias-disable; 445 }; 446 447 rx { 448 pins = "gpio48"; 449 bias-pull-up; 450 }; 451}; 452