1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SDM845 SoC device tree source 4 * 5 * Copyright (c) 2018, The Linux Foundation. All rights reserved. 6 */ 7 8&slim { 9 status = "okay"; 10 11 slim@1 { 12 reg = <1>; 13 #address-cells = <2>; 14 #size-cells = <0>; 15 16 wcd9340_ifd: ifd@0,0 { 17 compatible = "slim217,250"; 18 reg = <0 0>; 19 }; 20 21 wcd9340: codec@1,0 { 22 compatible = "slim217,250"; 23 reg = <1 0>; 24 slim-ifc-dev = <&wcd9340_ifd>; 25 26 #sound-dai-cells = <1>; 27 28 interrupts-extended = <&tlmm 54 IRQ_TYPE_LEVEL_HIGH>; 29 interrupt-controller; 30 #interrupt-cells = <1>; 31 32 clock-names = "extclk"; 33 clocks = <&rpmhcc RPMH_LN_BB_CLK2>; 34 35 #clock-cells = <0>; 36 clock-frequency = <9600000>; 37 clock-output-names = "mclk"; 38 39 pinctrl-0 = <&wcd_intr_default>; 40 pinctrl-names = "default"; 41 42 qcom,micbias1-microvolt = <1800000>; 43 qcom,micbias2-microvolt = <1800000>; 44 qcom,micbias3-microvolt = <1800000>; 45 qcom,micbias4-microvolt = <1800000>; 46 47 #address-cells = <1>; 48 #size-cells = <1>; 49 50 wcdgpio: gpio-controller@42 { 51 compatible = "qcom,wcd9340-gpio"; 52 gpio-controller; 53 #gpio-cells = <2>; 54 reg = <0x42 0x2>; 55 }; 56 57 swm: soundwire@c85 { 58 compatible = "qcom,soundwire-v1.3.0"; 59 reg = <0xc85 0x40>; 60 interrupts-extended = <&wcd9340 20>; 61 62 qcom,dout-ports = <6>; 63 qcom,din-ports = <2>; 64 qcom,ports-sinterval-low = /bits/ 8 <0x07 0x1f 0x3f 0x7 0x1f 0x3f 0x0f 0x0f>; 65 qcom,ports-offset1 = /bits/ 8 <0x01 0x02 0x0c 0x6 0x12 0x0d 0x07 0x0a>; 66 qcom,ports-offset2 = /bits/ 8 <0x00 0x00 0x1f 0x00 0x00 0x1f 0x00 0x00>; 67 68 #sound-dai-cells = <1>; 69 clocks = <&wcd9340>; 70 clock-names = "iface"; 71 #address-cells = <2>; 72 #size-cells = <0>; 73 }; 74 }; 75 }; 76}; 77 78&tlmm { 79 wcd_intr_default: wcd-intr-default-state { 80 pins = "gpio54"; 81 function = "gpio"; 82 83 bias-pull-down; 84 drive-strength = <2>; 85 }; 86}; 87