1// SPDX-License-Identifier: GPL-2.0 2/* 3 * SDM845 OnePlus 6(T) (enchilada / fajita) common device tree source 4 * 5 * Copyright (c) 2020, The Linux Foundation. All rights reserved. 6 */ 7 8/dts-v1/; 9 10#include <dt-bindings/input/linux-event-codes.h> 11#include <dt-bindings/regulator/qcom,rpmh-regulator.h> 12 13#include "sdm845.dtsi" 14#include "pm8998.dtsi" 15#include "pmi8998.dtsi" 16 17/delete-node/ &rmtfs_mem; 18 19/ { 20 aliases { 21 serial0 = &uart9; 22 hsuart0 = &uart6; 23 }; 24 25 chosen { 26 stdout-path = "serial0:115200n8"; 27 }; 28 29 gpio-keys { 30 compatible = "gpio-keys"; 31 label = "Volume keys"; 32 autorepeat; 33 34 pinctrl-names = "default"; 35 pinctrl-0 = <&volume_down_gpio &volume_up_gpio>; 36 37 vol-down { 38 label = "Volume down"; 39 linux,code = <KEY_VOLUMEDOWN>; 40 gpios = <&pm8998_gpio 5 GPIO_ACTIVE_LOW>; 41 debounce-interval = <15>; 42 }; 43 44 vol-up { 45 label = "Volume up"; 46 linux,code = <KEY_VOLUMEUP>; 47 gpios = <&pm8998_gpio 6 GPIO_ACTIVE_LOW>; 48 debounce-interval = <15>; 49 }; 50 }; 51 52 reserved-memory { 53 /* The rmtfs_mem needs to be guarded due to "XPU limitations" 54 * it is otherwise possible for an allocation adjacent to the 55 * rmtfs_mem region to trigger an XPU violation, causing a crash. 56 */ 57 rmtfs_lower_guard: memory@f5b00000 { 58 no-map; 59 reg = <0 0xf5b00000 0 0x1000>; 60 }; 61 /* 62 * The rmtfs memory region in downstream is 'dynamically allocated' 63 * but given the same address every time. Hard code it as this address is 64 * where the modem firmware expects it to be. 65 */ 66 rmtfs_mem: memory@f5b01000 { 67 compatible = "qcom,rmtfs-mem"; 68 reg = <0 0xf5b01000 0 0x200000>; 69 no-map; 70 71 qcom,client-id = <1>; 72 qcom,vmid = <15>; 73 }; 74 rmtfs_upper_guard: memory@f5d01000 { 75 no-map; 76 reg = <0 0xf5d01000 0 0x1000>; 77 }; 78 79 /* 80 * It seems like reserving the old rmtfs_mem region is also needed to prevent 81 * random crashes which are most likely modem related, more testing needed. 82 */ 83 removed_region: memory@88f00000 { 84 no-map; 85 reg = <0 0x88f00000 0 0x1c00000>; 86 }; 87 88 ramoops: ramoops@ac300000 { 89 compatible = "ramoops"; 90 reg = <0 0xac300000 0 0x400000>; 91 record-size = <0x40000>; 92 console-size = <0x40000>; 93 ftrace-size = <0x40000>; 94 pmsg-size = <0x200000>; 95 ecc-size = <16>; 96 }; 97 }; 98 99 vph_pwr: vph-pwr-regulator { 100 compatible = "regulator-fixed"; 101 regulator-name = "vph_pwr"; 102 regulator-min-microvolt = <3700000>; 103 regulator-max-microvolt = <3700000>; 104 }; 105 106 /* 107 * Apparently RPMh does not provide support for PM8998 S4 because it 108 * is always-on; model it as a fixed regulator. 109 */ 110 vreg_s4a_1p8: pm8998-smps4 { 111 compatible = "regulator-fixed"; 112 regulator-name = "vreg_s4a_1p8"; 113 114 regulator-min-microvolt = <1800000>; 115 regulator-max-microvolt = <1800000>; 116 117 regulator-always-on; 118 regulator-boot-on; 119 120 vin-supply = <&vph_pwr>; 121 }; 122 123 /* 124 * The touchscreen regulator seems to be controlled somehow by a gpio. 125 * Model it as a fixed regulator and keep it on. Without schematics we 126 * don't know how this is actually wired up... 127 */ 128 ts_1p8_supply: ts-1p8-regulator { 129 compatible = "regulator-fixed"; 130 regulator-name = "ts_1p8_supply"; 131 132 regulator-min-microvolt = <1800000>; 133 regulator-max-microvolt = <1800000>; 134 135 gpio = <&tlmm 88 0>; 136 enable-active-high; 137 regulator-boot-on; 138 }; 139}; 140 141&adsp_pas { 142 status = "okay"; 143 firmware-name = "qcom/sdm845/oneplus6/adsp.mbn"; 144}; 145 146&apps_rsc { 147 pm8998-rpmh-regulators { 148 compatible = "qcom,pm8998-rpmh-regulators"; 149 qcom,pmic-id = "a"; 150 151 vdd-s1-supply = <&vph_pwr>; 152 vdd-s2-supply = <&vph_pwr>; 153 vdd-s3-supply = <&vph_pwr>; 154 vdd-s4-supply = <&vph_pwr>; 155 vdd-s5-supply = <&vph_pwr>; 156 vdd-s6-supply = <&vph_pwr>; 157 vdd-s7-supply = <&vph_pwr>; 158 vdd-s8-supply = <&vph_pwr>; 159 vdd-s9-supply = <&vph_pwr>; 160 vdd-s10-supply = <&vph_pwr>; 161 vdd-s11-supply = <&vph_pwr>; 162 vdd-s12-supply = <&vph_pwr>; 163 vdd-s13-supply = <&vph_pwr>; 164 vdd-l1-l27-supply = <&vreg_s7a_1p025>; 165 vdd-l2-l8-l17-supply = <&vreg_s3a_1p35>; 166 vdd-l3-l11-supply = <&vreg_s7a_1p025>; 167 vdd-l4-l5-supply = <&vreg_s7a_1p025>; 168 vdd-l6-supply = <&vph_pwr>; 169 vdd-l7-l12-l14-l15-supply = <&vreg_s5a_2p04>; 170 vdd-l9-supply = <&vreg_bob>; 171 vdd-l10-l23-l25-supply = <&vreg_bob>; 172 vdd-l13-l19-l21-supply = <&vreg_bob>; 173 vdd-l16-l28-supply = <&vreg_bob>; 174 vdd-l18-l22-supply = <&vreg_bob>; 175 vdd-l20-l24-supply = <&vreg_bob>; 176 vdd-l26-supply = <&vreg_s3a_1p35>; 177 vin-lvs-1-2-supply = <&vreg_s4a_1p8>; 178 179 vreg_s3a_1p35: smps3 { 180 regulator-min-microvolt = <1352000>; 181 regulator-max-microvolt = <1352000>; 182 }; 183 184 vreg_s5a_2p04: smps5 { 185 regulator-min-microvolt = <1904000>; 186 regulator-max-microvolt = <2040000>; 187 }; 188 189 vreg_s7a_1p025: smps7 { 190 regulator-min-microvolt = <900000>; 191 regulator-max-microvolt = <1028000>; 192 }; 193 194 vdda_mipi_dsi0_pll: 195 vdda_qlink_lv: 196 vdda_ufs1_core: 197 vdda_usb1_ss_core: 198 vreg_l1a_0p875: ldo1 { 199 regulator-min-microvolt = <880000>; 200 regulator-max-microvolt = <880000>; 201 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 202 }; 203 204 vreg_l2a_1p2: ldo2 { 205 regulator-min-microvolt = <1200000>; 206 regulator-max-microvolt = <1200000>; 207 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 208 regulator-always-on; 209 }; 210 211 vreg_l5a_0p8: ldo5 { 212 regulator-min-microvolt = <800000>; 213 regulator-max-microvolt = <800000>; 214 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 215 }; 216 217 vreg_l7a_1p8: ldo7 { 218 regulator-min-microvolt = <1800000>; 219 regulator-max-microvolt = <1800000>; 220 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 221 }; 222 223 vdda_qusb_hs0_1p8: 224 vreg_l12a_1p8: ldo12 { 225 regulator-min-microvolt = <1800000>; 226 regulator-max-microvolt = <1800000>; 227 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 228 }; 229 230 vreg_l14a_1p88: ldo14 { 231 regulator-min-microvolt = <1800000>; 232 regulator-max-microvolt = <1800000>; 233 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 234 regulator-always-on; 235 }; 236 237 vreg_l17a_1p3: ldo17 { 238 regulator-min-microvolt = <1304000>; 239 regulator-max-microvolt = <1304000>; 240 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 241 }; 242 243 vreg_l20a_2p95: ldo20 { 244 regulator-min-microvolt = <2704000>; 245 regulator-max-microvolt = <2960000>; 246 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 247 }; 248 249 vreg_l23a_3p3: ldo23 { 250 regulator-min-microvolt = <3300000>; 251 regulator-max-microvolt = <3312000>; 252 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 253 }; 254 255 vdda_qusb_hs0_3p1: 256 vreg_l24a_3p075: ldo24 { 257 regulator-min-microvolt = <3088000>; 258 regulator-max-microvolt = <3088000>; 259 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 260 }; 261 262 vreg_l25a_3p3: ldo25 { 263 regulator-min-microvolt = <3300000>; 264 regulator-max-microvolt = <3312000>; 265 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 266 }; 267 268 vdda_mipi_dsi0_1p2: 269 vdda_ufs1_1p2: 270 vreg_l26a_1p2: ldo26 { 271 regulator-min-microvolt = <1200000>; 272 regulator-max-microvolt = <1200000>; 273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 274 }; 275 276 vreg_l28a_3p0: ldo28 { 277 regulator-min-microvolt = <2856000>; 278 regulator-max-microvolt = <3008000>; 279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>; 280 }; 281 }; 282 283 pmi8998-rpmh-regulators { 284 compatible = "qcom,pmi8998-rpmh-regulators"; 285 qcom,pmic-id = "b"; 286 287 vdd-bob-supply = <&vph_pwr>; 288 289 vreg_bob: bob { 290 regulator-min-microvolt = <3312000>; 291 regulator-max-microvolt = <3600000>; 292 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>; 293 regulator-allow-bypass; 294 }; 295 }; 296 297 pm8005-rpmh-regulators { 298 compatible = "qcom,pm8005-rpmh-regulators"; 299 qcom,pmic-id = "c"; 300 301 vdd-s1-supply = <&vph_pwr>; 302 vdd-s2-supply = <&vph_pwr>; 303 vdd-s3-supply = <&vph_pwr>; 304 vdd-s4-supply = <&vph_pwr>; 305 306 vreg_s3c_0p6: smps3 { 307 regulator-min-microvolt = <600000>; 308 regulator-max-microvolt = <600000>; 309 }; 310 }; 311}; 312 313&cdsp_pas { 314 status = "okay"; 315 firmware-name = "qcom/sdm845/oneplus6/cdsp.mbn"; 316}; 317 318&dsi0 { 319 status = "okay"; 320 vdda-supply = <&vdda_mipi_dsi0_1p2>; 321 322 /* 323 * Both devices use different panels but all other properties 324 * are common. Compatible line is declared in device dts. 325 */ 326 display_panel: panel@0 { 327 status = "disabled"; 328 329 #address-cells = <1>; 330 #size-cells = <0>; 331 reg = <0>; 332 333 vddio-supply = <&vreg_l14a_1p88>; 334 335 reset-gpios = <&tlmm 6 GPIO_ACTIVE_LOW>; 336 337 pinctrl-names = "default"; 338 pinctrl-0 = <&panel_reset_pins &panel_te_pin &panel_esd_pin>; 339 340 port { 341 panel_in: endpoint { 342 remote-endpoint = <&dsi0_out>; 343 }; 344 }; 345 }; 346}; 347 348&dsi0_out { 349 remote-endpoint = <&panel_in>; 350 data-lanes = <0 1 2 3>; 351}; 352 353&dsi0_phy { 354 status = "okay"; 355 vdds-supply = <&vdda_mipi_dsi0_pll>; 356}; 357 358&gcc { 359 protected-clocks = <GCC_QSPI_CORE_CLK>, 360 <GCC_QSPI_CORE_CLK_SRC>, 361 <GCC_QSPI_CNOC_PERIPH_AHB_CLK>, 362 <GCC_LPASS_Q6_AXI_CLK>, 363 <GCC_LPASS_SWAY_CLK>; 364}; 365 366&gmu { 367 status = "okay"; 368}; 369 370&gpu { 371 status = "okay"; 372 373 zap-shader { 374 memory-region = <&gpu_mem>; 375 firmware-name = "qcom/sdm845/oneplus6/a630_zap.mbn"; 376 }; 377}; 378 379&i2c12 { 380 status = "okay"; 381 clock-frequency = <400000>; 382 383 synaptics-rmi4-i2c@20 { 384 compatible = "syna,rmi4-i2c"; 385 reg = <0x20>; 386 #address-cells = <1>; 387 #size-cells = <0>; 388 interrupts-extended = <&tlmm 125 IRQ_TYPE_EDGE_FALLING>; 389 390 pinctrl-names = "default"; 391 pinctrl-0 = <&ts_default_pins>; 392 393 vdd-supply = <&vreg_l28a_3p0>; 394 vio-supply = <&ts_1p8_supply>; 395 396 syna,reset-delay-ms = <200>; 397 syna,startup-delay-ms = <200>; 398 399 rmi4-f01@1 { 400 reg = <0x01>; 401 syna,nosleep-mode = <1>; 402 }; 403 404 rmi4_f12: rmi4-f12@12 { 405 reg = <0x12>; 406 touchscreen-x-mm = <68>; 407 touchscreen-y-mm = <144>; 408 syna,sensor-type = <1>; 409 syna,rezero-wait-ms = <200>; 410 }; 411 }; 412}; 413 414&ipa { 415 status = "okay"; 416 417 memory-region = <&ipa_fw_mem>; 418 firmware-name = "qcom/sdm845/oneplus6/ipa_fws.mbn"; 419}; 420 421&mdss { 422 status = "okay"; 423}; 424 425/* Modem/wifi*/ 426&mss_pil { 427 status = "okay"; 428 firmware-name = "qcom/sdm845/oneplus6/mba.mbn", "qcom/sdm845/oneplus6/modem.mbn"; 429}; 430 431&pm8998_gpio { 432 volume_down_gpio: pm8998_gpio5 { 433 pinconf { 434 pins = "gpio5"; 435 function = "normal"; 436 input-enable; 437 bias-pull-up; 438 qcom,drive-strength = <0>; 439 }; 440 }; 441 442 volume_up_gpio: pm8998_gpio6 { 443 pinconf { 444 pins = "gpio6"; 445 function = "normal"; 446 input-enable; 447 bias-pull-up; 448 qcom,drive-strength = <0>; 449 }; 450 }; 451}; 452 453&qupv3_id_1 { 454 status = "okay"; 455}; 456 457&qupv3_id_0 { 458 status = "okay"; 459}; 460 461&qup_i2c12_default { 462 mux { 463 pins = "gpio49", "gpio50"; 464 function = "qup12"; 465 drive-strength = <2>; 466 bias-disable; 467 }; 468}; 469 470&qup_i2c10_default { 471 pinconf { 472 pins = "gpio55", "gpio56"; 473 drive-strength = <2>; 474 bias-disable; 475 }; 476}; 477 478&qup_uart9_default { 479 pinconf-tx { 480 pins = "gpio4"; 481 drive-strength = <2>; 482 bias-disable; 483 }; 484 485 pinconf-rx { 486 pins = "gpio5"; 487 drive-strength = <2>; 488 bias-pull-up; 489 }; 490}; 491 492/* 493 * Prevent garbage data on bluetooth UART lines 494 */ 495&qup_uart6_default { 496 pinmux { 497 pins = "gpio45", "gpio46", "gpio47", "gpio48"; 498 function = "qup6"; 499 }; 500 501 cts { 502 pins = "gpio45"; 503 bias-pull-down; 504 }; 505 506 rts-tx { 507 pins = "gpio46", "gpio47"; 508 drive-strength = <2>; 509 bias-disable; 510 }; 511 512 rx { 513 pins = "gpio48"; 514 bias-pull-up; 515 }; 516}; 517 518&uart6 { 519 status = "okay"; 520 521 bluetooth { 522 compatible = "qcom,wcn3990-bt"; 523 524 /* 525 * This path is relative to the qca/ 526 * subdir under lib/firmware. 527 */ 528 firmware-name = "oneplus6/crnv21.bin"; 529 530 vddio-supply = <&vreg_s4a_1p8>; 531 vddxo-supply = <&vreg_l7a_1p8>; 532 vddrf-supply = <&vreg_l17a_1p3>; 533 vddch0-supply = <&vreg_l25a_3p3>; 534 max-speed = <3200000>; 535 }; 536}; 537 538&uart9 { 539 label = "LS-UART1"; 540 status = "okay"; 541}; 542 543&ufs_mem_hc { 544 status = "okay"; 545 546 reset-gpios = <&tlmm 150 GPIO_ACTIVE_LOW>; 547 548 vcc-supply = <&vreg_l20a_2p95>; 549 vcc-max-microamp = <600000>; 550}; 551 552&ufs_mem_phy { 553 status = "okay"; 554 555 vdda-phy-supply = <&vdda_ufs1_core>; 556 vdda-pll-supply = <&vdda_ufs1_1p2>; 557}; 558 559&usb_1 { 560 status = "okay"; 561 562 /* 563 * disable USB3 clock requirement as the device only supports 564 * USB2. 565 */ 566 qcom,select-utmi-as-pipe-clk; 567}; 568 569&usb_1_dwc3 { 570 /* 571 * We don't have the capability to switch modes yet. 572 */ 573 dr_mode = "peripheral"; 574 575 /* fastest mode for USB 2 */ 576 maximum-speed = "high-speed"; 577 578 /* Remove USB3 phy as it's unused on this device. */ 579 phys = <&usb_1_hsphy>; 580 phy-names = "usb2-phy"; 581}; 582 583&usb_1_hsphy { 584 status = "okay"; 585 586 vdd-supply = <&vdda_usb1_ss_core>; 587 vdda-pll-supply = <&vdda_qusb_hs0_1p8>; 588 vdda-phy-dpdm-supply = <&vdda_qusb_hs0_3p1>; 589 590 qcom,imp-res-offset-value = <8>; 591 qcom,hstx-trim-value = <QUSB2_V2_HSTX_TRIM_21_6_MA>; 592 qcom,preemphasis-level = <QUSB2_V2_PREEMPHASIS_5_PERCENT>; 593 qcom,preemphasis-width = <QUSB2_V2_PREEMPHASIS_WIDTH_HALF_BIT>; 594}; 595 596&tlmm { 597 gpio-reserved-ranges = <0 4>, <81 4>; 598 599 tri_state_key_default: tri_state_key_default { 600 mux { 601 pins = "gpio40", "gpio42", "gpio26"; 602 function = "gpio"; 603 drive-strength = <2>; 604 bias-disable; 605 }; 606 }; 607 608 ts_default_pins: ts-int { 609 mux { 610 pins = "gpio99", "gpio125"; 611 function = "gpio"; 612 drive-strength = <16>; 613 bias-pull-up; 614 }; 615 }; 616 617 panel_reset_pins: panel-reset { 618 mux { 619 pins = "gpio6", "gpio25", "gpio26"; 620 function = "gpio"; 621 drive-strength = <8>; 622 bias-disable = <0>; 623 }; 624 }; 625 626 panel_te_pin: panel-te { 627 mux { 628 pins = "gpio10"; 629 function = "mdp_vsync"; 630 drive-strength = <2>; 631 bias-disable; 632 input-enable; 633 }; 634 }; 635 636 panel_esd_pin: panel-esd { 637 mux { 638 pins = "gpio30"; 639 function = "gpio"; 640 drive-strength = <2>; 641 bias-pull-down; 642 input-enable; 643 }; 644 }; 645}; 646 647&venus { 648 status = "okay"; 649}; 650 651&wifi { 652 status = "okay"; 653 vdd-0.8-cx-mx-supply = <&vreg_l5a_0p8>; 654 vdd-1.8-xo-supply = <&vreg_l7a_1p8>; 655 vdd-1.3-rfa-supply = <&vreg_l17a_1p3>; 656 vdd-3.3-ch0-supply = <&vreg_l25a_3p3>; 657 vdd-3.3-ch1-supply = <&vreg_l23a_3p3>; 658 659 qcom,snoc-host-cap-8bit-quirk; 660}; 661