1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Herobrine baseboard device tree source 4 * 5 * The set of things in this file is a bit loosely defined. It's roughly 6 * defined as the set of things that the child boards happen to have in 7 * common. Since all of the child boards started from the same original 8 * design this is hopefully a large set of things but as more derivatives 9 * appear things may "bubble down" out of this file. For things that are 10 * part of the reference design but might not exist on child nodes we will 11 * follow the lead of the SoC dtsi files and leave their status as "disabled". 12 * 13 * Copyright 2022 Google LLC. 14 */ 15 16#include <dt-bindings/input/gpio-keys.h> 17#include <dt-bindings/input/input.h> 18#include <dt-bindings/leds/common.h> 19 20#include "sc7280-qcard.dtsi" 21#include "sc7280-chrome-common.dtsi" 22 23/ { 24 chosen { 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 /* 29 * FIXED REGULATORS 30 * 31 * Sort order: 32 * 1. parents above children. 33 * 2. higher voltage above lower voltage. 34 * 3. alphabetically by node name. 35 */ 36 37 /* This is the top level supply and variable voltage */ 38 ppvar_sys: ppvar-sys-regulator { 39 compatible = "regulator-fixed"; 40 regulator-name = "ppvar_sys"; 41 regulator-always-on; 42 regulator-boot-on; 43 }; 44 45 /* This divides ppvar_sys by 2, so voltage is variable */ 46 src_vph_pwr: src-vph-pwr-regulator { 47 compatible = "regulator-fixed"; 48 regulator-name = "src_vph_pwr"; 49 50 /* EC turns on with switchcap_on; always on for AP */ 51 regulator-always-on; 52 regulator-boot-on; 53 54 vin-supply = <&ppvar_sys>; 55 }; 56 57 pp5000_s5: pp5000-s5-regulator { 58 compatible = "regulator-fixed"; 59 regulator-name = "pp5000_s5"; 60 61 /* EC turns on with en_pp5000_s5; always on for AP */ 62 regulator-always-on; 63 regulator-boot-on; 64 regulator-min-microvolt = <5000000>; 65 regulator-max-microvolt = <5000000>; 66 67 vin-supply = <&ppvar_sys>; 68 }; 69 70 pp3300_z1: pp3300-z1-regulator { 71 compatible = "regulator-fixed"; 72 regulator-name = "pp3300_z1"; 73 74 /* EC turns on with en_pp3300_z1; always on for AP */ 75 regulator-always-on; 76 regulator-boot-on; 77 regulator-min-microvolt = <3300000>; 78 regulator-max-microvolt = <3300000>; 79 80 vin-supply = <&ppvar_sys>; 81 }; 82 83 pp3300_codec: pp3300-codec-regulator { 84 compatible = "regulator-fixed"; 85 regulator-name = "pp3300_codec"; 86 87 regulator-min-microvolt = <3300000>; 88 regulator-max-microvolt = <3300000>; 89 90 gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>; 91 enable-active-high; 92 pinctrl-names = "default"; 93 pinctrl-0 = <&en_pp3300_codec>; 94 95 vin-supply = <&pp3300_z1>; 96 status = "disabled"; 97 }; 98 99 pp3300_left_in_mlb: pp3300-left-in-mlb-regulator { 100 compatible = "regulator-fixed"; 101 regulator-name = "pp3300_left_in_mlb"; 102 103 regulator-min-microvolt = <3300000>; 104 regulator-max-microvolt = <3300000>; 105 106 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>; 107 enable-active-high; 108 pinctrl-names = "default"; 109 pinctrl-0 = <&en_pp3300_dx_edp>; 110 111 vin-supply = <&pp3300_z1>; 112 }; 113 114 pp3300_mcu_fp: 115 pp3300_fp_ls: 116 pp3300_fp_mcu: pp3300-fp-regulator { 117 compatible = "regulator-fixed"; 118 regulator-name = "pp3300_fp"; 119 120 regulator-min-microvolt = <3300000>; 121 regulator-max-microvolt = <3300000>; 122 123 regulator-boot-on; 124 regulator-always-on; 125 126 /* 127 * WARNING: it is intentional that GPIO 77 isn't listed here. 128 * The userspace script for updating the fingerprint firmware 129 * needs to control the FP regulators during a FW update, 130 * hence the signal can't be owned by the kernel regulator. 131 */ 132 133 pinctrl-names = "default"; 134 pinctrl-0 = <&en_fp_rails>; 135 136 vin-supply = <&pp3300_z1>; 137 status = "disabled"; 138 }; 139 140 pp3300_hub: pp3300-hub-regulator { 141 compatible = "regulator-fixed"; 142 regulator-name = "pp3300_hub"; 143 144 regulator-min-microvolt = <3300000>; 145 regulator-max-microvolt = <3300000>; 146 147 regulator-boot-on; 148 regulator-always-on; 149 150 gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>; 151 enable-active-high; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&hub_en>; 154 155 vin-supply = <&pp3300_z1>; 156 }; 157 158 pp3300_tp: pp3300-tp-regulator { 159 compatible = "regulator-fixed"; 160 regulator-name = "pp3300_tp"; 161 162 regulator-min-microvolt = <3300000>; 163 regulator-max-microvolt = <3300000>; 164 165 /* AP turns on with PP1800_L18B_S0; always on for AP */ 166 regulator-always-on; 167 regulator-boot-on; 168 169 vin-supply = <&pp3300_z1>; 170 }; 171 172 pp3300_ssd: pp3300-ssd-regulator { 173 compatible = "regulator-fixed"; 174 regulator-name = "pp3300_ssd"; 175 176 regulator-min-microvolt = <3300000>; 177 regulator-max-microvolt = <3300000>; 178 179 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; 180 enable-active-high; 181 pinctrl-names = "default"; 182 pinctrl-0 = <&ssd_en>; 183 184 /* 185 * The bootloaer may have left PCIe configured. Powering this 186 * off while the PCIe clocks are still running isn't great, 187 * so it's better to default to this regulator being on. 188 */ 189 regulator-boot-on; 190 191 vin-supply = <&pp3300_z1>; 192 }; 193 194 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator { 195 compatible = "regulator-fixed"; 196 regulator-name = "pp2850_vcm_wf_cam"; 197 198 regulator-min-microvolt = <2850000>; 199 regulator-max-microvolt = <2850000>; 200 201 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 202 enable-active-high; 203 pinctrl-names = "default"; 204 pinctrl-0 = <&wf_cam_en>; 205 206 vin-supply = <&pp3300_z1>; 207 status = "disabled"; 208 }; 209 210 pp2850_wf_cam: pp2850-wf-cam-regulator { 211 compatible = "regulator-fixed"; 212 regulator-name = "pp2850_wf_cam"; 213 214 regulator-min-microvolt = <2850000>; 215 regulator-max-microvolt = <2850000>; 216 217 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 218 enable-active-high; 219 /* 220 * The pinconf can only be referenced once so we put it on the 221 * first regulator and comment it out here. 222 * 223 * pinctrl-names = "default"; 224 * pinctrl-0 = <&wf_cam_en>; 225 */ 226 227 vin-supply = <&pp3300_z1>; 228 status = "disabled"; 229 }; 230 231 pp1800_fp: pp1800-fp-regulator { 232 compatible = "regulator-fixed"; 233 regulator-name = "pp1800_fp"; 234 235 regulator-min-microvolt = <1800000>; 236 regulator-max-microvolt = <1800000>; 237 238 regulator-boot-on; 239 regulator-always-on; 240 241 /* 242 * WARNING: it is intentional that GPIO 77 isn't listed here. 243 * The userspace script for updating the fingerprint firmware 244 * needs to control the FP regulators during a FW update, 245 * hence the signal can't be owned by the kernel regulator. 246 */ 247 248 pinctrl-names = "default"; 249 pinctrl-0 = <&en_fp_rails>; 250 251 vin-supply = <&pp1800_l18b_s0>; 252 status = "disabled"; 253 }; 254 255 pp1800_wf_cam: pp1800-wf-cam-regulator { 256 compatible = "regulator-fixed"; 257 regulator-name = "pp1800_wf_cam"; 258 259 regulator-min-microvolt = <1800000>; 260 regulator-max-microvolt = <1800000>; 261 262 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 263 enable-active-high; 264 /* 265 * The pinconf can only be referenced once so we put it on the 266 * first regulator and comment it out here. 267 * 268 * pinctrl-names = "default"; 269 * pinctrl-0 = <&wf_cam_en>; 270 */ 271 272 vin-supply = <&vreg_l19b_s0>; 273 status = "disabled"; 274 }; 275 276 pp1200_wf_cam: pp1200-wf-cam-regulator { 277 compatible = "regulator-fixed"; 278 regulator-name = "pp1200_wf_cam"; 279 280 regulator-min-microvolt = <1200000>; 281 regulator-max-microvolt = <1200000>; 282 283 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 284 enable-active-high; 285 /* 286 * The pinconf can only be referenced once so we put it on the 287 * first regulator and comment it out here. 288 * 289 * pinctrl-names = "default"; 290 * pinctrl-0 = <&wf_cam_en>; 291 */ 292 293 vin-supply = <&pp3300_z1>; 294 status = "disabled"; 295 }; 296 297 /* BOARD-SPECIFIC TOP LEVEL NODES */ 298 299 pwmleds: pwmleds { 300 compatible = "pwm-leds"; 301 status = "disabled"; 302 keyboard_backlight: keyboard-backlight { 303 label = "cros_ec::kbd_backlight"; 304 function = LED_FUNCTION_KBD_BACKLIGHT; 305 pwms = <&cros_ec_pwm 0>; 306 max-brightness = <1023>; 307 }; 308 }; 309}; 310 311/* 312 * ADJUSTMENTS TO QCARD REGULATORS 313 * 314 * Mostly this is just board-local names for regulators that come from 315 * Qcard, but this also has some minor regulator overrides. 316 * 317 * Names are only listed here if regulators go somewhere other than a 318 * testpoint. 319 */ 320 321/* From Qcard to our board; ordered by PMIC-ID / rail number */ 322 323pp1256_s8b: &vreg_s8b_1p256 {}; 324 325pp1800_l18b_s0: &vreg_l18b_1p8 {}; 326pp1800_l18b: &vreg_l18b_1p8 {}; 327 328vreg_l19b_s0: &vreg_l19b_1p8 {}; 329 330pp1800_alc5682: &vreg_l2c_1p8 {}; 331pp1800_l2c: &vreg_l2c_1p8 {}; 332 333vreg_l4c: &vreg_l4c_1p8_3p0 {}; 334 335ppvar_l6c: &vreg_l6c_2p96 {}; 336 337pp3000_l7c: &vreg_l7c_3p0 {}; 338 339pp1800_prox: &vreg_l8c_1p8 {}; 340pp1800_l8c: &vreg_l8c_1p8 {}; 341 342pp2950_l9c: &vreg_l9c_2p96 {}; 343 344pp1800_lcm: &vreg_l12c_1p8 {}; 345pp1800_mipi: &vreg_l12c_1p8 {}; 346pp1800_l12c: &vreg_l12c_1p8 {}; 347 348pp3300_lcm: &vreg_l13c_3p0 {}; 349pp3300_mipi: &vreg_l13c_3p0 {}; 350pp3300_l13c: &vreg_l13c_3p0 {}; 351 352/* From our board to Qcard; ordered same as node definition above */ 353 354vreg_edp_bl: &ppvar_sys {}; 355 356ts_avdd: &pp3300_left_in_mlb {}; 357vreg_edp_3p3: &pp3300_left_in_mlb {}; 358 359/* Regulator overrides from Qcard */ 360 361/* 362 * Herobrine boards only use l2c to power an external audio codec (like 363 * alc5682) and we want that to be at 1.8V, not at some slightly lower voltage. 364 */ 365&vreg_l2c_1p8 { 366 regulator-min-microvolt = <1800000>; 367}; 368 369/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 370 371&edp_panel { 372 /* Our board provides power to the qcard for the eDP panel. */ 373 power-supply = <&vreg_edp_3p3>; 374}; 375 376ap_sar_sensor_i2c: &i2c1 { 377 clock-frequency = <400000>; 378 status = "disabled"; 379 380 ap_sar_sensor0: proximity@28 { 381 compatible = "semtech,sx9324"; 382 reg = <0x28>; 383 #io-channel-cells = <1>; 384 pinctrl-names = "default"; 385 pinctrl-0 = <&sar0_irq_odl>; 386 387 interrupt-parent = <&tlmm>; 388 interrupts = <141 IRQ_TYPE_LEVEL_LOW>; 389 390 vdd-supply = <&pp1800_prox>; 391 392 label = "proximity-wifi_cellular-0"; 393 status = "disabled"; 394 }; 395 396 ap_sar_sensor1: proximity@2c { 397 compatible = "semtech,sx9324"; 398 reg = <0x2c>; 399 #io-channel-cells = <1>; 400 pinctrl-names = "default"; 401 pinctrl-0 = <&sar1_irq_odl>; 402 403 interrupt-parent = <&tlmm>; 404 interrupts = <140 IRQ_TYPE_LEVEL_LOW>; 405 406 vdd-supply = <&pp1800_prox>; 407 408 label = "proximity-wifi_cellular-1"; 409 status = "disabled"; 410 }; 411}; 412 413ap_i2c_tpm: &i2c14 { 414 status = "okay"; 415 clock-frequency = <400000>; 416 417 tpm@50 { 418 compatible = "google,cr50"; 419 reg = <0x50>; 420 421 pinctrl-names = "default"; 422 pinctrl-0 = <&gsc_ap_int_odl>; 423 424 interrupt-parent = <&tlmm>; 425 interrupts = <104 IRQ_TYPE_EDGE_RISING>; 426 }; 427}; 428 429&mdss { 430 status = "okay"; 431}; 432 433&mdss_dp { 434 status = "okay"; 435 pinctrl-names = "default"; 436 pinctrl-0 = <&dp_hot_plug_det>; 437 data-lanes = <0 1>; 438}; 439 440&mdss_mdp { 441 status = "okay"; 442}; 443 444/* NVMe drive, enabled on a per-board basis */ 445&pcie1 { 446 pinctrl-names = "default"; 447 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>; 448 449 perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>; 450 vddpe-3v3-supply = <&pp3300_ssd>; 451}; 452 453&pm8350c_pwm { 454 status = "okay"; 455}; 456 457&pm8350c_pwm_backlight { 458 status = "okay"; 459 460 /* Our board provides power to the qcard for the backlight */ 461 power-supply = <&vreg_edp_bl>; 462}; 463 464&pmk8350_rtc { 465 status = "disabled"; 466}; 467 468&qupv3_id_0 { 469 status = "okay"; 470}; 471 472&qupv3_id_1 { 473 status = "okay"; 474}; 475 476/* SD Card, enabled on a per-board basis */ 477&sdhc_2 { 478 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>; 479 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>; 480 481 vmmc-supply = <&pp2950_l9c>; 482 vqmmc-supply = <&ppvar_l6c>; 483 484 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 485}; 486 487&spi_flash { 488 spi-max-frequency = <50000000>; 489}; 490 491/* Fingerprint, enabled on a per-board basis */ 492ap_spi_fp: &spi9 { 493 pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>; 494 495 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; 496 497 cros_ec_fp: ec@0 { 498 compatible = "google,cros-ec-spi"; 499 reg = <0>; 500 interrupt-parent = <&tlmm>; 501 interrupts = <61 IRQ_TYPE_LEVEL_LOW>; 502 pinctrl-names = "default"; 503 pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>; 504 spi-max-frequency = <3000000>; 505 }; 506}; 507 508ap_ec_spi: &spi10 { 509 status = "okay"; 510 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>; 511 512 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; 513 514 cros_ec: ec@0 { 515 compatible = "google,cros-ec-spi"; 516 reg = <0>; 517 interrupt-parent = <&tlmm>; 518 interrupts = <18 IRQ_TYPE_LEVEL_LOW>; 519 pinctrl-names = "default"; 520 pinctrl-0 = <&ap_ec_int_l>; 521 spi-max-frequency = <3000000>; 522 523 cros_ec_pwm: pwm { 524 compatible = "google,cros-ec-pwm"; 525 #pwm-cells = <1>; 526 }; 527 528 i2c_tunnel: i2c-tunnel { 529 compatible = "google,cros-ec-i2c-tunnel"; 530 google,remote-bus = <0>; 531 #address-cells = <1>; 532 #size-cells = <0>; 533 }; 534 535 typec { 536 compatible = "google,cros-ec-typec"; 537 #address-cells = <1>; 538 #size-cells = <0>; 539 540 usb_c0: connector@0 { 541 compatible = "usb-c-connector"; 542 reg = <0>; 543 label = "left"; 544 power-role = "dual"; 545 data-role = "host"; 546 try-power-role = "source"; 547 }; 548 549 usb_c1: connector@1 { 550 compatible = "usb-c-connector"; 551 reg = <1>; 552 label = "right"; 553 power-role = "dual"; 554 data-role = "host"; 555 try-power-role = "source"; 556 }; 557 }; 558 }; 559}; 560 561#include <arm/cros-ec-keyboard.dtsi> 562#include <arm/cros-ec-sbs.dtsi> 563 564&keyboard_controller { 565 function-row-physmap = < 566 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 567 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 568 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 569 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 570 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 571 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 572 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 573 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 574 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 575 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 576 >; 577 linux,keymap = < 578 MATRIX_KEY(0x00, 0x02, KEY_BACK) 579 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 580 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 581 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 582 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 583 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 584 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 585 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 586 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 587 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 588 589 CROS_STD_MAIN_KEYMAP 590 >; 591}; 592 593&usb_1 { 594 status = "okay"; 595}; 596 597&usb_1_dwc3 { 598 dr_mode = "host"; 599}; 600 601&usb_1_hsphy { 602 status = "okay"; 603}; 604 605&usb_1_qmpphy { 606 status = "okay"; 607}; 608 609&usb_2 { 610 status = "okay"; 611}; 612 613&usb_2_dwc3 { 614 dr_mode = "host"; 615}; 616 617&usb_2_hsphy { 618 status = "okay"; 619}; 620 621/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 622 623&dp_hot_plug_det { 624 bias-disable; 625}; 626 627&pcie1_clkreq_n { 628 bias-pull-up; 629 drive-strength = <2>; 630}; 631 632&qspi_cs0 { 633 bias-disable; 634 drive-strength = <8>; 635}; 636 637&qspi_clk { 638 bias-disable; 639 drive-strength = <8>; 640}; 641 642&qspi_data01 { 643 /* High-Z when no transfers; nice to park the lines */ 644 bias-pull-up; 645 drive-strength = <8>; 646}; 647 648/* For ap_tp_i2c */ 649&qup_i2c0_data_clk { 650 /* Has external pull */ 651 bias-disable; 652 drive-strength = <2>; 653}; 654 655/* For ap_i2c_tpm */ 656&qup_i2c14_data_clk { 657 /* Has external pull */ 658 bias-disable; 659 drive-strength = <2>; 660}; 661 662/* For ap_spi_fp */ 663&qup_spi9_data_clk { 664 bias-disable; 665 drive-strength = <2>; 666}; 667 668/* For ap_spi_fp */ 669&qup_spi9_cs_gpio { 670 bias-disable; 671 drive-strength = <2>; 672}; 673 674/* For ap_ec_spi */ 675&qup_spi10_data_clk { 676 bias-disable; 677 drive-strength = <2>; 678}; 679 680/* For ap_ec_spi */ 681&qup_spi10_cs_gpio { 682 bias-disable; 683 drive-strength = <2>; 684}; 685 686/* For uart_dbg */ 687&qup_uart5_rx { 688 bias-pull-up; 689}; 690 691/* For uart_dbg */ 692&qup_uart5_tx { 693 bias-disable; 694 drive-strength = <2>; 695}; 696 697&sdc2_clk { 698 bias-disable; 699 drive-strength = <16>; 700}; 701 702&sdc2_cmd { 703 bias-pull-up; 704 drive-strength = <10>; 705}; 706 707&sdc2_data { 708 bias-pull-up; 709 drive-strength = <10>; 710}; 711 712/* PINCTRL - board-specific pinctrl */ 713 714&pm7325_gpios { 715 /* 716 * On a quick glance it might look like KYPD_VOL_UP_N is used, but 717 * that only passes through to a debug connector and not to the actual 718 * volume up key. 719 */ 720 status = "disabled"; /* No GPIOs are connected */ 721}; 722 723&pmk8350_gpios { 724 status = "disabled"; /* No GPIOs are connected */ 725}; 726 727&tlmm { 728 /* pinctrl settings for pins that have no real owners. */ 729 pinctrl-names = "default"; 730 pinctrl-0 = <&bios_flash_wp_od>; 731 732 amp_en: amp-en { 733 pins = "gpio63"; 734 function = "gpio"; 735 bias-disable; 736 drive-strength = <2>; 737 }; 738 739 ap_ec_int_l: ap-ec-int-l { 740 pins = "gpio18"; 741 function = "gpio"; 742 bias-pull-up; 743 }; 744 745 bios_flash_wp_od: bios-flash-wp-od { 746 pins = "gpio16"; 747 function = "gpio"; 748 /* Has external pull */ 749 bias-disable; 750 }; 751 752 en_fp_rails: en-fp-rails { 753 pins = "gpio77"; 754 function = "gpio"; 755 bias-disable; 756 drive-strength = <2>; 757 output-high; 758 }; 759 760 en_pp3300_codec: en-pp3300-codec { 761 pins = "gpio105"; 762 function = "gpio"; 763 bias-disable; 764 drive-strength = <2>; 765 }; 766 767 en_pp3300_dx_edp: en-pp3300-dx-edp { 768 pins = "gpio80"; 769 function = "gpio"; 770 bias-disable; 771 drive-strength = <2>; 772 }; 773 774 fp_rst_l: fp-rst-l { 775 pins = "gpio78"; 776 function = "gpio"; 777 bias-disable; 778 drive-strength = <2>; 779 }; 780 781 fp_to_ap_irq_l: fp-to-ap-irq-l { 782 pins = "gpio61"; 783 function = "gpio"; 784 /* Has external pullup */ 785 bias-disable; 786 }; 787 788 fpmcu_boot0: fpmcu-boot0 { 789 pins = "gpio68"; 790 function = "gpio"; 791 bias-disable; 792 }; 793 794 gsc_ap_int_odl: gsc-ap-int-odl { 795 pins = "gpio104"; 796 function = "gpio"; 797 bias-pull-up; 798 }; 799 800 hp_irq: hp-irq { 801 pins = "gpio101"; 802 function = "gpio"; 803 bias-pull-up; 804 }; 805 806 hub_en: hub-en { 807 pins = "gpio157"; 808 function = "gpio"; 809 bias-disable; 810 drive-strength = <2>; 811 }; 812 813 pe_wake_odl: pe-wake-odl { 814 pins = "gpio3"; 815 function = "gpio"; 816 /* Has external pull */ 817 bias-disable; 818 drive-strength = <2>; 819 }; 820 821 /* For ap_spi_fp */ 822 qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high { 823 pins = "gpio39"; 824 function = "gpio"; 825 output-high; 826 }; 827 828 /* For ap_ec_spi */ 829 qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high { 830 pins = "gpio43"; 831 function = "gpio"; 832 output-high; 833 }; 834 835 sar0_irq_odl: sar0-irq-odl { 836 pins = "gpio141"; 837 function = "gpio"; 838 bias-pull-up; 839 }; 840 841 sar1_irq_odl: sar1-irq-odl { 842 pins = "gpio140"; 843 function = "gpio"; 844 bias-pull-up; 845 }; 846 847 sd_cd_odl: sd-cd-odl { 848 pins = "gpio91"; 849 function = "gpio"; 850 bias-pull-up; 851 }; 852 853 ssd_en: ssd-en { 854 pins = "gpio51"; 855 function = "gpio"; 856 bias-disable; 857 drive-strength = <2>; 858 }; 859 860 ssd_rst_l: ssd-rst-l { 861 pins = "gpio2"; 862 function = "gpio"; 863 bias-disable; 864 drive-strength = <2>; 865 output-low; 866 }; 867 868 tp_int_odl: tp-int-odl { 869 pins = "gpio7"; 870 function = "gpio"; 871 /* Has external pullup */ 872 bias-disable; 873 }; 874 875 wf_cam_en: wf-cam-en { 876 pins = "gpio119"; 877 function = "gpio"; 878 /* Has external pulldown */ 879 bias-disable; 880 drive-strength = <2>; 881 }; 882}; 883