1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Herobrine baseboard device tree source 4 * 5 * The set of things in this file is a bit loosely defined. It's roughly 6 * defined as the set of things that the child boards happen to have in 7 * common. Since all of the child boards started from the same original 8 * design this is hopefully a large set of things but as more derivatives 9 * appear things may "bubble down" out of this file. For things that are 10 * part of the reference design but might not exist on child nodes we will 11 * follow the lead of the SoC dtsi files and leave their status as "disabled". 12 * 13 * Copyright 2022 Google LLC. 14 */ 15 16#include <dt-bindings/input/gpio-keys.h> 17#include <dt-bindings/input/input.h> 18 19#include "sc7280-qcard.dtsi" 20#include "sc7280-chrome-common.dtsi" 21 22/ { 23 chosen { 24 stdout-path = "serial0:115200n8"; 25 }; 26 27 /* 28 * FIXED REGULATORS 29 * 30 * Sort order: 31 * 1. parents above children. 32 * 2. higher voltage above lower voltage. 33 * 3. alphabetically by node name. 34 */ 35 36 /* This is the top level supply and variable voltage */ 37 ppvar_sys: ppvar-sys-regulator { 38 compatible = "regulator-fixed"; 39 regulator-name = "ppvar_sys"; 40 regulator-always-on; 41 regulator-boot-on; 42 }; 43 44 /* This divides ppvar_sys by 2, so voltage is variable */ 45 src_vph_pwr: src-vph-pwr-regulator { 46 compatible = "regulator-fixed"; 47 regulator-name = "src_vph_pwr"; 48 49 /* EC turns on with switchcap_on; always on for AP */ 50 regulator-always-on; 51 regulator-boot-on; 52 53 vin-supply = <&ppvar_sys>; 54 }; 55 56 pp5000_s5: pp5000-s5-regulator { 57 compatible = "regulator-fixed"; 58 regulator-name = "pp5000_s5"; 59 60 /* EC turns on with en_pp5000_s5; always on for AP */ 61 regulator-always-on; 62 regulator-boot-on; 63 regulator-min-microvolt = <5000000>; 64 regulator-max-microvolt = <5000000>; 65 66 vin-supply = <&ppvar_sys>; 67 }; 68 69 pp3300_z1: pp3300-z1-regulator { 70 compatible = "regulator-fixed"; 71 regulator-name = "pp3300_z1"; 72 73 /* EC turns on with en_pp3300_z1; always on for AP */ 74 regulator-always-on; 75 regulator-boot-on; 76 regulator-min-microvolt = <3300000>; 77 regulator-max-microvolt = <3300000>; 78 79 vin-supply = <&ppvar_sys>; 80 }; 81 82 pp3300_codec: pp3300-codec-regulator { 83 compatible = "regulator-fixed"; 84 regulator-name = "pp3300_codec"; 85 86 regulator-min-microvolt = <3300000>; 87 regulator-max-microvolt = <3300000>; 88 89 gpio = <&tlmm 105 GPIO_ACTIVE_HIGH>; 90 enable-active-high; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&en_pp3300_codec>; 93 94 vin-supply = <&pp3300_z1>; 95 }; 96 97 pp3300_left_in_mlb: pp3300-left-in-mlb-regulator { 98 compatible = "regulator-fixed"; 99 regulator-name = "pp3300_left_in_mlb"; 100 101 regulator-min-microvolt = <3300000>; 102 regulator-max-microvolt = <3300000>; 103 104 gpio = <&tlmm 80 GPIO_ACTIVE_HIGH>; 105 enable-active-high; 106 pinctrl-names = "default"; 107 pinctrl-0 = <&en_pp3300_dx_edp>; 108 109 vin-supply = <&pp3300_z1>; 110 }; 111 112 pp3300_mcu_fp: 113 pp3300_fp_ls: 114 pp3300_fp_mcu: pp3300-fp-regulator { 115 compatible = "regulator-fixed"; 116 regulator-name = "pp3300_fp"; 117 118 regulator-min-microvolt = <3300000>; 119 regulator-max-microvolt = <3300000>; 120 121 regulator-boot-on; 122 regulator-always-on; 123 124 /* 125 * WARNING: it is intentional that GPIO 77 isn't listed here. 126 * The userspace script for updating the fingerprint firmware 127 * needs to control the FP regulators during a FW update, 128 * hence the signal can't be owned by the kernel regulator. 129 */ 130 131 pinctrl-names = "default"; 132 pinctrl-0 = <&en_fp_rails>; 133 134 vin-supply = <&pp3300_z1>; 135 }; 136 137 pp3300_hub: pp3300-hub-regulator { 138 compatible = "regulator-fixed"; 139 regulator-name = "pp3300_hub"; 140 141 regulator-min-microvolt = <3300000>; 142 regulator-max-microvolt = <3300000>; 143 144 regulator-boot-on; 145 regulator-always-on; 146 147 gpio = <&tlmm 157 GPIO_ACTIVE_HIGH>; 148 enable-active-high; 149 pinctrl-names = "default"; 150 pinctrl-0 = <&hub_en>; 151 152 vin-supply = <&pp3300_z1>; 153 }; 154 155 pp3300_tp: pp3300-tp-regulator { 156 compatible = "regulator-fixed"; 157 regulator-name = "pp3300_tp"; 158 159 regulator-min-microvolt = <3300000>; 160 regulator-max-microvolt = <3300000>; 161 162 /* AP turns on with PP1800_L18B_S0; always on for AP */ 163 regulator-always-on; 164 regulator-boot-on; 165 166 vin-supply = <&pp3300_z1>; 167 }; 168 169 pp3300_ssd: pp3300-ssd-regulator { 170 compatible = "regulator-fixed"; 171 regulator-name = "pp3300_ssd"; 172 173 regulator-min-microvolt = <3300000>; 174 regulator-max-microvolt = <3300000>; 175 176 gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>; 177 enable-active-high; 178 pinctrl-names = "default"; 179 pinctrl-0 = <&ssd_en>; 180 181 vin-supply = <&pp3300_z1>; 182 }; 183 184 pp2850_vcm_wf_cam: pp2850-vcm-wf-cam-regulator { 185 compatible = "regulator-fixed"; 186 regulator-name = "pp2850_vcm_wf_cam"; 187 188 regulator-min-microvolt = <2850000>; 189 regulator-max-microvolt = <2850000>; 190 191 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 192 enable-active-high; 193 pinctrl-names = "default"; 194 pinctrl-0 = <&wf_cam_en>; 195 196 vin-supply = <&pp3300_z1>; 197 }; 198 199 pp2850_wf_cam: pp2850-wf-cam-regulator { 200 compatible = "regulator-fixed"; 201 regulator-name = "pp2850_wf_cam"; 202 203 regulator-min-microvolt = <2850000>; 204 regulator-max-microvolt = <2850000>; 205 206 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 207 enable-active-high; 208 /* 209 * The pinconf can only be referenced once so we put it on the 210 * first regulator and comment it out here. 211 * 212 * pinctrl-names = "default"; 213 * pinctrl-0 = <&wf_cam_en>; 214 */ 215 216 vin-supply = <&pp3300_z1>; 217 }; 218 219 pp1800_fp: pp1800-fp-regulator { 220 compatible = "regulator-fixed"; 221 regulator-name = "pp1800_fp"; 222 223 regulator-min-microvolt = <1800000>; 224 regulator-max-microvolt = <1800000>; 225 226 regulator-boot-on; 227 regulator-always-on; 228 229 /* 230 * WARNING: it is intentional that GPIO 77 isn't listed here. 231 * The userspace script for updating the fingerprint firmware 232 * needs to control the FP regulators during a FW update, 233 * hence the signal can't be owned by the kernel regulator. 234 */ 235 236 pinctrl-names = "default"; 237 pinctrl-0 = <&en_fp_rails>; 238 239 vin-supply = <&pp1800_l18b_s0>; 240 status = "disabled"; 241 }; 242 243 pp1800_wf_cam: pp1800-wf-cam-regulator { 244 compatible = "regulator-fixed"; 245 regulator-name = "pp1800_wf_cam"; 246 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvolt = <1800000>; 249 250 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 251 enable-active-high; 252 /* 253 * The pinconf can only be referenced once so we put it on the 254 * first regulator and comment it out here. 255 * 256 * pinctrl-names = "default"; 257 * pinctrl-0 = <&wf_cam_en>; 258 */ 259 260 vin-supply = <&vreg_l19b_s0>; 261 }; 262 263 pp1200_wf_cam: pp1200-wf-cam-regulator { 264 compatible = "regulator-fixed"; 265 regulator-name = "pp1200_wf_cam"; 266 267 regulator-min-microvolt = <1200000>; 268 regulator-max-microvolt = <1200000>; 269 270 gpio = <&tlmm 119 GPIO_ACTIVE_HIGH>; 271 enable-active-high; 272 /* 273 * The pinconf can only be referenced once so we put it on the 274 * first regulator and comment it out here. 275 * 276 * pinctrl-names = "default"; 277 * pinctrl-0 = <&wf_cam_en>; 278 */ 279 280 vin-supply = <&pp3300_z1>; 281 }; 282 283 /* BOARD-SPECIFIC TOP LEVEL NODES */ 284 285 pwmleds { 286 compatible = "pwm-leds"; 287 status = "disabled"; 288 keyboard_backlight: keyboard-backlight { 289 status = "disabled"; 290 label = "cros_ec::kbd_backlight"; 291 pwms = <&cros_ec_pwm 0>; 292 max-brightness = <1023>; 293 }; 294 }; 295}; 296 297/* 298 * BOARD-LOCAL NAMES FOR REGULATORS THAT CONNECT TO QCARD 299 * 300 * Names are only listed here if regulators go somewhere other than a 301 * testpoint. 302 */ 303 304/* From Qcard to our board; ordered by PMIC-ID / rail number */ 305 306pp1256_s8b: &vreg_s8b_1p256 {}; 307 308pp1800_l18b_s0: &vreg_l18b_1p8 {}; 309pp1800_l18b: &vreg_l18b_1p8 {}; 310 311vreg_l19b_s0: &vreg_l19b_1p8 {}; 312 313pp1800_alc5682: &vreg_l2c_1p8 {}; 314pp1800_l2c: &vreg_l2c_1p8 {}; 315 316vreg_l4c: &vreg_l4c_1p8_3p0 {}; 317 318ppvar_l6c: &vreg_l6c_2p96 {}; 319 320pp3000_l7c: &vreg_l7c_3p0 {}; 321 322pp1800_prox: &vreg_l8c_1p8 {}; 323pp1800_l8c: &vreg_l8c_1p8 {}; 324 325pp2950_l9c: &vreg_l9c_2p96 {}; 326 327pp1800_lcm: &vreg_l12c_1p8 {}; 328pp1800_mipi: &vreg_l12c_1p8 {}; 329pp1800_l12c: &vreg_l12c_1p8 {}; 330 331pp3300_lcm: &vreg_l13c_3p0 {}; 332pp3300_mipi: &vreg_l13c_3p0 {}; 333pp3300_l13c: &vreg_l13c_3p0 {}; 334 335/* From our board to Qcard; ordered same as node definition above */ 336 337vreg_edp_bl: &ppvar_sys {}; 338 339ts_avdd: &pp3300_left_in_mlb {}; 340vreg_edp_3p3: &pp3300_left_in_mlb {}; 341 342/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 343 344ap_i2c_tpm: &i2c14 { 345 status = "okay"; 346 clock-frequency = <400000>; 347 348 tpm@50 { 349 compatible = "google,cr50"; 350 reg = <0x50>; 351 352 pinctrl-names = "default"; 353 pinctrl-0 = <&gsc_ap_int_odl>; 354 355 interrupt-parent = <&tlmm>; 356 interrupts = <104 IRQ_TYPE_EDGE_RISING>; 357 }; 358}; 359 360/* NVMe drive, enabled on a per-board basis */ 361&pcie1 { 362 pinctrl-names = "default"; 363 pinctrl-0 = <&pcie1_clkreq_n>, <&ssd_rst_l>, <&pe_wake_odl>; 364 365 perst-gpio = <&tlmm 2 GPIO_ACTIVE_LOW>; 366 vddpe-3v3-supply = <&pp3300_ssd>; 367}; 368 369&pmk8350_rtc { 370 status = "disabled"; 371}; 372 373&qupv3_id_0 { 374 status = "okay"; 375}; 376 377&qupv3_id_1 { 378 status = "okay"; 379}; 380 381/* SD Card, enabled on a per-board basis */ 382&sdhc_2 { 383 pinctrl-0 = <&sdc2_clk>, <&sdc2_cmd>, <&sdc2_data>, <&sd_cd_odl>; 384 pinctrl-1 = <&sdc2_clk_sleep>, <&sdc2_cmd_sleep>, <&sdc2_data_sleep>, <&sd_cd_odl>; 385 386 vmmc-supply = <&pp2950_l9c>; 387 vqmmc-supply = <&ppvar_l6c>; 388 389 cd-gpios = <&tlmm 91 GPIO_ACTIVE_LOW>; 390}; 391 392/* Fingerprint, enabled on a per-board basis */ 393ap_spi_fp: &spi9 { 394 pinctrl-0 = <&qup_spi9_data_clk>, <&qup_spi9_cs_gpio_init_high>, <&qup_spi9_cs_gpio>; 395 396 cs-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>; 397 398 cros_ec_fp: ec@0 { 399 compatible = "google,cros-ec-spi"; 400 reg = <0>; 401 interrupt-parent = <&tlmm>; 402 interrupts = <61 IRQ_TYPE_LEVEL_LOW>; 403 pinctrl-names = "default"; 404 pinctrl-0 = <&fp_to_ap_irq_l>, <&fp_rst_l>, <&fpmcu_boot0>; 405 spi-max-frequency = <3000000>; 406 }; 407}; 408 409ap_ec_spi: &spi10 { 410 status = "okay"; 411 pinctrl-0 = <&qup_spi10_data_clk>, <&qup_spi10_cs_gpio_init_high>, <&qup_spi10_cs_gpio>; 412 413 cs-gpios = <&tlmm 43 GPIO_ACTIVE_LOW>; 414 415 cros_ec: ec@0 { 416 compatible = "google,cros-ec-spi"; 417 reg = <0>; 418 interrupt-parent = <&tlmm>; 419 interrupts = <18 IRQ_TYPE_LEVEL_LOW>; 420 pinctrl-names = "default"; 421 pinctrl-0 = <&ap_ec_int_l>; 422 spi-max-frequency = <3000000>; 423 424 cros_ec_pwm: pwm { 425 compatible = "google,cros-ec-pwm"; 426 #pwm-cells = <1>; 427 }; 428 429 i2c_tunnel: i2c-tunnel { 430 compatible = "google,cros-ec-i2c-tunnel"; 431 google,remote-bus = <0>; 432 #address-cells = <1>; 433 #size-cells = <0>; 434 }; 435 436 typec { 437 compatible = "google,cros-ec-typec"; 438 #address-cells = <1>; 439 #size-cells = <0>; 440 441 usb_c0: connector@0 { 442 compatible = "usb-c-connector"; 443 reg = <0>; 444 label = "left"; 445 power-role = "dual"; 446 data-role = "host"; 447 try-power-role = "source"; 448 }; 449 450 usb_c1: connector@1 { 451 compatible = "usb-c-connector"; 452 reg = <1>; 453 label = "right"; 454 power-role = "dual"; 455 data-role = "host"; 456 try-power-role = "source"; 457 }; 458 }; 459 }; 460}; 461 462#include <arm/cros-ec-keyboard.dtsi> 463#include <arm/cros-ec-sbs.dtsi> 464 465&keyboard_controller { 466 function-row-physmap = < 467 MATRIX_KEY(0x00, 0x02, 0) /* T1 */ 468 MATRIX_KEY(0x03, 0x02, 0) /* T2 */ 469 MATRIX_KEY(0x02, 0x02, 0) /* T3 */ 470 MATRIX_KEY(0x01, 0x02, 0) /* T4 */ 471 MATRIX_KEY(0x03, 0x04, 0) /* T5 */ 472 MATRIX_KEY(0x02, 0x04, 0) /* T6 */ 473 MATRIX_KEY(0x01, 0x04, 0) /* T7 */ 474 MATRIX_KEY(0x02, 0x09, 0) /* T8 */ 475 MATRIX_KEY(0x01, 0x09, 0) /* T9 */ 476 MATRIX_KEY(0x00, 0x04, 0) /* T10 */ 477 >; 478 linux,keymap = < 479 MATRIX_KEY(0x00, 0x02, KEY_BACK) 480 MATRIX_KEY(0x03, 0x02, KEY_REFRESH) 481 MATRIX_KEY(0x02, 0x02, KEY_ZOOM) 482 MATRIX_KEY(0x01, 0x02, KEY_SCALE) 483 MATRIX_KEY(0x03, 0x04, KEY_SYSRQ) 484 MATRIX_KEY(0x02, 0x04, KEY_BRIGHTNESSDOWN) 485 MATRIX_KEY(0x01, 0x04, KEY_BRIGHTNESSUP) 486 MATRIX_KEY(0x02, 0x09, KEY_MUTE) 487 MATRIX_KEY(0x01, 0x09, KEY_VOLUMEDOWN) 488 MATRIX_KEY(0x00, 0x04, KEY_VOLUMEUP) 489 490 CROS_STD_MAIN_KEYMAP 491 >; 492}; 493 494&usb_1 { 495 status = "okay"; 496}; 497 498&usb_1_dwc3 { 499 dr_mode = "host"; 500}; 501 502&usb_1_hsphy { 503 status = "okay"; 504}; 505 506&usb_1_qmpphy { 507 status = "okay"; 508}; 509 510&usb_2 { 511 status = "okay"; 512}; 513 514&usb_2_dwc3 { 515 dr_mode = "host"; 516}; 517 518&usb_2_hsphy { 519 status = "okay"; 520}; 521 522/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 523 524&dp_hot_plug_det { 525 bias-disable; 526}; 527 528&pcie1_clkreq_n { 529 bias-pull-up; 530 drive-strength = <2>; 531}; 532 533&qspi_cs0 { 534 bias-disable; 535 drive-strength = <8>; 536}; 537 538&qspi_clk { 539 bias-disable; 540 drive-strength = <8>; 541}; 542 543&qspi_data01 { 544 /* High-Z when no transfers; nice to park the lines */ 545 bias-pull-up; 546 drive-strength = <8>; 547}; 548 549/* For ap_tp_i2c */ 550&qup_i2c0_data_clk { 551 /* Has external pull */ 552 bias-disable; 553 drive-strength = <2>; 554}; 555 556/* For ap_i2c_tpm */ 557&qup_i2c14_data_clk { 558 /* Has external pull */ 559 bias-disable; 560 drive-strength = <2>; 561}; 562 563/* For ap_spi_fp */ 564&qup_spi9_data_clk { 565 bias-disable; 566 drive-strength = <2>; 567}; 568 569/* For ap_spi_fp */ 570&qup_spi9_cs_gpio { 571 bias-disable; 572 drive-strength = <2>; 573}; 574 575/* For ap_ec_spi */ 576&qup_spi10_data_clk { 577 bias-disable; 578 drive-strength = <2>; 579}; 580 581/* For ap_ec_spi */ 582&qup_spi10_cs_gpio { 583 bias-disable; 584 drive-strength = <2>; 585}; 586 587/* For uart_dbg */ 588&qup_uart5_rx { 589 bias-pull-up; 590}; 591 592/* For uart_dbg */ 593&qup_uart5_tx { 594 bias-disable; 595 drive-strength = <2>; 596}; 597 598&sdc2_clk { 599 bias-disable; 600 drive-strength = <16>; 601}; 602 603&sdc2_cmd { 604 bias-pull-up; 605 drive-strength = <10>; 606}; 607 608&sdc2_data { 609 bias-pull-up; 610 drive-strength = <10>; 611}; 612 613/* PINCTRL - board-specific pinctrl */ 614 615&pm7325_gpios { 616 /* 617 * On a quick glance it might look like KYPD_VOL_UP_N is used, but 618 * that only passes through to a debug connector and not to the actual 619 * volume up key. 620 */ 621 status = "disabled"; /* No GPIOs are connected */ 622}; 623 624&pmk8350_gpios { 625 status = "disabled"; /* No GPIOs are connected */ 626}; 627 628&tlmm { 629 /* pinctrl settings for pins that have no real owners. */ 630 pinctrl-names = "default"; 631 pinctrl-0 = <&bios_flash_wp_od>; 632 633 amp_en: amp-en { 634 pins = "gpio63"; 635 function = "gpio"; 636 bias-disable; 637 drive-strength = <2>; 638 }; 639 640 ap_ec_int_l: ap-ec-int-l { 641 pins = "gpio18"; 642 function = "gpio"; 643 bias-pull-up; 644 }; 645 646 bios_flash_wp_od: bios-flash-wp-od { 647 pins = "gpio16"; 648 function = "gpio"; 649 /* Has external pull */ 650 bias-disable; 651 }; 652 653 en_fp_rails: en-fp-rails { 654 pins = "gpio77"; 655 function = "gpio"; 656 bias-disable; 657 drive-strength = <2>; 658 output-high; 659 }; 660 661 en_pp3300_codec: en-pp3300-codec { 662 pins = "gpio105"; 663 function = "gpio"; 664 bias-disable; 665 drive-strength = <2>; 666 }; 667 668 en_pp3300_dx_edp: en-pp3300-dx-edp { 669 pins = "gpio80"; 670 function = "gpio"; 671 bias-disable; 672 drive-strength = <2>; 673 }; 674 675 fp_rst_l: fp-rst-l { 676 pins = "gpio78"; 677 function = "gpio"; 678 bias-disable; 679 drive-strength = <2>; 680 output-high; 681 }; 682 683 fp_to_ap_irq_l: fp-to-ap-irq-l { 684 pins = "gpio61"; 685 function = "gpio"; 686 /* Has external pullup */ 687 bias-disable; 688 }; 689 690 fpmcu_boot0: fpmcu-boot0 { 691 pins = "gpio68"; 692 function = "gpio"; 693 bias-disable; 694 output-low; 695 }; 696 697 gsc_ap_int_odl: gsc-ap-int-odl { 698 pins = "gpio104"; 699 function = "gpio"; 700 bias-pull-up; 701 }; 702 703 hp_irq: hp-irq { 704 pins = "gpio101"; 705 function = "gpio"; 706 bias-pull-up; 707 }; 708 709 hub_en: hub-en { 710 pins = "gpio157"; 711 function = "gpio"; 712 bias-disable; 713 drive-strength = <2>; 714 }; 715 716 pe_wake_odl: pe-wake-odl { 717 pins = "gpio3"; 718 function = "gpio"; 719 /* Has external pull */ 720 bias-disable; 721 drive-strength = <2>; 722 }; 723 724 /* For ap_spi_fp */ 725 qup_spi9_cs_gpio_init_high: qup-spi9-cs-gpio-init-high { 726 pins = "gpio39"; 727 function = "gpio"; 728 output-high; 729 }; 730 731 /* For ap_ec_spi */ 732 qup_spi10_cs_gpio_init_high: qup-spi10-cs-gpio-init-high { 733 pins = "gpio43"; 734 function = "gpio"; 735 output-high; 736 }; 737 738 sar0_irq_odl: sar0-irq-odl { 739 pins = "gpio141"; 740 function = "gpio"; 741 bias-pull-up; 742 }; 743 744 sar1_irq_odl: sar0-irq-odl { 745 pins = "gpio140"; 746 function = "gpio"; 747 bias-pull-up; 748 }; 749 750 sd_cd_odl: sd-cd-odl { 751 pins = "gpio91"; 752 function = "gpio"; 753 bias-pull-up; 754 }; 755 756 ssd_en: ssd-en { 757 pins = "gpio51"; 758 function = "gpio"; 759 bias-disable; 760 drive-strength = <2>; 761 }; 762 763 ssd_rst_l: ssd-rst-l { 764 pins = "gpio2"; 765 function = "gpio"; 766 bias-disable; 767 drive-strength = <2>; 768 output-low; 769 }; 770 771 tp_int_odl: tp-int-odl { 772 pins = "gpio7"; 773 function = "gpio"; 774 /* Has external pullup */ 775 bias-disable; 776 }; 777 778 wf_cam_en: wf-cam-en { 779 pins = "gpio119"; 780 function = "gpio"; 781 /* Has external pulldown */ 782 bias-disable; 783 drive-strength = <2>; 784 }; 785}; 786