1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Herobrine board device tree source 4 * 5 * Copyright 2022 Google LLC. 6 */ 7 8/dts-v1/; 9 10#include "sc7280-herobrine.dtsi" 11#include "sc7280-herobrine-lte-sku.dtsi" 12 13/ { 14 model = "Google Herobrine (rev1+)"; 15 compatible = "google,herobrine", "qcom,sc7280"; 16}; 17 18/* 19 * ADDITIONS TO FIXED REGULATORS DEFINED IN PARENT DEVICE TREE FILES 20 * 21 * Sort order matches the order in the parent files (parents before children). 22 */ 23 24&pp3300_codec { 25 status = "okay"; 26}; 27 28&pp3300_fp_mcu { 29 status = "okay"; 30}; 31 32&pp2850_vcm_wf_cam { 33 status = "okay"; 34}; 35 36&pp2850_wf_cam { 37 status = "okay"; 38}; 39 40&pp1800_wf_cam { 41 status = "okay"; 42}; 43 44&pp1200_wf_cam { 45 status = "okay"; 46}; 47 48/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */ 49 50&ap_spi_fp { 51 status = "okay"; 52}; 53 54/* 55 * Although the trackpad is really part of the herobrine baseboard, we'll 56 * put the actual definition in the board device tree since different boards 57 * might hook up different trackpads (or no i2c trackpad at all in the case 58 * of tablets / detachables). 59 */ 60ap_tp_i2c: &i2c0 { 61 status = "okay"; 62 clock-frequency = <400000>; 63 64 trackpad: trackpad@15 { 65 compatible = "elan,ekth3000"; 66 reg = <0x15>; 67 pinctrl-names = "default"; 68 pinctrl-0 = <&tp_int_odl>; 69 70 interrupt-parent = <&tlmm>; 71 interrupts = <7 IRQ_TYPE_EDGE_FALLING>; 72 73 vcc-supply = <&pp3300_z1>; 74 75 wakeup-source; 76 }; 77}; 78 79/* 80 * The touchscreen connector might come off the Qcard, at least in the case of 81 * eDP. Like the trackpad, we'll put it in the board device tree file since 82 * different boards have different touchscreens. 83 */ 84ts_i2c: &i2c13 { 85 status = "okay"; 86 clock-frequency = <400000>; 87 88 ap_ts: touchscreen@5c { 89 compatible = "hid-over-i2c"; 90 reg = <0x5c>; 91 pinctrl-names = "default"; 92 pinctrl-0 = <&ts_int_conn>, <&ts_rst_conn>; 93 94 interrupt-parent = <&tlmm>; 95 interrupts = <55 IRQ_TYPE_LEVEL_LOW>; 96 97 post-power-on-delay-ms = <500>; 98 hid-descr-addr = <0x0000>; 99 100 vdd-supply = <&ts_avdd>; 101 }; 102}; 103 104&mdss_edp { 105 status = "okay"; 106}; 107 108&mdss_edp_phy { 109 status = "okay"; 110}; 111 112/* For nvme */ 113&pcie1 { 114 status = "okay"; 115}; 116 117/* For nvme */ 118&pcie1_phy { 119 status = "okay"; 120}; 121 122/* For eMMC */ 123&sdhc_1 { 124 status = "okay"; 125}; 126 127/* For SD Card */ 128&sdhc_2 { 129 status = "okay"; 130}; 131 132/* PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES */ 133 134/* 135 * This pin goes to the display panel but then doesn't actually do anything 136 * on the panel itself (it doesn't connect to the touchscreen controller). 137 * We'll set a pullup here just to park the line. 138 */ 139&ts_rst_conn { 140 bias-pull-up; 141}; 142 143/* PINCTRL - BOARD-SPECIFIC */ 144 145/* 146 * Methodology for gpio-line-names: 147 * - If a pin goes to herobrine board and is named it gets that name. 148 * - If a pin goes to herobrine board and is not named, it gets no name. 149 * - If a pin is totally internal to Qcard then it gets Qcard name. 150 * - If a pin is not hooked up on Qcard, it gets no name. 151 */ 152 153&pm8350c_gpios { 154 gpio-line-names = "FLASH_STROBE_1", /* 1 */ 155 "AP_SUSPEND", 156 "PM8008_1_RST_N", 157 "", 158 "", 159 "", 160 "PMIC_EDP_BL_EN", 161 "PMIC_EDP_BL_PWM", 162 ""; 163}; 164 165&tlmm { 166 gpio-line-names = "AP_TP_I2C_SDA", /* 0 */ 167 "AP_TP_I2C_SCL", 168 "SSD_RST_L", 169 "PE_WAKE_ODL", 170 "AP_SAR_SDA", 171 "AP_SAR_SCL", 172 "PRB_SC_GPIO_6", 173 "TP_INT_ODL", 174 "HP_I2C_SDA", 175 "HP_I2C_SCL", 176 177 "GNSS_L1_EN", /* 10 */ 178 "GNSS_L5_EN", 179 "SPI_AP_MOSI", 180 "SPI_AP_MISO", 181 "SPI_AP_CLK", 182 "SPI_AP_CS0_L", 183 /* 184 * AP_FLASH_WP is crossystem ABI. Schematics 185 * call it BIOS_FLASH_WP_OD. 186 */ 187 "AP_FLASH_WP", 188 "", 189 "AP_EC_INT_L", 190 "", 191 192 "UF_CAM_RST_L", /* 20 */ 193 "WF_CAM_RST_L", 194 "UART_AP_TX_DBG_RX", 195 "UART_DBG_TX_AP_RX", 196 "", 197 "PM8008_IRQ_1", 198 "HOST2WLAN_SOL", 199 "WLAN2HOST_SOL", 200 "MOS_BT_UART_CTS", 201 "MOS_BT_UART_RFR", 202 203 "MOS_BT_UART_TX", /* 30 */ 204 "MOS_BT_UART_RX", 205 "PRB_SC_GPIO_32", 206 "HUB_RST_L", 207 "", 208 "", 209 "AP_SPI_FP_MISO", 210 "AP_SPI_FP_MOSI", 211 "AP_SPI_FP_CLK", 212 "AP_SPI_FP_CS_L", 213 214 "AP_EC_SPI_MISO", /* 40 */ 215 "AP_EC_SPI_MOSI", 216 "AP_EC_SPI_CLK", 217 "AP_EC_SPI_CS_L", 218 "LCM_RST_L", 219 "EARLY_EUD_N", 220 "", 221 "DP_HOT_PLUG_DET", 222 "IO_BRD_MLB_ID0", 223 "IO_BRD_MLB_ID1", 224 225 "IO_BRD_MLB_ID2", /* 50 */ 226 "SSD_EN", 227 "TS_I2C_SDA_CONN", 228 "TS_I2C_CLK_CONN", 229 "TS_RST_CONN", 230 "TS_INT_CONN", 231 "AP_I2C_TPM_SDA", 232 "AP_I2C_TPM_SCL", 233 "PRB_SC_GPIO_58", 234 "PRB_SC_GPIO_59", 235 236 "EDP_HOT_PLUG_DET_N", /* 60 */ 237 "FP_TO_AP_IRQ_L", 238 "", 239 "AMP_EN", 240 "CAM0_MCLK_GPIO_64", 241 "CAM1_MCLK_GPIO_65", 242 "WF_CAM_MCLK", 243 "PRB_SC_GPIO_67", 244 "FPMCU_BOOT0", 245 "UF_CAM_SDA", 246 247 "UF_CAM_SCL", /* 70 */ 248 "", 249 "", 250 "WF_CAM_SDA", 251 "WF_CAM_SCL", 252 "", 253 "", 254 "EN_FP_RAILS", 255 "FP_RST_L", 256 "PCIE1_CLKREQ_ODL", 257 258 "EN_PP3300_DX_EDP", /* 80 */ 259 "SC_GPIO_81", 260 "FORCED_USB_BOOT", 261 "WCD_RESET_N", 262 "MOS_WLAN_EN", 263 "MOS_BT_EN", 264 "MOS_SW_CTRL", 265 "MOS_PCIE0_RST", 266 "MOS_PCIE0_CLKREQ_N", 267 "MOS_PCIE0_WAKE_N", 268 269 "MOS_LAA_AS_EN", /* 90 */ 270 "SD_CD_ODL", 271 "", 272 "", 273 "MOS_BT_WLAN_SLIMBUS_CLK", 274 "MOS_BT_WLAN_SLIMBUS_DAT0", 275 "HP_MCLK", 276 "HP_BCLK", 277 "HP_DOUT", 278 "HP_DIN", 279 280 "HP_LRCLK", /* 100 */ 281 "HP_IRQ", 282 "", 283 "", 284 "GSC_AP_INT_ODL", 285 "EN_PP3300_CODEC", 286 "AMP_BCLK", 287 "AMP_DIN", 288 "AMP_LRCLK", 289 "UIM1_DATA_GPIO_109", 290 291 "UIM1_CLK_GPIO_110", /* 110 */ 292 "UIM1_RESET_GPIO_111", 293 "PRB_SC_GPIO_112", 294 "UIM0_DATA", 295 "UIM0_CLK", 296 "UIM0_RST", 297 "UIM0_PRESENT_ODL", 298 "SDM_RFFE0_CLK", 299 "SDM_RFFE0_DATA", 300 "WF_CAM_EN", 301 302 "FASTBOOT_SEL_0", /* 120 */ 303 "SC_GPIO_121", 304 "FASTBOOT_SEL_1", 305 "SC_GPIO_123", 306 "FASTBOOT_SEL_2", 307 "SM_RFFE4_CLK_GRFC_8", 308 "SM_RFFE4_DATA_GRFC_9", 309 "WLAN_COEX_UART1_RX", 310 "WLAN_COEX_UART1_TX", 311 "PRB_SC_GPIO_129", 312 313 "LCM_ID0", /* 130 */ 314 "LCM_ID1", 315 "", 316 "SDR_QLINK_REQ", 317 "SDR_QLINK_EN", 318 "QLINK0_WMSS_RESET_N", 319 "SMR526_QLINK1_REQ", 320 "SMR526_QLINK1_EN", 321 "SMR526_QLINK1_WMSS_RESET_N", 322 "PRB_SC_GPIO_139", 323 324 "SAR1_IRQ_ODL", /* 140 */ 325 "SAR0_IRQ_ODL", 326 "PRB_SC_GPIO_142", 327 "", 328 "WCD_SWR_TX_CLK", 329 "WCD_SWR_TX_DATA0", 330 "WCD_SWR_TX_DATA1", 331 "WCD_SWR_RX_CLK", 332 "WCD_SWR_RX_DATA0", 333 "WCD_SWR_RX_DATA1", 334 335 "DMIC01_CLK", /* 150 */ 336 "DMIC01_DATA", 337 "DMIC23_CLK", 338 "DMIC23_DATA", 339 "", 340 "", 341 "EC_IN_RW_ODL", 342 "HUB_EN", 343 "WCD_SWR_TX_DATA2", 344 "", 345 346 "", /* 160 */ 347 "", 348 "", 349 "", 350 "", 351 "", 352 "", 353 "", 354 "", 355 "", 356 357 "", /* 170 */ 358 "MOS_BLE_UART_TX", 359 "MOS_BLE_UART_RX", 360 "", 361 "", 362 ""; 363}; 364