xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/sc7280-crd-r3.dts (revision 96190b4fef3b4a0cc3ca0606b0c4e3e69a5e6717)
1// SPDX-License-Identifier: BSD-3-Clause
2/*
3 * sc7280 CRD board device tree source
4 *
5 * Copyright (c) 2021 Qualcomm Innovation Center, Inc. All rights reserved.
6 */
7
8/dts-v1/;
9
10#include "sc7280-idp.dtsi"
11#include "sc7280-idp-ec-h1.dtsi"
12
13/ {
14	model = "Qualcomm Technologies, Inc. sc7280 CRD platform (rev3 - 4)";
15	compatible = "qcom,sc7280-crd",
16		     "google,hoglin-rev3", "google,hoglin-rev4",
17		     "google,piglin-rev3", "google,piglin-rev4",
18		     "qcom,sc7280";
19
20	aliases {
21		serial0 = &uart5;
22	};
23
24	chosen {
25		stdout-path = "serial0:115200n8";
26	};
27};
28
29&apps_rsc {
30	regulators-2 {
31		compatible = "qcom,pmg1110-rpmh-regulators";
32		qcom,pmic-id = "k";
33
34		vreg_s1k_1p0: smps1 {
35			regulator-min-microvolt = <1010000>;
36			regulator-max-microvolt = <1170000>;
37		};
38	};
39};
40
41&bluetooth {
42	vddio-supply = <&vreg_l18b_1p8>;
43};
44
45ap_tp_i2c: &i2c0 {
46	status = "okay";
47	clock-frequency = <400000>;
48
49	trackpad: trackpad@15 {
50		compatible = "hid-over-i2c";
51		reg = <0x15>;
52		pinctrl-names = "default";
53		pinctrl-0 = <&tp_int_odl>;
54
55		interrupt-parent = <&tlmm>;
56		interrupts = <7 IRQ_TYPE_EDGE_FALLING>;
57
58		post-power-on-delay-ms = <20>;
59		hid-descr-addr = <0x0001>;
60		vdd-supply = <&vreg_l18b_1p8>;
61
62		wakeup-source;
63	};
64};
65
66ap_ts_pen_1v8: &i2c13 {
67	status = "okay";
68	clock-frequency = <400000>;
69
70	ap_ts: touchscreen@5c {
71		compatible = "hid-over-i2c";
72		reg = <0x5c>;
73		pinctrl-names = "default";
74		pinctrl-0 = <&ts_int_l>, <&ts_reset_l>;
75
76		interrupt-parent = <&tlmm>;
77		interrupts = <55 IRQ_TYPE_LEVEL_LOW>;
78
79		post-power-on-delay-ms = <500>;
80		hid-descr-addr = <0x0000>;
81
82		vdd-supply = <&vreg_l19b_1p8>;
83	};
84};
85
86&nvme_3v3_regulator {
87	gpio = <&tlmm 51 GPIO_ACTIVE_HIGH>;
88};
89
90&nvme_pwren {
91	pins = "gpio51";
92};
93
94&sound {
95	audio-routing =
96		"IN1_HPHL", "HPHL_OUT",
97		"IN2_HPHR", "HPHR_OUT",
98		"AMIC1", "MIC BIAS1",
99		"AMIC2", "MIC BIAS2",
100		"VA DMIC0", "MIC BIAS1",
101		"VA DMIC1", "MIC BIAS1",
102		"VA DMIC2", "MIC BIAS3",
103		"VA DMIC3", "MIC BIAS3",
104		"TX SWR_ADC0", "ADC1_OUTPUT",
105		"TX SWR_ADC1", "ADC2_OUTPUT",
106		"TX SWR_ADC2", "ADC3_OUTPUT",
107		"TX SWR_DMIC0", "DMIC1_OUTPUT",
108		"TX SWR_DMIC1", "DMIC2_OUTPUT",
109		"TX SWR_DMIC2", "DMIC3_OUTPUT",
110		"TX SWR_DMIC3", "DMIC4_OUTPUT",
111		"TX SWR_DMIC4", "DMIC5_OUTPUT",
112		"TX SWR_DMIC5", "DMIC6_OUTPUT",
113		"TX SWR_DMIC6", "DMIC7_OUTPUT",
114		"TX SWR_DMIC7", "DMIC8_OUTPUT";
115};
116
117&wcd9385 {
118	pinctrl-names = "default", "sleep";
119	pinctrl-0 = <&wcd_reset_n>, <&us_euro_hs_sel>;
120	pinctrl-1 = <&wcd_reset_n_sleep>, <&us_euro_hs_sel>;
121	us-euro-gpios = <&tlmm 81 GPIO_ACTIVE_HIGH>;
122};
123
124&tlmm {
125	tp_int_odl: tp-int-odl-state {
126		pins = "gpio7";
127		function = "gpio";
128		bias-disable;
129	};
130
131	ts_int_l: ts-int-l-state {
132		pins = "gpio55";
133		function = "gpio";
134		bias-pull-up;
135	};
136
137	ts_reset_l: ts-reset-l-state {
138		pins = "gpio54";
139		function = "gpio";
140		bias-disable;
141	};
142
143	us_euro_hs_sel: us-euro-hs-sel-state {
144		pins = "gpio81";
145		function = "gpio";
146		bias-pull-down;
147		drive-strength = <2>;
148	};
149};
150