1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Trogdor dts fragment for the boards with Parade ps8640 edp bridge 4 * 5 * Copyright 2021 Google LLC. 6 */ 7 8/ { 9 pp3300_brij_ps8640: pp3300-brij-ps8640 { 10 compatible = "regulator-fixed"; 11 status = "okay"; 12 regulator-name = "pp3300_brij_ps8640"; 13 14 regulator-min-microvolt = <3300000>; 15 regulator-max-microvolt = <3300000>; 16 17 gpio = <&tlmm 32 GPIO_ACTIVE_HIGH>; 18 enable-active-high; 19 20 pinctrl-names = "default"; 21 pinctrl-0 = <&en_pp3300_edp_brij_ps8640>; 22 23 vin-supply = <&pp3300_a>; 24 }; 25}; 26 27&dsi0_out { 28 remote-endpoint = <&ps8640_in>; 29}; 30 31edp_brij_i2c: &i2c2 { 32 status = "okay"; 33 clock-frequency = <400000>; 34 35 ps8640_bridge: bridge@8 { 36 compatible = "parade,ps8640"; 37 reg = <0x8>; 38 39 powerdown-gpios = <&tlmm 104 GPIO_ACTIVE_LOW>; 40 reset-gpios = <&tlmm 11 GPIO_ACTIVE_LOW>; 41 42 pinctrl-names = "default"; 43 pinctrl-0 = <&edp_brij_en>, <&edp_brij_ps8640_rst>; 44 45 vdd12-supply = <&pp1200_brij>; 46 vdd33-supply = <&pp3300_brij_ps8640>; 47 48 ports { 49 #address-cells = <1>; 50 #size-cells = <0>; 51 52 port@0 { 53 reg = <0>; 54 ps8640_in: endpoint { 55 remote-endpoint = <&dsi0_out>; 56 }; 57 }; 58 59 port@1 { 60 reg = <1>; 61 ps8640_out: endpoint { 62 remote-endpoint = <&panel_in_edp>; 63 }; 64 }; 65 }; 66 67 aux-bus { 68 panel: panel { 69 /* Compatible will be filled in per-board */ 70 power-supply = <&pp3300_dx_edp>; 71 backlight = <&backlight>; 72 73 port { 74 panel_in_edp: endpoint { 75 remote-endpoint = <&ps8640_out>; 76 }; 77 }; 78 }; 79 }; 80 }; 81}; 82 83&tlmm { 84 edp_brij_ps8640_rst: edp-brij-ps8640-rst { 85 pinmux { 86 pins = "gpio11"; 87 function = "gpio"; 88 }; 89 90 pinconf { 91 pins = "gpio11"; 92 drive-strength = <2>; 93 bias-disable; 94 }; 95 }; 96 97 en_pp3300_edp_brij_ps8640: en-pp3300-edp-brij-ps8640 { 98 pinmux { 99 pins = "gpio32"; 100 function = "gpio"; 101 }; 102 103 pinconf { 104 pins = "gpio32"; 105 drive-strength = <2>; 106 bias-disable; 107 }; 108 }; 109}; 110