1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google Mrbland board device tree source 4 * 5 * Copyright 2021 Google LLC. 6 */ 7 8/dts-v1/; 9 10#include "sc7180-trogdor.dtsi" 11 12/* This board only has 1 USB Type-C port. */ 13/delete-node/ &usb_c1; 14 15/ { 16 avdd_lcd: avdd-lcd-regulator { 17 compatible = "regulator-fixed"; 18 regulator-name = "avdd_lcd"; 19 20 gpio = <&tlmm 88 GPIO_ACTIVE_HIGH>; 21 enable-active-high; 22 pinctrl-names = "default"; 23 pinctrl-0 = <&avdd_lcd_en>; 24 25 vin-supply = <&pp5000_a>; 26 }; 27 28 avee_lcd: avee-lcd-regulator { 29 compatible = "regulator-fixed"; 30 regulator-name = "avee_lcd"; 31 32 gpio = <&tlmm 21 GPIO_ACTIVE_HIGH>; 33 enable-active-high; 34 pinctrl-names = "default"; 35 pinctrl-0 = <&avee_lcd_en>; 36 37 vin-supply = <&pp5000_a>; 38 }; 39 40 v1p8_mipi: v1p8-mipi-regulator { 41 compatible = "regulator-fixed"; 42 regulator-name = "v1p8_mipi"; 43 44 gpio = <&tlmm 86 GPIO_ACTIVE_HIGH>; 45 enable-active-high; 46 pinctrl-names = "default"; 47 pinctrl-0 = <&mipi_1800_en>; 48 49 vin-supply = <&pp3300_a>; 50 }; 51}; 52 53&backlight { 54 pwms = <&cros_ec_pwm 0>; 55}; 56 57&camcc { 58 status = "okay"; 59}; 60 61&cros_ec { 62 keyboard-controller { 63 compatible = "google,cros-ec-keyb-switches"; 64 }; 65}; 66 67&dsi0 { 68 69 panel: panel@0 { 70 /* Compatible will be filled in per-board */ 71 reg = <0>; 72 enable-gpios = <&tlmm 87 GPIO_ACTIVE_HIGH>; 73 pinctrl-names = "default"; 74 pinctrl-0 = <&vdd_reset_1800>; 75 avdd-supply = <&avdd_lcd>; 76 avee-supply = <&avee_lcd>; 77 pp1800-supply = <&v1p8_mipi>; 78 pp3300-supply = <&pp3300_dx_edp>; 79 backlight = <&backlight>; 80 rotation = <270>; 81 82 ports { 83 #address-cells = <1>; 84 #size-cells = <0>; 85 port@0 { 86 reg = <0>; 87 panel_in: endpoint { 88 remote-endpoint = <&dsi0_out>; 89 }; 90 }; 91 }; 92 }; 93 94 ports { 95 port@1 { 96 endpoint { 97 remote-endpoint = <&panel_in>; 98 data-lanes = <0 1 2 3>; 99 }; 100 }; 101 }; 102}; 103 104&gpio_keys { 105 status = "okay"; 106}; 107 108&i2c4 { 109 status = "okay"; 110 clock-frequency = <400000>; 111 112 ap_ts: touchscreen@5d { 113 compatible = "goodix,gt7375p"; 114 reg = <0x5d>; 115 pinctrl-names = "default"; 116 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 117 118 interrupt-parent = <&tlmm>; 119 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 120 121 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 122 123 vdd-supply = <&pp3300_ts>; 124 }; 125}; 126 127&pp1800_uf_cam { 128 status = "okay"; 129}; 130 131&pp1800_wf_cam { 132 status = "okay"; 133}; 134 135&pp2800_uf_cam { 136 status = "okay"; 137}; 138 139&pp2800_wf_cam { 140 status = "okay"; 141}; 142 143&wifi { 144 qcom,ath10k-calibration-variant = "GO_MRBLAND"; 145}; 146 147/* 148 * No eDP on this board but it's logically the same signal so just give it 149 * a new name and assign the proper GPIO. 150 */ 151pp3300_disp_on: &pp3300_dx_edp { 152 gpio = <&tlmm 85 GPIO_ACTIVE_HIGH>; 153}; 154 155/* PINCTRL - modifications to sc7180-trogdor.dtsi */ 156 157/* 158 * No eDP on this board but it's logically the same signal so just give it 159 * a new name and assign the proper GPIO. 160 */ 161 162tp_en: &en_pp3300_dx_edp { 163 pins = "gpio85"; 164}; 165 166/* PINCTRL - board-specific pinctrl */ 167 168&tlmm { 169 gpio-line-names = "HUB_RST_L", 170 "AP_RAM_ID0", 171 "AP_SKU_ID2", 172 "AP_RAM_ID1", 173 "", 174 "AP_RAM_ID2", 175 "UF_CAM_EN", 176 "WF_CAM_EN", 177 "TS_RESET_L", 178 "TS_INT_L", 179 "", 180 "", 181 "AP_EDP_BKLTEN", 182 "UF_CAM_MCLK", 183 "WF_CAM_CLK", 184 "", 185 "", 186 "UF_CAM_SDA", 187 "UF_CAM_SCL", 188 "WF_CAM_SDA", 189 "WF_CAM_SCL", 190 "AVEE_LCD_EN", 191 "", 192 "AMP_EN", 193 "", 194 "", 195 "", 196 "", 197 "HP_IRQ", 198 "WF_CAM_RST_L", 199 "UF_CAM_RST_L", 200 "AP_BRD_ID2", 201 "", 202 "AP_BRD_ID0", 203 "AP_H1_SPI_MISO", 204 "AP_H1_SPI_MOSI", 205 "AP_H1_SPI_CLK", 206 "AP_H1_SPI_CS_L", 207 "BT_UART_CTS", 208 "BT_UART_RTS", 209 "BT_UART_TXD", 210 "BT_UART_RXD", 211 "H1_AP_INT_ODL", 212 "", 213 "UART_AP_TX_DBG_RX", 214 "UART_DBG_TX_AP_RX", 215 "HP_I2C_SDA", 216 "HP_I2C_SCL", 217 "FORCED_USB_BOOT", 218 "AMP_BCLK", 219 "AMP_LRCLK", 220 "AMP_DIN", 221 "PEN_DET_ODL", 222 "HP_BCLK", 223 "HP_LRCLK", 224 "HP_DOUT", 225 "HP_DIN", 226 "HP_MCLK", 227 "AP_SKU_ID0", 228 "AP_EC_SPI_MISO", 229 "AP_EC_SPI_MOSI", 230 "AP_EC_SPI_CLK", 231 "AP_EC_SPI_CS_L", 232 "AP_SPI_CLK", 233 "AP_SPI_MOSI", 234 "AP_SPI_MISO", 235 /* 236 * AP_FLASH_WP_L is crossystem ABI. Schematics 237 * call it BIOS_FLASH_WP_L. 238 */ 239 "AP_FLASH_WP_L", 240 "", 241 "AP_SPI_CS0_L", 242 "", 243 "", 244 "", 245 "", 246 "WLAN_SW_CTRL", 247 "", 248 "REPORT_E", 249 "", 250 "ID0", 251 "", 252 "ID1", 253 "", 254 "", 255 "", 256 "CODEC_PWR_EN", 257 "HUB_EN", 258 "TP_EN", 259 "MIPI_1.8V_EN", 260 "VDD_RESET_1.8V", 261 "AVDD_LCD_EN", 262 "", 263 "AP_SKU_ID1", 264 "AP_RST_REQ", 265 "", 266 "AP_BRD_ID1", 267 "AP_EC_INT_L", 268 "SDM_GRFC_3", 269 "", 270 "", 271 "BOOT_CONFIG_4", 272 "BOOT_CONFIG_2", 273 "", 274 "", 275 "", 276 "", 277 "", 278 "", 279 "", 280 "BOOT_CONFIG_3", 281 "WCI2_LTE_COEX_TXD", 282 "WCI2_LTE_COEX_RXD", 283 "", 284 "", 285 "", 286 "", 287 "FORCED_USB_BOOT_POL", 288 "AP_TS_PEN_I2C_SDA", 289 "AP_TS_PEN_I2C_SCL", 290 "DP_HOT_PLUG_DET", 291 "EC_IN_RW_ODL"; 292 293 avdd_lcd_en: avdd-lcd-en-state { 294 pins = "gpio88"; 295 function = "gpio"; 296 drive-strength = <2>; 297 bias-disable; 298 }; 299 300 avee_lcd_en: avee-lcd-en-state { 301 pins = "gpio21"; 302 function = "gpio"; 303 drive-strength = <2>; 304 bias-disable; 305 }; 306 307 mipi_1800_en: mipi-1800-en-state { 308 pins = "gpio86"; 309 function = "gpio"; 310 drive-strength = <2>; 311 bias-disable; 312 }; 313 314 vdd_reset_1800: vdd-reset-1800-state { 315 pins = "gpio87"; 316 function = "gpio"; 317 drive-strength = <2>; 318 bias-disable; 319 }; 320}; 321