1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Google CoachZ board device tree source 4 * 5 * Copyright 2020 Google LLC. 6 */ 7 8#include "sc7180-trogdor.dtsi" 9#include "sc7180-trogdor-ti-sn65dsi86.dtsi" 10 11/* Deleted nodes from sc7180-trogdor.dtsi */ 12 13/delete-node/ &alc5682; 14/delete-node/ &pp3300_codec; 15 16/ { 17 /* BOARD-SPECIFIC TOP LEVEL NODES */ 18 19 adau7002: audio-codec-1 { 20 compatible = "adi,adau7002"; 21 IOVDD-supply = <&pp1800_l15a>; 22 wakeup-delay-ms = <80>; 23 #sound-dai-cells = <0>; 24 }; 25 26 thermal-zones { 27 skin_temp_thermal: skin-temp-thermal { 28 polling-delay-passive = <250>; 29 polling-delay = <0>; 30 31 thermal-sensors = <&pm6150_adc_tm 1>; 32 sustainable-power = <965>; 33 34 trips { 35 skin_temp_alert0: trip-point0 { 36 temperature = <42000>; 37 hysteresis = <1000>; 38 type = "passive"; 39 }; 40 41 skin_temp_alert1: trip-point1 { 42 temperature = <45000>; 43 hysteresis = <1000>; 44 type = "passive"; 45 }; 46 47 skin-temp-crit { 48 temperature = <60000>; 49 hysteresis = <1000>; 50 type = "critical"; 51 }; 52 }; 53 54 cooling-maps { 55 map0 { 56 trip = <&skin_temp_alert0>; 57 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 58 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 59 }; 60 61 map1 { 62 trip = <&skin_temp_alert1>; 63 cooling-device = <&CPU6 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>, 64 <&CPU7 THERMAL_NO_LIMIT THERMAL_NO_LIMIT>; 65 }; 66 }; 67 }; 68 }; 69}; 70 71&ap_spi_fp { 72 status = "okay"; 73}; 74 75&backlight { 76 pwms = <&cros_ec_pwm 0>; 77}; 78 79&camcc { 80 status = "okay"; 81}; 82 83&cros_ec { 84 keyboard-controller { 85 compatible = "google,cros-ec-keyb-switches"; 86 }; 87 88 cros_ec_proximity: proximity { 89 compatible = "google,cros-ec-mkbp-proximity"; 90 label = "proximity-wifi"; 91 }; 92}; 93 94ap_ts_pen_1v8: &i2c4 { 95 status = "okay"; 96 clock-frequency = <400000>; 97 98 ap_ts: touchscreen@5d { 99 compatible = "goodix,gt7375p"; 100 reg = <0x5d>; 101 pinctrl-names = "default"; 102 pinctrl-0 = <&ts_int_l>, <&ts_reset_l>; 103 104 interrupt-parent = <&tlmm>; 105 interrupts = <9 IRQ_TYPE_LEVEL_LOW>; 106 107 reset-gpios = <&tlmm 8 GPIO_ACTIVE_LOW>; 108 109 vdd-supply = <&pp3300_ts>; 110 }; 111}; 112 113&i2c9 { 114 status = "disabled"; 115}; 116 117&panel { 118 compatible = "boe,nv110wtm-n61"; 119}; 120 121&pm6150_adc { 122 skin-temp-thermistor@4e { 123 reg = <ADC5_AMUX_THM2_100K_PU>; 124 qcom,ratiometric; 125 qcom,hw-settle-time = <200>; 126 }; 127}; 128 129&pm6150_adc_tm { 130 status = "okay"; 131 132 skin-temp-thermistor@1 { 133 reg = <1>; 134 io-channels = <&pm6150_adc ADC5_AMUX_THM2_100K_PU>; 135 qcom,ratiometric; 136 qcom,hw-settle-time-us = <200>; 137 }; 138}; 139 140&pp1800_uf_cam { 141 status = "okay"; 142}; 143 144&pp1800_wf_cam { 145 status = "okay"; 146}; 147 148&pp2800_uf_cam { 149 status = "okay"; 150}; 151 152&pp2800_wf_cam { 153 status = "okay"; 154}; 155 156&pp3300_dx_edp { 157 gpio = <&tlmm 67 GPIO_ACTIVE_HIGH>; 158}; 159 160&sdhc_2 { 161 status = "okay"; 162}; 163 164&sn65dsi86_out { 165 data-lanes = <0 1 2 3>; 166}; 167 168&sound { 169 compatible = "google,sc7180-coachz"; 170 model = "sc7180-adau7002-max98357a"; 171 audio-routing = "PDM_DAT", "DMIC"; 172 173 pinctrl-names = "default"; 174 pinctrl-0 = <&dmic_clk_en>; 175}; 176 177&sound_multimedia0_codec { 178 sound-dai = <&adau7002>; 179}; 180 181/* PINCTRL - modifications to sc7180-trogdor.dtsi */ 182 183&en_pp3300_dx_edp { 184 pinmux { 185 pins = "gpio67"; 186 }; 187 188 pinconf { 189 pins = "gpio67"; 190 }; 191}; 192 193&ts_reset_l { 194 pinconf { 195 /* 196 * We want reset state by default and it will be up to the 197 * driver to disable this when it's ready. 198 */ 199 output-low; 200 }; 201}; 202 203/* PINCTRL - board-specific pinctrl */ 204 205&tlmm { 206 gpio-line-names = "HUB_RST_L", 207 "AP_RAM_ID0", 208 "AP_SKU_ID2", 209 "AP_RAM_ID1", 210 "FP_TO_AP_IRQ_L", 211 "AP_RAM_ID2", 212 "UF_CAM_EN", 213 "WF_CAM_EN", 214 "TS_RESET_L", 215 "TS_INT_L", 216 "FPMCU_BOOT0", 217 "EDP_BRIJ_IRQ", 218 "AP_EDP_BKLTEN", 219 "UF_CAM_MCLK", 220 "WF_CAM_CLK", 221 "EDP_BRIJ_I2C_SDA", 222 "EDP_BRIJ_I2C_SCL", 223 "UF_CAM_SDA", 224 "UF_CAM_SCL", 225 "WF_CAM_SDA", 226 "WF_CAM_SCL", 227 "WLC_IRQ", 228 "FP_RST_L", 229 "AMP_EN", 230 "WLC_NRST", 231 "AP_SAR_SENSOR_SDA", 232 "AP_SAR_SENSOR_SCL", 233 "", 234 "", 235 "WF_CAM_RST_L", 236 "UF_CAM_RST_L", 237 "AP_BRD_ID2", 238 "BRIJ_SUSPEND", 239 "AP_BRD_ID0", 240 "AP_H1_SPI_MISO", 241 "AP_H1_SPI_MOSI", 242 "AP_H1_SPI_CLK", 243 "AP_H1_SPI_CS_L", 244 "", 245 "", 246 "", 247 "", 248 "H1_AP_INT_ODL", 249 "", 250 "UART_AP_TX_DBG_RX", 251 "UART_DBG_TX_AP_RX", 252 "", 253 "", 254 "FORCED_USB_BOOT", 255 "AMP_BCLK", 256 "AMP_LRCLK", 257 "AMP_DIN", 258 "", 259 "HP_BCLK", 260 "HP_LRCLK", 261 "HP_DOUT", 262 "HP_DIN", 263 "HP_MCLK", 264 "AP_SKU_ID0", 265 "AP_EC_SPI_MISO", 266 "AP_EC_SPI_MOSI", 267 "AP_EC_SPI_CLK", 268 "AP_EC_SPI_CS_L", 269 "AP_SPI_CLK", 270 "AP_SPI_MOSI", 271 "AP_SPI_MISO", 272 /* 273 * AP_FLASH_WP_L is crossystem ABI. Schematics 274 * call it BIOS_FLASH_WP_L. 275 */ 276 "AP_FLASH_WP_L", 277 "EN_PP3300_DX_EDP", 278 "AP_SPI_CS0_L", 279 "SD_CD_ODL", 280 "", 281 "", 282 "", 283 "", 284 "EN_FP_RAILS", 285 "UIM2_DATA", 286 "UIM2_CLK", 287 "UIM2_RST", 288 "UIM2_PRESENT_L", 289 "UIM1_DATA", 290 "UIM1_CLK", 291 "UIM1_RST", 292 "", 293 "", 294 "HUB_EN", 295 "", 296 "AP_SPI_FP_MISO", 297 "AP_SPI_FP_MOSI", 298 "AP_SPI_FP_CLK", 299 "AP_SPI_FP_CS_L", 300 "AP_SKU_ID1", 301 "AP_RST_REQ", 302 "", 303 "AP_BRD_ID1", 304 "AP_EC_INT_L", 305 "", 306 "", 307 "", 308 "", 309 "", 310 "", 311 "", 312 "", 313 "", 314 "EDP_BRIJ_EN", 315 "", 316 "", 317 "", 318 "", 319 "", 320 "", 321 "", 322 "", 323 "", 324 "", 325 "AP_TS_PEN_I2C_SDA", 326 "AP_TS_PEN_I2C_SCL", 327 "DP_HOT_PLUG_DET", 328 "EC_IN_RW_ODL"; 329 330 dmic_clk_en: dmic_clk_en { 331 pinmux { 332 pins = "gpio83"; 333 function = "gpio"; 334 }; 335 336 pinconf { 337 pins = "gpio83"; 338 drive-strength = <8>; 339 bias-pull-up; 340 }; 341 }; 342}; 343