1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright (c) 2013-2016, The Linux Foundation. All rights reserved. 4 */ 5 6&msmgpio { 7 8 wcd9xxx_intr { 9 wcd_intr_default: wcd_intr_default{ 10 mux { 11 pins = "gpio54"; 12 function = "gpio"; 13 }; 14 15 config { 16 pins = "gpio54"; 17 drive-strength = <2>; /* 2 mA */ 18 bias-pull-down; /* pull down */ 19 input-enable; 20 }; 21 }; 22 }; 23 24 cdc_reset_ctrl { 25 cdc_reset_sleep: cdc_reset_sleep { 26 mux { 27 pins = "gpio64"; 28 function = "gpio"; 29 }; 30 config { 31 pins = "gpio64"; 32 drive-strength = <16>; 33 bias-disable; 34 output-low; 35 }; 36 }; 37 cdc_reset_active:cdc_reset_active { 38 mux { 39 pins = "gpio64"; 40 function = "gpio"; 41 }; 42 config { 43 pins = "gpio64"; 44 drive-strength = <16>; 45 bias-pull-down; 46 output-high; 47 }; 48 }; 49 }; 50 51 blsp1_spi0_default: blsp1_spi0_default { 52 pinmux { 53 function = "blsp_spi1"; 54 pins = "gpio0", "gpio1", "gpio3"; 55 }; 56 pinmux_cs { 57 function = "gpio"; 58 pins = "gpio2"; 59 }; 60 pinconf { 61 pins = "gpio0", "gpio1", "gpio3"; 62 drive-strength = <12>; 63 bias-disable; 64 }; 65 pinconf_cs { 66 pins = "gpio2"; 67 drive-strength = <16>; 68 bias-disable; 69 output-high; 70 }; 71 }; 72 73 blsp1_spi0_sleep: blsp1_spi0_sleep { 74 pinmux { 75 function = "gpio"; 76 pins = "gpio0", "gpio1", "gpio2", "gpio3"; 77 }; 78 pinconf { 79 pins = "gpio0", "gpio1", "gpio2", "gpio3"; 80 drive-strength = <2>; 81 bias-pull-down; 82 }; 83 }; 84 85 blsp1_i2c2_default: blsp1_i2c2_default { 86 pinmux { 87 function = "blsp_i2c3"; 88 pins = "gpio47", "gpio48"; 89 }; 90 pinconf { 91 pins = "gpio47", "gpio48"; 92 drive-strength = <16>; 93 bias-disable = <0>; 94 }; 95 }; 96 97 blsp1_i2c2_sleep: blsp1_i2c2_sleep { 98 pinmux { 99 function = "gpio"; 100 pins = "gpio47", "gpio48"; 101 }; 102 pinconf { 103 pins = "gpio47", "gpio48"; 104 drive-strength = <2>; 105 bias-disable = <0>; 106 }; 107 }; 108 109 blsp2_i2c0_default: blsp2_i2c0 { 110 pinmux { 111 function = "blsp_i2c7"; 112 pins = "gpio55", "gpio56"; 113 }; 114 pinconf { 115 pins = "gpio55", "gpio56"; 116 drive-strength = <16>; 117 bias-disable; 118 }; 119 }; 120 121 blsp2_i2c0_sleep: blsp2_i2c0_sleep { 122 pinmux { 123 function = "gpio"; 124 pins = "gpio55", "gpio56"; 125 }; 126 pinconf { 127 pins = "gpio55", "gpio56"; 128 drive-strength = <2>; 129 bias-disable; 130 }; 131 }; 132 133 blsp2_uart1_2pins_default: blsp2_uart1_2pins { 134 pinmux { 135 function = "blsp_uart8"; 136 pins = "gpio4", "gpio5"; 137 }; 138 pinconf { 139 pins = "gpio4", "gpio5"; 140 drive-strength = <16>; 141 bias-disable; 142 }; 143 }; 144 145 blsp2_uart1_2pins_sleep: blsp2_uart1_2pins_sleep { 146 pinmux { 147 function = "gpio"; 148 pins = "gpio4", "gpio5"; 149 }; 150 pinconf { 151 pins = "gpio4", "gpio5"; 152 drive-strength = <2>; 153 bias-disable; 154 }; 155 }; 156 157 blsp2_uart1_4pins_default: blsp2_uart1_4pins { 158 pinmux { 159 function = "blsp_uart8"; 160 pins = "gpio4", "gpio5", "gpio6", "gpio7"; 161 }; 162 163 pinconf { 164 pins = "gpio4", "gpio5", "gpio6", "gpio7"; 165 drive-strength = <16>; 166 bias-disable; 167 }; 168 }; 169 170 blsp2_uart1_4pins_sleep: blsp2_uart1_4pins_sleep { 171 pinmux { 172 function = "gpio"; 173 pins = "gpio4", "gpio5", "gpio6", "gpio7"; 174 }; 175 176 pinconf { 177 pins = "gpio4", "gpio5", "gpio6", "gpio7"; 178 drive-strength = <2>; 179 bias-disable; 180 }; 181 }; 182 183 blsp2_i2c1_default: blsp2_i2c1 { 184 pinmux { 185 function = "blsp_i2c8"; 186 pins = "gpio6", "gpio7"; 187 }; 188 pinconf { 189 pins = "gpio6", "gpio7"; 190 drive-strength = <16>; 191 bias-disable; 192 }; 193 }; 194 195 blsp2_i2c1_sleep: blsp2_i2c1_sleep { 196 pinmux { 197 function = "gpio"; 198 pins = "gpio6", "gpio7"; 199 }; 200 pinconf { 201 pins = "gpio6", "gpio7"; 202 drive-strength = <2>; 203 bias-disable; 204 }; 205 }; 206 207 blsp2_uart2_2pins_default: blsp2_uart2_2pins { 208 pinmux { 209 function = "blsp_uart9"; 210 pins = "gpio49", "gpio50"; 211 }; 212 pinconf { 213 pins = "gpio49", "gpio50"; 214 drive-strength = <16>; 215 bias-disable; 216 }; 217 }; 218 219 blsp2_uart2_2pins_sleep: blsp2_uart2_2pins_sleep { 220 pinmux { 221 function = "gpio"; 222 pins = "gpio49", "gpio50"; 223 }; 224 pinconf { 225 pins = "gpio49", "gpio50"; 226 drive-strength = <2>; 227 bias-disable; 228 }; 229 }; 230 231 blsp2_uart2_4pins_default: blsp2_uart2_4pins { 232 pinmux { 233 function = "blsp_uart9"; 234 pins = "gpio49", "gpio50", "gpio51", "gpio52"; 235 }; 236 237 pinconf { 238 pins = "gpio49", "gpio50", "gpio51", "gpio52"; 239 drive-strength = <16>; 240 bias-disable; 241 }; 242 }; 243 244 blsp2_uart2_4pins_sleep: blsp2_uart2_4pins_sleep { 245 pinmux { 246 function = "gpio"; 247 pins = "gpio49", "gpio50", "gpio51", "gpio52"; 248 }; 249 250 pinconf { 251 pins = "gpio49", "gpio50", "gpio51", "gpio52"; 252 drive-strength = <2>; 253 bias-disable; 254 }; 255 }; 256 257 blsp2_spi5_default: blsp2_spi5_default { 258 pinmux { 259 function = "blsp_spi12"; 260 pins = "gpio85", "gpio86", "gpio88"; 261 }; 262 pinmux_cs { 263 function = "gpio"; 264 pins = "gpio87"; 265 }; 266 pinconf { 267 pins = "gpio85", "gpio86", "gpio88"; 268 drive-strength = <12>; 269 bias-disable; 270 }; 271 pinconf_cs { 272 pins = "gpio87"; 273 drive-strength = <16>; 274 bias-disable; 275 output-high; 276 }; 277 }; 278 279 blsp2_spi5_sleep: blsp2_spi5_sleep { 280 pinmux { 281 function = "gpio"; 282 pins = "gpio85", "gpio86", "gpio87", "gpio88"; 283 }; 284 pinconf { 285 pins = "gpio85", "gpio86", "gpio87", "gpio88"; 286 drive-strength = <2>; 287 bias-pull-down; 288 }; 289 }; 290 291 sdc2_clk_on: sdc2_clk_on { 292 config { 293 pins = "sdc2_clk"; 294 bias-disable; /* NO pull */ 295 drive-strength = <16>; /* 16 MA */ 296 }; 297 }; 298 299 sdc2_clk_off: sdc2_clk_off { 300 config { 301 pins = "sdc2_clk"; 302 bias-disable; /* NO pull */ 303 drive-strength = <2>; /* 2 MA */ 304 }; 305 }; 306 307 sdc2_cmd_on: sdc2_cmd_on { 308 config { 309 pins = "sdc2_cmd"; 310 bias-pull-up; /* pull up */ 311 drive-strength = <10>; /* 10 MA */ 312 }; 313 }; 314 315 sdc2_cmd_off: sdc2_cmd_off { 316 config { 317 pins = "sdc2_cmd"; 318 bias-pull-up; /* pull up */ 319 drive-strength = <2>; /* 2 MA */ 320 }; 321 }; 322 323 sdc2_data_on: sdc2_data_on { 324 config { 325 pins = "sdc2_data"; 326 bias-pull-up; /* pull up */ 327 drive-strength = <10>; /* 10 MA */ 328 }; 329 }; 330 331 sdc2_data_off: sdc2_data_off { 332 config { 333 pins = "sdc2_data"; 334 bias-pull-up; /* pull up */ 335 drive-strength = <2>; /* 2 MA */ 336 }; 337 }; 338 339 pcie0_clkreq_default: pcie0_clkreq_default { 340 mux { 341 pins = "gpio36"; 342 function = "pci_e0"; 343 }; 344 345 config { 346 pins = "gpio36"; 347 drive-strength = <2>; 348 bias-pull-up; 349 }; 350 }; 351 352 pcie0_perst_default: pcie0_perst_default { 353 mux { 354 pins = "gpio35"; 355 function = "gpio"; 356 }; 357 358 config { 359 pins = "gpio35"; 360 drive-strength = <2>; 361 bias-pull-down; 362 }; 363 }; 364 365 pcie0_wake_default: pcie0_wake_default { 366 mux { 367 pins = "gpio37"; 368 function = "gpio"; 369 }; 370 371 config { 372 pins = "gpio37"; 373 drive-strength = <2>; 374 bias-pull-up; 375 }; 376 }; 377 378 pcie0_clkreq_sleep: pcie0_clkreq_sleep { 379 mux { 380 pins = "gpio36"; 381 function = "gpio"; 382 }; 383 384 config { 385 pins = "gpio36"; 386 drive-strength = <2>; 387 bias-disable; 388 }; 389 }; 390 391 pcie0_wake_sleep: pcie0_wake_sleep { 392 mux { 393 pins = "gpio37"; 394 function = "gpio"; 395 }; 396 397 config { 398 pins = "gpio37"; 399 drive-strength = <2>; 400 bias-disable; 401 }; 402 }; 403 404 pcie1_clkreq_default: pcie1_clkreq_default { 405 mux { 406 pins = "gpio131"; 407 function = "pci_e1"; 408 }; 409 410 config { 411 pins = "gpio131"; 412 drive-strength = <2>; 413 bias-pull-up; 414 }; 415 }; 416 417 pcie1_perst_default: pcie1_perst_default { 418 mux { 419 pins = "gpio130"; 420 function = "gpio"; 421 }; 422 423 config { 424 pins = "gpio130"; 425 drive-strength = <2>; 426 bias-pull-down; 427 }; 428 }; 429 430 pcie1_wake_default: pcie1_wake_default { 431 mux { 432 pins = "gpio132"; 433 function = "gpio"; 434 }; 435 436 config { 437 pins = "gpio132"; 438 drive-strength = <2>; 439 bias-pull-down; 440 }; 441 }; 442 443 pcie1_clkreq_sleep: pcie1_clkreq_sleep { 444 mux { 445 pins = "gpio131"; 446 function = "gpio"; 447 }; 448 449 config { 450 pins = "gpio131"; 451 drive-strength = <2>; 452 bias-disable; 453 }; 454 }; 455 456 pcie1_wake_sleep: pcie1_wake_sleep { 457 mux { 458 pins = "gpio132"; 459 function = "gpio"; 460 }; 461 462 config { 463 pins = "gpio132"; 464 drive-strength = <2>; 465 bias-disable; 466 }; 467 }; 468 469 pcie2_clkreq_default: pcie2_clkreq_default { 470 mux { 471 pins = "gpio115"; 472 function = "pci_e2"; 473 }; 474 475 config { 476 pins = "gpio115"; 477 drive-strength = <2>; 478 bias-pull-up; 479 }; 480 }; 481 482 pcie2_perst_default: pcie2_perst_default { 483 mux { 484 pins = "gpio114"; 485 function = "gpio"; 486 }; 487 488 config { 489 pins = "gpio114"; 490 drive-strength = <2>; 491 bias-pull-down; 492 }; 493 }; 494 495 pcie2_wake_default: pcie2_wake_default { 496 mux { 497 pins = "gpio116"; 498 function = "gpio"; 499 }; 500 501 config { 502 pins = "gpio116"; 503 drive-strength = <2>; 504 bias-pull-down; 505 }; 506 }; 507 508 pcie2_clkreq_sleep: pcie2_clkreq_sleep { 509 mux { 510 pins = "gpio115"; 511 function = "gpio"; 512 }; 513 514 config { 515 pins = "gpio115"; 516 drive-strength = <2>; 517 bias-disable; 518 }; 519 }; 520 521 pcie2_wake_sleep: pcie2_wake_sleep { 522 mux { 523 pins = "gpio116"; 524 function = "gpio"; 525 }; 526 527 config { 528 pins = "gpio116"; 529 drive-strength = <2>; 530 bias-disable; 531 }; 532 }; 533 534 cci0_default: cci0_default { 535 pinmux { 536 function = "cci_i2c"; 537 pins = "gpio17", "gpio18"; 538 }; 539 pinconf { 540 pins = "gpio17", "gpio18"; 541 drive-strength = <16>; 542 bias-disable; 543 }; 544 }; 545 546 cci1_default: cci1_default { 547 pinmux { 548 function = "cci_i2c"; 549 pins = "gpio19", "gpio20"; 550 }; 551 pinconf { 552 pins = "gpio19", "gpio20"; 553 drive-strength = <16>; 554 bias-disable; 555 }; 556 }; 557 558 camera_board_default: camera_board_default { 559 mux_pwdn { 560 function = "gpio"; 561 pins = "gpio98"; 562 }; 563 config_pwdn { 564 pins = "gpio98"; 565 drive-strength = <16>; 566 bias-disable; 567 }; 568 569 mux_rst { 570 function = "gpio"; 571 pins = "gpio104"; 572 }; 573 config_rst { 574 pins = "gpio104"; 575 drive-strength = <16>; 576 bias-disable; 577 }; 578 579 mux_mclk1 { 580 function = "cam_mclk"; 581 pins = "gpio14"; 582 }; 583 config_mclk1 { 584 pins = "gpio14"; 585 drive-strength = <16>; 586 bias-disable; 587 }; 588 }; 589 590 camera_front_default: camera_front_default { 591 mux_pwdn { 592 function = "gpio"; 593 pins = "gpio133"; 594 }; 595 config_pwdn { 596 pins = "gpio133"; 597 drive-strength = <16>; 598 bias-disable; 599 }; 600 601 mux_rst { 602 function = "gpio"; 603 pins = "gpio23"; 604 }; 605 config_rst { 606 pins = "gpio23"; 607 drive-strength = <16>; 608 bias-disable; 609 }; 610 611 mux_mclk2 { 612 function = "cam_mclk"; 613 pins = "gpio15"; 614 }; 615 config_mclk2 { 616 pins = "gpio15"; 617 drive-strength = <16>; 618 bias-disable; 619 }; 620 }; 621 622 camera_rear_default: camera_rear_default { 623 mux_pwdn { 624 function = "gpio"; 625 pins = "gpio26"; 626 }; 627 config_pwdn { 628 pins = "gpio26"; 629 drive-strength = <16>; 630 bias-disable; 631 }; 632 633 mux_rst { 634 function = "gpio"; 635 pins = "gpio25"; 636 }; 637 config_rst { 638 pins = "gpio25"; 639 drive-strength = <16>; 640 bias-disable; 641 }; 642 643 mux_mclk0 { 644 function = "cam_mclk"; 645 pins = "gpio13"; 646 }; 647 config_mclk0 { 648 pins = "gpio13"; 649 drive-strength = <16>; 650 bias-disable; 651 }; 652 }; 653}; 654