xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/ipq9574-al02-c7.dts (revision 5ca8e32633c4ffbbcd6762e5888b6a4ba0708c6c)
1// SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
2/*
3 * IPQ9574 AL02-C7 board device tree source
4 *
5 * Copyright (c) 2020-2021 The Linux Foundation. All rights reserved.
6 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
7 */
8
9/dts-v1/;
10
11#include "ipq9574.dtsi"
12
13/ {
14	model = "Qualcomm Technologies, Inc. IPQ9574/AP-AL02-C7";
15	compatible = "qcom,ipq9574-ap-al02-c7", "qcom,ipq9574";
16
17	aliases {
18		serial0 = &blsp1_uart2;
19	};
20
21	chosen {
22		stdout-path = "serial0:115200n8";
23	};
24};
25
26&blsp1_uart2 {
27	pinctrl-0 = <&uart2_pins>;
28	pinctrl-names = "default";
29	status = "okay";
30};
31
32&sdhc_1 {
33	pinctrl-0 = <&sdc_default_state>;
34	pinctrl-names = "default";
35	mmc-ddr-1_8v;
36	mmc-hs200-1_8v;
37	mmc-hs400-1_8v;
38	mmc-hs400-enhanced-strobe;
39	max-frequency = <384000000>;
40	bus-width = <8>;
41	status = "okay";
42};
43
44&sleep_clk {
45	clock-frequency = <32000>;
46};
47
48&tlmm {
49	sdc_default_state: sdc-default-state {
50		clk-pins {
51			pins = "gpio5";
52			function = "sdc_clk";
53			drive-strength = <8>;
54			bias-disable;
55		};
56
57		cmd-pins {
58			pins = "gpio4";
59			function = "sdc_cmd";
60			drive-strength = <8>;
61			bias-pull-up;
62		};
63
64		data-pins {
65			pins = "gpio0", "gpio1", "gpio2",
66			       "gpio3", "gpio6", "gpio7",
67			       "gpio8", "gpio9";
68			function = "sdc_data";
69			drive-strength = <8>;
70			bias-pull-up;
71		};
72
73		rclk-pins {
74			pins = "gpio10";
75			function = "sdc_rclk";
76			drive-strength = <8>;
77			bias-pull-down;
78		};
79	};
80};
81
82&xo_board_clk {
83	clock-frequency = <24000000>;
84};
85