xref: /freebsd/sys/contrib/device-tree/src/arm64/qcom/ipq5332-rdp441.dts (revision 8d13bc63c0e1d50bc9e47ac1f26329c999bfecf0)

// SPDX-License-Identifier: BSD-3-Clause
/*
 * IPQ5332 AP-MI01.2 board device tree source
 *
 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

/dts-v1/;

#include "ipq5332-rdp-common.dtsi"

/ {
	model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2";
	compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332";
};

&blsp1_i2c1 {
	clock-frequency = <400000>;
	pinctrl-0 = <&i2c_1_pins>;
	pinctrl-names = "default";
	status = "okay";
};

&sdhc {
	bus-width = <4>;
	max-frequency = <192000000>;
	mmc-ddr-1_8v;
	mmc-hs200-1_8v;
	non-removable;
	pinctrl-0 = <&sdc_default_state>;
	pinctrl-names = "default";
	status = "okay";
};

&tlmm {
	i2c_1_pins: i2c-1-state {
		pins = "gpio29", "gpio30";
		function = "blsp1_i2c0";
		drive-strength = <8>;
		bias-pull-up;
	};

	sdc_default_state: sdc-default-state {
		clk-pins {
			pins = "gpio13";
			function = "sdc_clk";
			drive-strength = <8>;
			bias-disable;
		};

		cmd-pins {
			pins = "gpio12";
			function = "sdc_cmd";
			drive-strength = <8>;
			bias-pull-up;
		};

		data-pins {
			pins = "gpio8", "gpio9", "gpio10", "gpio11";
			function = "sdc_data";
			drive-strength = <8>;
			bias-pull-up;
		};
	};
};