1// SPDX-License-Identifier: GPL-2.0 2/dts-v1/; 3 4#include <dt-bindings/input/input.h> 5#include <dt-bindings/mfd/max77620.h> 6#include <dt-bindings/pinctrl/pinctrl-tegra.h> 7 8#include "tegra210.dtsi" 9 10/ { 11 model = "Google Pixel C"; 12 compatible = "google,smaug-rev8", "google,smaug-rev7", 13 "google,smaug-rev6", "google,smaug-rev5", 14 "google,smaug-rev4", "google,smaug-rev3", 15 "google,smaug-rev2", "google,smaug-rev1", 16 "google,smaug", "nvidia,tegra210"; 17 18 aliases { 19 serial0 = &uarta; 20 serial3 = &uartd; 21 }; 22 23 chosen { 24 bootargs = "earlycon"; 25 stdout-path = "serial0:115200n8"; 26 }; 27 28 memory { 29 device_type = "memory"; 30 reg = <0x0 0x80000000 0x0 0xc0000000>; 31 }; 32 33 host1x@50000000 { 34 dpaux: dpaux@545c0000 { 35 status = "okay"; 36 }; 37 }; 38 39 gpu@57000000 { 40 vdd-supply = <&max77621_gpu>; 41 status = "okay"; 42 }; 43 44 pinmux: pinmux@700008d4 { 45 pinctrl-names = "boot"; 46 pinctrl-0 = <&state_boot>; 47 48 state_boot: pinmux { 49 pex_l0_rst_n_pa0 { 50 nvidia,pins = "pex_l0_rst_n_pa0"; 51 nvidia,function = "rsvd1"; 52 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 53 nvidia,tristate = <TEGRA_PIN_ENABLE>; 54 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 55 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 56 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 57 }; 58 pex_l0_clkreq_n_pa1 { 59 nvidia,pins = "pex_l0_clkreq_n_pa1"; 60 nvidia,function = "rsvd1"; 61 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 62 nvidia,tristate = <TEGRA_PIN_ENABLE>; 63 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 64 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 65 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 66 }; 67 pex_wake_n_pa2 { 68 nvidia,pins = "pex_wake_n_pa2"; 69 nvidia,function = "rsvd1"; 70 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 71 nvidia,tristate = <TEGRA_PIN_ENABLE>; 72 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 73 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 74 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 75 }; 76 pex_l1_rst_n_pa3 { 77 nvidia,pins = "pex_l1_rst_n_pa3"; 78 nvidia,function = "rsvd1"; 79 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 80 nvidia,tristate = <TEGRA_PIN_ENABLE>; 81 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 82 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 83 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 84 }; 85 pex_l1_clkreq_n_pa4 { 86 nvidia,pins = "pex_l1_clkreq_n_pa4"; 87 nvidia,function = "rsvd1"; 88 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 89 nvidia,tristate = <TEGRA_PIN_ENABLE>; 90 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 91 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 92 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 93 }; 94 sata_led_active_pa5 { 95 nvidia,pins = "sata_led_active_pa5"; 96 nvidia,function = "rsvd1"; 97 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 98 nvidia,tristate = <TEGRA_PIN_ENABLE>; 99 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 100 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 101 }; 102 pa6 { 103 nvidia,pins = "pa6"; 104 nvidia,function = "rsvd1"; 105 nvidia,pull = <TEGRA_PIN_PULL_UP>; 106 nvidia,tristate = <TEGRA_PIN_DISABLE>; 107 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 108 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 109 }; 110 dap1_fs_pb0 { 111 nvidia,pins = "dap1_fs_pb0"; 112 nvidia,function = "i2s1"; 113 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 114 nvidia,tristate = <TEGRA_PIN_DISABLE>; 115 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 116 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 117 }; 118 dap1_din_pb1 { 119 nvidia,pins = "dap1_din_pb1"; 120 nvidia,function = "i2s1"; 121 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 122 nvidia,tristate = <TEGRA_PIN_DISABLE>; 123 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 124 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 125 }; 126 dap1_dout_pb2 { 127 nvidia,pins = "dap1_dout_pb2"; 128 nvidia,function = "i2s1"; 129 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 130 nvidia,tristate = <TEGRA_PIN_DISABLE>; 131 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 132 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 133 }; 134 dap1_sclk_pb3 { 135 nvidia,pins = "dap1_sclk_pb3"; 136 nvidia,function = "i2s1"; 137 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 138 nvidia,tristate = <TEGRA_PIN_DISABLE>; 139 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 140 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 141 }; 142 spi2_mosi_pb4 { 143 nvidia,pins = "spi2_mosi_pb4"; 144 nvidia,pull = <TEGRA_PIN_PULL_UP>; 145 nvidia,tristate = <TEGRA_PIN_DISABLE>; 146 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 147 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 148 }; 149 spi2_miso_pb5 { 150 nvidia,pins = "spi2_miso_pb5"; 151 nvidia,function = "rsvd2"; 152 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 153 nvidia,tristate = <TEGRA_PIN_ENABLE>; 154 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 155 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 156 }; 157 spi2_sck_pb6 { 158 nvidia,pins = "spi2_sck_pb6"; 159 nvidia,function = "rsvd2"; 160 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 161 nvidia,tristate = <TEGRA_PIN_ENABLE>; 162 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 163 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 164 }; 165 spi2_cs0_pb7 { 166 nvidia,pins = "spi2_cs0_pb7"; 167 nvidia,function = "rsvd2"; 168 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 169 nvidia,tristate = <TEGRA_PIN_ENABLE>; 170 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 171 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 172 }; 173 spi1_mosi_pc0 { 174 nvidia,pins = "spi1_mosi_pc0"; 175 nvidia,function = "spi1"; 176 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 177 nvidia,tristate = <TEGRA_PIN_DISABLE>; 178 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 179 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 180 }; 181 spi1_miso_pc1 { 182 nvidia,pins = "spi1_miso_pc1"; 183 nvidia,function = "spi1"; 184 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 185 nvidia,tristate = <TEGRA_PIN_DISABLE>; 186 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 187 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 188 }; 189 spi1_sck_pc2 { 190 nvidia,pins = "spi1_sck_pc2"; 191 nvidia,function = "spi1"; 192 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 193 nvidia,tristate = <TEGRA_PIN_DISABLE>; 194 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 195 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 196 }; 197 spi1_cs0_pc3 { 198 nvidia,pins = "spi1_cs0_pc3"; 199 nvidia,function = "spi1"; 200 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 201 nvidia,tristate = <TEGRA_PIN_DISABLE>; 202 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 203 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 204 }; 205 spi1_cs1_pc4 { 206 nvidia,pins = "spi1_cs1_pc4"; 207 nvidia,function = "rsvd1"; 208 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 209 nvidia,tristate = <TEGRA_PIN_ENABLE>; 210 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 211 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 212 }; 213 spi4_sck_pc5 { 214 nvidia,pins = "spi4_sck_pc5"; 215 nvidia,function = "rsvd1"; 216 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 217 nvidia,tristate = <TEGRA_PIN_ENABLE>; 218 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 219 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 220 }; 221 spi4_cs0_pc6 { 222 nvidia,pins = "spi4_cs0_pc6"; 223 nvidia,function = "rsvd1"; 224 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 225 nvidia,tristate = <TEGRA_PIN_ENABLE>; 226 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 227 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 228 }; 229 spi4_mosi_pc7 { 230 nvidia,pins = "spi4_mosi_pc7"; 231 nvidia,function = "rsvd1"; 232 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 233 nvidia,tristate = <TEGRA_PIN_ENABLE>; 234 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 235 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 236 }; 237 spi4_miso_pd0 { 238 nvidia,pins = "spi4_miso_pd0"; 239 nvidia,function = "rsvd1"; 240 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 241 nvidia,tristate = <TEGRA_PIN_ENABLE>; 242 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 243 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 244 }; 245 uart3_tx_pd1 { 246 nvidia,pins = "uart3_tx_pd1"; 247 nvidia,function = "uartc"; 248 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 249 nvidia,tristate = <TEGRA_PIN_DISABLE>; 250 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 251 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 252 }; 253 uart3_rx_pd2 { 254 nvidia,pins = "uart3_rx_pd2"; 255 nvidia,function = "uartc"; 256 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 257 nvidia,tristate = <TEGRA_PIN_DISABLE>; 258 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 259 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 260 }; 261 uart3_rts_pd3 { 262 nvidia,pins = "uart3_rts_pd3"; 263 nvidia,function = "uartc"; 264 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 265 nvidia,tristate = <TEGRA_PIN_DISABLE>; 266 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 267 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 268 }; 269 uart3_cts_pd4 { 270 nvidia,pins = "uart3_cts_pd4"; 271 nvidia,function = "uartc"; 272 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 273 nvidia,tristate = <TEGRA_PIN_DISABLE>; 274 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 275 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 276 }; 277 dmic1_clk_pe0 { 278 nvidia,pins = "dmic1_clk_pe0"; 279 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 280 nvidia,tristate = <TEGRA_PIN_DISABLE>; 281 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 282 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 283 }; 284 dmic1_dat_pe1 { 285 nvidia,pins = "dmic1_dat_pe1"; 286 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 287 nvidia,tristate = <TEGRA_PIN_DISABLE>; 288 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 289 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 290 }; 291 dmic2_clk_pe2 { 292 nvidia,pins = "dmic2_clk_pe2"; 293 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 294 nvidia,tristate = <TEGRA_PIN_DISABLE>; 295 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 296 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 297 }; 298 dmic2_dat_pe3 { 299 nvidia,pins = "dmic2_dat_pe3"; 300 nvidia,pull = <TEGRA_PIN_PULL_UP>; 301 nvidia,tristate = <TEGRA_PIN_DISABLE>; 302 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 303 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 304 }; 305 dmic3_clk_pe4 { 306 nvidia,pins = "dmic3_clk_pe4"; 307 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 308 nvidia,tristate = <TEGRA_PIN_DISABLE>; 309 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 310 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 311 }; 312 dmic3_dat_pe5 { 313 nvidia,pins = "dmic3_dat_pe5"; 314 nvidia,function = "rsvd2"; 315 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 316 nvidia,tristate = <TEGRA_PIN_ENABLE>; 317 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 318 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 319 }; 320 pe6 { 321 nvidia,pins = "pe6"; 322 nvidia,pull = <TEGRA_PIN_PULL_UP>; 323 nvidia,tristate = <TEGRA_PIN_DISABLE>; 324 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 325 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 326 }; 327 pe7 { 328 nvidia,pins = "pe7"; 329 nvidia,pull = <TEGRA_PIN_PULL_UP>; 330 nvidia,tristate = <TEGRA_PIN_DISABLE>; 331 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 332 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 333 }; 334 gen3_i2c_scl_pf0 { 335 nvidia,pins = "gen3_i2c_scl_pf0"; 336 nvidia,function = "i2c3"; 337 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 338 nvidia,tristate = <TEGRA_PIN_DISABLE>; 339 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 340 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 341 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 342 }; 343 gen3_i2c_sda_pf1 { 344 nvidia,pins = "gen3_i2c_sda_pf1"; 345 nvidia,function = "i2c3"; 346 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 347 nvidia,tristate = <TEGRA_PIN_DISABLE>; 348 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 349 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 350 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 351 }; 352 uart2_tx_pg0 { 353 nvidia,pins = "uart2_tx_pg0"; 354 nvidia,function = "uartb"; 355 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 356 nvidia,tristate = <TEGRA_PIN_ENABLE>; 357 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 358 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 359 }; 360 uart2_rx_pg1 { 361 nvidia,pins = "uart2_rx_pg1"; 362 nvidia,function = "uartb"; 363 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 364 nvidia,tristate = <TEGRA_PIN_ENABLE>; 365 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 366 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 367 }; 368 uart2_rts_pg2 { 369 nvidia,pins = "uart2_rts_pg2"; 370 nvidia,function = "rsvd2"; 371 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 372 nvidia,tristate = <TEGRA_PIN_ENABLE>; 373 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 374 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 375 }; 376 uart2_cts_pg3 { 377 nvidia,pins = "uart2_cts_pg3"; 378 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 379 nvidia,tristate = <TEGRA_PIN_DISABLE>; 380 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 381 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 382 }; 383 wifi_en_ph0 { 384 nvidia,pins = "wifi_en_ph0"; 385 nvidia,pull = <TEGRA_PIN_PULL_UP>; 386 nvidia,tristate = <TEGRA_PIN_DISABLE>; 387 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 388 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 389 }; 390 wifi_rst_ph1 { 391 nvidia,pins = "wifi_rst_ph1"; 392 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 393 nvidia,tristate = <TEGRA_PIN_DISABLE>; 394 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 395 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 396 }; 397 wifi_wake_ap_ph2 { 398 nvidia,pins = "wifi_wake_ap_ph2"; 399 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 400 nvidia,tristate = <TEGRA_PIN_DISABLE>; 401 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 402 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 403 }; 404 ap_wake_bt_ph3 { 405 nvidia,pins = "ap_wake_bt_ph3"; 406 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 407 nvidia,tristate = <TEGRA_PIN_DISABLE>; 408 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 409 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 410 }; 411 bt_rst_ph4 { 412 nvidia,pins = "bt_rst_ph4"; 413 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 414 nvidia,tristate = <TEGRA_PIN_DISABLE>; 415 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 416 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 417 }; 418 bt_wake_ap_ph5 { 419 nvidia,pins = "bt_wake_ap_ph5"; 420 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 421 nvidia,tristate = <TEGRA_PIN_DISABLE>; 422 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 423 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 424 }; 425 ph6 { 426 nvidia,pins = "ph6"; 427 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 428 nvidia,tristate = <TEGRA_PIN_DISABLE>; 429 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 430 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 431 }; 432 ap_wake_nfc_ph7 { 433 nvidia,pins = "ap_wake_nfc_ph7"; 434 nvidia,function = "rsvd0"; 435 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 436 nvidia,tristate = <TEGRA_PIN_ENABLE>; 437 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 438 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 439 }; 440 nfc_en_pi0 { 441 nvidia,pins = "nfc_en_pi0"; 442 nvidia,function = "rsvd0"; 443 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 444 nvidia,tristate = <TEGRA_PIN_ENABLE>; 445 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 446 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 447 }; 448 nfc_int_pi1 { 449 nvidia,pins = "nfc_int_pi1"; 450 nvidia,function = "rsvd0"; 451 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 452 nvidia,tristate = <TEGRA_PIN_ENABLE>; 453 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 454 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 455 }; 456 gps_en_pi2 { 457 nvidia,pins = "gps_en_pi2"; 458 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 459 nvidia,tristate = <TEGRA_PIN_DISABLE>; 460 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 461 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 462 }; 463 gps_rst_pi3 { 464 nvidia,pins = "gps_rst_pi3"; 465 nvidia,function = "rsvd0"; 466 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 467 nvidia,tristate = <TEGRA_PIN_ENABLE>; 468 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 469 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 470 }; 471 uart4_tx_pi4 { 472 nvidia,pins = "uart4_tx_pi4"; 473 nvidia,function = "uartd"; 474 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 475 nvidia,tristate = <TEGRA_PIN_DISABLE>; 476 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 477 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 478 }; 479 uart4_rx_pi5 { 480 nvidia,pins = "uart4_rx_pi5"; 481 nvidia,function = "uartd"; 482 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 483 nvidia,tristate = <TEGRA_PIN_DISABLE>; 484 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 485 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 486 }; 487 uart4_rts_pi6 { 488 nvidia,pins = "uart4_rts_pi6"; 489 nvidia,function = "uartd"; 490 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 491 nvidia,tristate = <TEGRA_PIN_DISABLE>; 492 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 493 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 494 }; 495 uart4_cts_pi7 { 496 nvidia,pins = "uart4_cts_pi7"; 497 nvidia,function = "uartd"; 498 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 499 nvidia,tristate = <TEGRA_PIN_DISABLE>; 500 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 501 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 502 }; 503 gen1_i2c_sda_pj0 { 504 nvidia,pins = "gen1_i2c_sda_pj0"; 505 nvidia,function = "i2c1"; 506 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 507 nvidia,tristate = <TEGRA_PIN_DISABLE>; 508 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 509 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 510 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 511 }; 512 gen1_i2c_scl_pj1 { 513 nvidia,pins = "gen1_i2c_scl_pj1"; 514 nvidia,function = "i2c1"; 515 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 516 nvidia,tristate = <TEGRA_PIN_DISABLE>; 517 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 518 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 519 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 520 }; 521 gen2_i2c_scl_pj2 { 522 nvidia,pins = "gen2_i2c_scl_pj2"; 523 nvidia,function = "i2c2"; 524 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 525 nvidia,tristate = <TEGRA_PIN_DISABLE>; 526 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 527 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 528 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 529 }; 530 gen2_i2c_sda_pj3 { 531 nvidia,pins = "gen2_i2c_sda_pj3"; 532 nvidia,function = "i2c2"; 533 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 534 nvidia,tristate = <TEGRA_PIN_DISABLE>; 535 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 536 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 537 nvidia,io-hv = <TEGRA_PIN_ENABLE>; 538 }; 539 dap4_fs_pj4 { 540 nvidia,pins = "dap4_fs_pj4"; 541 nvidia,function = "rsvd1"; 542 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 543 nvidia,tristate = <TEGRA_PIN_ENABLE>; 544 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 545 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 546 }; 547 dap4_din_pj5 { 548 nvidia,pins = "dap4_din_pj5"; 549 nvidia,function = "rsvd1"; 550 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 551 nvidia,tristate = <TEGRA_PIN_ENABLE>; 552 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 553 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 554 }; 555 dap4_dout_pj6 { 556 nvidia,pins = "dap4_dout_pj6"; 557 nvidia,function = "rsvd1"; 558 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 559 nvidia,tristate = <TEGRA_PIN_ENABLE>; 560 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 561 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 562 }; 563 dap4_sclk_pj7 { 564 nvidia,pins = "dap4_sclk_pj7"; 565 nvidia,function = "rsvd1"; 566 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 567 nvidia,tristate = <TEGRA_PIN_ENABLE>; 568 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 569 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 570 }; 571 pk0 { 572 nvidia,pins = "pk0"; 573 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 574 nvidia,tristate = <TEGRA_PIN_DISABLE>; 575 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 576 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 577 }; 578 pk1 { 579 nvidia,pins = "pk1"; 580 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 581 nvidia,tristate = <TEGRA_PIN_DISABLE>; 582 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 583 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 584 }; 585 pk2 { 586 nvidia,pins = "pk2"; 587 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 588 nvidia,tristate = <TEGRA_PIN_DISABLE>; 589 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 590 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 591 }; 592 pk3 { 593 nvidia,pins = "pk3"; 594 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 595 nvidia,tristate = <TEGRA_PIN_DISABLE>; 596 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 597 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 598 }; 599 pk4 { 600 nvidia,pins = "pk4"; 601 nvidia,function = "rsvd1"; 602 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 603 nvidia,tristate = <TEGRA_PIN_ENABLE>; 604 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 605 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 606 }; 607 pk5 { 608 nvidia,pins = "pk5"; 609 nvidia,function = "rsvd1"; 610 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 611 nvidia,tristate = <TEGRA_PIN_ENABLE>; 612 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 613 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 614 }; 615 pk6 { 616 nvidia,pins = "pk6"; 617 nvidia,function = "rsvd1"; 618 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 619 nvidia,tristate = <TEGRA_PIN_ENABLE>; 620 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 621 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 622 }; 623 pk7 { 624 nvidia,pins = "pk7"; 625 nvidia,function = "rsvd1"; 626 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 627 nvidia,tristate = <TEGRA_PIN_ENABLE>; 628 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 629 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 630 }; 631 pl0 { 632 nvidia,pins = "pl0"; 633 nvidia,function = "rsvd0"; 634 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 635 nvidia,tristate = <TEGRA_PIN_ENABLE>; 636 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 637 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 638 }; 639 pl1 { 640 nvidia,pins = "pl1"; 641 nvidia,function = "rsvd1"; 642 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 643 nvidia,tristate = <TEGRA_PIN_ENABLE>; 644 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 645 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 646 }; 647 sdmmc1_clk_pm0 { 648 nvidia,pins = "sdmmc1_clk_pm0"; 649 nvidia,function = "rsvd1"; 650 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 651 nvidia,tristate = <TEGRA_PIN_ENABLE>; 652 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 653 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 654 }; 655 sdmmc1_cmd_pm1 { 656 nvidia,pins = "sdmmc1_cmd_pm1"; 657 nvidia,function = "rsvd2"; 658 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 659 nvidia,tristate = <TEGRA_PIN_ENABLE>; 660 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 661 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 662 }; 663 sdmmc1_dat3_pm2 { 664 nvidia,pins = "sdmmc1_dat3_pm2"; 665 nvidia,function = "rsvd2"; 666 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 667 nvidia,tristate = <TEGRA_PIN_ENABLE>; 668 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 669 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 670 }; 671 sdmmc1_dat2_pm3 { 672 nvidia,pins = "sdmmc1_dat2_pm3"; 673 nvidia,function = "rsvd2"; 674 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 675 nvidia,tristate = <TEGRA_PIN_ENABLE>; 676 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 677 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 678 }; 679 sdmmc1_dat1_pm4 { 680 nvidia,pins = "sdmmc1_dat1_pm4"; 681 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 682 nvidia,tristate = <TEGRA_PIN_DISABLE>; 683 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 684 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 685 }; 686 sdmmc1_dat0_pm5 { 687 nvidia,pins = "sdmmc1_dat0_pm5"; 688 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 689 nvidia,tristate = <TEGRA_PIN_DISABLE>; 690 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 691 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 692 }; 693 sdmmc3_clk_pp0 { 694 nvidia,pins = "sdmmc3_clk_pp0"; 695 nvidia,function = "rsvd1"; 696 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 697 nvidia,tristate = <TEGRA_PIN_ENABLE>; 698 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 699 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 700 }; 701 sdmmc3_cmd_pp1 { 702 nvidia,pins = "sdmmc3_cmd_pp1"; 703 nvidia,function = "rsvd1"; 704 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 705 nvidia,tristate = <TEGRA_PIN_ENABLE>; 706 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 707 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 708 }; 709 sdmmc3_dat3_pp2 { 710 nvidia,pins = "sdmmc3_dat3_pp2"; 711 nvidia,function = "rsvd1"; 712 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 713 nvidia,tristate = <TEGRA_PIN_ENABLE>; 714 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 715 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 716 }; 717 sdmmc3_dat2_pp3 { 718 nvidia,pins = "sdmmc3_dat2_pp3"; 719 nvidia,function = "rsvd1"; 720 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 721 nvidia,tristate = <TEGRA_PIN_ENABLE>; 722 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 723 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 724 }; 725 sdmmc3_dat1_pp4 { 726 nvidia,pins = "sdmmc3_dat1_pp4"; 727 nvidia,function = "rsvd1"; 728 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 729 nvidia,tristate = <TEGRA_PIN_ENABLE>; 730 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 731 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 732 }; 733 sdmmc3_dat0_pp5 { 734 nvidia,pins = "sdmmc3_dat0_pp5"; 735 nvidia,function = "rsvd1"; 736 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 737 nvidia,tristate = <TEGRA_PIN_ENABLE>; 738 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 739 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 740 }; 741 cam1_mclk_ps0 { 742 nvidia,pins = "cam1_mclk_ps0"; 743 nvidia,function = "extperiph3"; 744 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 745 nvidia,tristate = <TEGRA_PIN_DISABLE>; 746 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 747 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 748 }; 749 cam2_mclk_ps1 { 750 nvidia,pins = "cam2_mclk_ps1"; 751 nvidia,function = "extperiph3"; 752 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 753 nvidia,tristate = <TEGRA_PIN_DISABLE>; 754 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 755 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 756 }; 757 cam_i2c_scl_ps2 { 758 nvidia,pins = "cam_i2c_scl_ps2"; 759 nvidia,function = "i2cvi"; 760 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 761 nvidia,tristate = <TEGRA_PIN_DISABLE>; 762 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 763 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 764 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 765 }; 766 cam_i2c_sda_ps3 { 767 nvidia,pins = "cam_i2c_sda_ps3"; 768 nvidia,function = "i2cvi"; 769 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 770 nvidia,tristate = <TEGRA_PIN_DISABLE>; 771 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 772 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 773 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 774 }; 775 cam_rst_ps4 { 776 nvidia,pins = "cam_rst_ps4"; 777 nvidia,function = "rsvd1"; 778 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 779 nvidia,tristate = <TEGRA_PIN_ENABLE>; 780 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 781 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 782 }; 783 cam_af_en_ps5 { 784 nvidia,pins = "cam_af_en_ps5"; 785 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 786 nvidia,tristate = <TEGRA_PIN_DISABLE>; 787 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 788 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 789 }; 790 cam_flash_en_ps6 { 791 nvidia,pins = "cam_flash_en_ps6"; 792 nvidia,function = "rsvd2"; 793 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 794 nvidia,tristate = <TEGRA_PIN_ENABLE>; 795 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 796 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 797 }; 798 cam1_pwdn_ps7 { 799 nvidia,pins = "cam1_pwdn_ps7"; 800 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 801 nvidia,tristate = <TEGRA_PIN_DISABLE>; 802 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 803 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 804 }; 805 cam2_pwdn_pt0 { 806 nvidia,pins = "cam2_pwdn_pt0"; 807 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 808 nvidia,tristate = <TEGRA_PIN_DISABLE>; 809 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 810 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 811 }; 812 cam1_strobe_pt1 { 813 nvidia,pins = "cam1_strobe_pt1"; 814 nvidia,function = "rsvd1"; 815 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 816 nvidia,tristate = <TEGRA_PIN_ENABLE>; 817 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 818 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 819 }; 820 uart1_tx_pu0 { 821 nvidia,pins = "uart1_tx_pu0"; 822 nvidia,function = "uarta"; 823 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 824 nvidia,tristate = <TEGRA_PIN_DISABLE>; 825 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 826 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 827 }; 828 uart1_rx_pu1 { 829 nvidia,pins = "uart1_rx_pu1"; 830 nvidia,function = "uarta"; 831 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 832 nvidia,tristate = <TEGRA_PIN_DISABLE>; 833 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 834 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 835 }; 836 uart1_rts_pu2 { 837 nvidia,pins = "uart1_rts_pu2"; 838 nvidia,function = "rsvd1"; 839 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 840 nvidia,tristate = <TEGRA_PIN_ENABLE>; 841 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 842 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 843 }; 844 uart1_cts_pu3 { 845 nvidia,pins = "uart1_cts_pu3"; 846 nvidia,function = "rsvd1"; 847 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 848 nvidia,tristate = <TEGRA_PIN_ENABLE>; 849 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 850 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 851 }; 852 lcd_bl_pwm_pv0 { 853 nvidia,pins = "lcd_bl_pwm_pv0"; 854 nvidia,function = "rsvd3"; 855 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 856 nvidia,tristate = <TEGRA_PIN_ENABLE>; 857 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 858 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 859 }; 860 lcd_bl_en_pv1 { 861 nvidia,pins = "lcd_bl_en_pv1"; 862 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 863 nvidia,tristate = <TEGRA_PIN_DISABLE>; 864 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 865 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 866 }; 867 lcd_rst_pv2 { 868 nvidia,pins = "lcd_rst_pv2"; 869 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 870 nvidia,tristate = <TEGRA_PIN_DISABLE>; 871 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 872 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 873 }; 874 lcd_gpio1_pv3 { 875 nvidia,pins = "lcd_gpio1_pv3"; 876 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 877 nvidia,tristate = <TEGRA_PIN_DISABLE>; 878 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 879 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 880 }; 881 lcd_gpio2_pv4 { 882 nvidia,pins = "lcd_gpio2_pv4"; 883 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 884 nvidia,tristate = <TEGRA_PIN_DISABLE>; 885 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 886 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 887 }; 888 ap_ready_pv5 { 889 nvidia,pins = "ap_ready_pv5"; 890 nvidia,function = "rsvd0"; 891 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 892 nvidia,tristate = <TEGRA_PIN_ENABLE>; 893 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 894 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 895 }; 896 touch_rst_pv6 { 897 nvidia,pins = "touch_rst_pv6"; 898 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 899 nvidia,tristate = <TEGRA_PIN_DISABLE>; 900 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 901 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 902 }; 903 touch_clk_pv7 { 904 nvidia,pins = "touch_clk_pv7"; 905 nvidia,function = "touch"; 906 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 907 nvidia,tristate = <TEGRA_PIN_DISABLE>; 908 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 909 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 910 }; 911 modem_wake_ap_px0 { 912 nvidia,pins = "modem_wake_ap_px0"; 913 nvidia,function = "rsvd0"; 914 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 915 nvidia,tristate = <TEGRA_PIN_ENABLE>; 916 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 917 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 918 }; 919 touch_int_px1 { 920 nvidia,pins = "touch_int_px1"; 921 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 922 nvidia,tristate = <TEGRA_PIN_DISABLE>; 923 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 924 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 925 }; 926 motion_int_px2 { 927 nvidia,pins = "motion_int_px2"; 928 nvidia,function = "rsvd0"; 929 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 930 nvidia,tristate = <TEGRA_PIN_ENABLE>; 931 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 932 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 933 }; 934 als_prox_int_px3 { 935 nvidia,pins = "als_prox_int_px3"; 936 nvidia,function = "rsvd0"; 937 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 938 nvidia,tristate = <TEGRA_PIN_ENABLE>; 939 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 940 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 941 }; 942 temp_alert_px4 { 943 nvidia,pins = "temp_alert_px4"; 944 nvidia,pull = <TEGRA_PIN_PULL_UP>; 945 nvidia,tristate = <TEGRA_PIN_DISABLE>; 946 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 947 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 948 }; 949 button_power_on_px5 { 950 nvidia,pins = "button_power_on_px5"; 951 nvidia,pull = <TEGRA_PIN_PULL_UP>; 952 nvidia,tristate = <TEGRA_PIN_DISABLE>; 953 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 954 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 955 }; 956 button_vol_up_px6 { 957 nvidia,pins = "button_vol_up_px6"; 958 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 959 nvidia,tristate = <TEGRA_PIN_DISABLE>; 960 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 961 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 962 }; 963 button_vol_down_px7 { 964 nvidia,pins = "button_vol_down_px7"; 965 nvidia,pull = <TEGRA_PIN_PULL_UP>; 966 nvidia,tristate = <TEGRA_PIN_DISABLE>; 967 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 968 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 969 }; 970 button_slide_sw_py0 { 971 nvidia,pins = "button_slide_sw_py0"; 972 nvidia,pull = <TEGRA_PIN_PULL_UP>; 973 nvidia,tristate = <TEGRA_PIN_DISABLE>; 974 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 975 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 976 }; 977 button_home_py1 { 978 nvidia,pins = "button_home_py1"; 979 nvidia,pull = <TEGRA_PIN_PULL_UP>; 980 nvidia,tristate = <TEGRA_PIN_DISABLE>; 981 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 982 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 983 }; 984 lcd_te_py2 { 985 nvidia,pins = "lcd_te_py2"; 986 nvidia,function = "displaya"; 987 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 988 nvidia,tristate = <TEGRA_PIN_DISABLE>; 989 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 990 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 991 }; 992 pwr_i2c_scl_py3 { 993 nvidia,pins = "pwr_i2c_scl_py3"; 994 nvidia,function = "i2cpmu"; 995 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 996 nvidia,tristate = <TEGRA_PIN_DISABLE>; 997 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 998 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 999 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1000 }; 1001 pwr_i2c_sda_py4 { 1002 nvidia,pins = "pwr_i2c_sda_py4"; 1003 nvidia,function = "i2cpmu"; 1004 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1005 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1006 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1007 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1008 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1009 }; 1010 clk_32k_out_py5 { 1011 nvidia,pins = "clk_32k_out_py5"; 1012 nvidia,function = "soc"; 1013 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1014 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1015 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1016 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1017 }; 1018 pz0 { 1019 nvidia,pins = "pz0"; 1020 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1021 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1022 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1023 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1024 }; 1025 pz1 { 1026 nvidia,pins = "pz1"; 1027 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1028 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1029 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1030 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1031 }; 1032 pz2 { 1033 nvidia,pins = "pz2"; 1034 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1035 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1036 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1037 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1038 }; 1039 pz3 { 1040 nvidia,pins = "pz3"; 1041 nvidia,function = "rsvd1"; 1042 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1043 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1044 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1045 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1046 }; 1047 pz4 { 1048 nvidia,pins = "pz4"; 1049 nvidia,function = "rsvd1"; 1050 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1051 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1052 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1053 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1054 }; 1055 pz5 { 1056 nvidia,pins = "pz5"; 1057 nvidia,function = "soc"; 1058 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1059 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1060 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1061 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1062 }; 1063 dap2_fs_paa0 { 1064 nvidia,pins = "dap2_fs_paa0"; 1065 nvidia,function = "i2s2"; 1066 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1067 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1068 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1069 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1070 }; 1071 dap2_sclk_paa1 { 1072 nvidia,pins = "dap2_sclk_paa1"; 1073 nvidia,function = "i2s2"; 1074 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1075 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1076 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1077 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1078 }; 1079 dap2_din_paa2 { 1080 nvidia,pins = "dap2_din_paa2"; 1081 nvidia,function = "i2s2"; 1082 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1083 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1084 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1085 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1086 }; 1087 dap2_dout_paa3 { 1088 nvidia,pins = "dap2_dout_paa3"; 1089 nvidia,function = "i2s2"; 1090 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1091 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1092 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1093 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1094 }; 1095 aud_mclk_pbb0 { 1096 nvidia,pins = "aud_mclk_pbb0"; 1097 nvidia,function = "aud"; 1098 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1099 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1100 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1101 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1102 }; 1103 dvfs_pwm_pbb1 { 1104 nvidia,pins = "dvfs_pwm_pbb1"; 1105 nvidia,function = "rsvd0"; 1106 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1107 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1108 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1109 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1110 }; 1111 dvfs_clk_pbb2 { 1112 nvidia,pins = "dvfs_clk_pbb2"; 1113 nvidia,function = "rsvd0"; 1114 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1115 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1116 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1117 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1118 }; 1119 gpio_x1_aud_pbb3 { 1120 nvidia,pins = "gpio_x1_aud_pbb3"; 1121 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1122 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1123 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1124 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1125 }; 1126 gpio_x3_aud_pbb4 { 1127 nvidia,pins = "gpio_x3_aud_pbb4"; 1128 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1129 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1130 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1131 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1132 }; 1133 hdmi_cec_pcc0 { 1134 nvidia,pins = "hdmi_cec_pcc0"; 1135 nvidia,function = "rsvd1"; 1136 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1137 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1138 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1139 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1140 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1141 }; 1142 hdmi_int_dp_hpd_pcc1 { 1143 nvidia,pins = "hdmi_int_dp_hpd_pcc1"; 1144 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1145 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1146 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1147 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1148 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1149 }; 1150 spdif_out_pcc2 { 1151 nvidia,pins = "spdif_out_pcc2"; 1152 nvidia,function = "rsvd1"; 1153 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1154 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1155 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1156 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1157 }; 1158 spdif_in_pcc3 { 1159 nvidia,pins = "spdif_in_pcc3"; 1160 nvidia,function = "rsvd1"; 1161 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1162 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1163 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1164 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1165 }; 1166 usb_vbus_en0_pcc4 { 1167 nvidia,pins = "usb_vbus_en0_pcc4"; 1168 nvidia,function = "rsvd1"; 1169 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1170 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1171 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1172 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1173 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1174 }; 1175 usb_vbus_en1_pcc5 { 1176 nvidia,pins = "usb_vbus_en1_pcc5"; 1177 nvidia,function = "rsvd1"; 1178 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1179 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1180 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1181 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1182 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1183 }; 1184 dp_hpd0_pcc6 { 1185 nvidia,pins = "dp_hpd0_pcc6"; 1186 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1187 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1188 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1189 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1190 }; 1191 pcc7 { 1192 nvidia,pins = "pcc7"; 1193 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1194 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1195 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1196 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1197 nvidia,io-hv = <TEGRA_PIN_DISABLE>; 1198 }; 1199 spi2_cs1_pdd0 { 1200 nvidia,pins = "spi2_cs1_pdd0"; 1201 nvidia,function = "rsvd1"; 1202 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1203 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1204 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1205 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1206 }; 1207 qspi_sck_pee0 { 1208 nvidia,pins = "qspi_sck_pee0"; 1209 nvidia,function = "qspi"; 1210 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1211 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1212 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1213 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1214 }; 1215 qspi_cs_n_pee1 { 1216 nvidia,pins = "qspi_cs_n_pee1"; 1217 nvidia,function = "qspi"; 1218 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1219 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1220 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1221 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1222 }; 1223 qspi_io0_pee2 { 1224 nvidia,pins = "qspi_io0_pee2"; 1225 nvidia,function = "qspi"; 1226 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1227 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1228 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1229 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1230 }; 1231 qspi_io1_pee3 { 1232 nvidia,pins = "qspi_io1_pee3"; 1233 nvidia,function = "qspi"; 1234 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1235 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1236 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1237 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1238 }; 1239 qspi_io2_pee4 { 1240 nvidia,pins = "qspi_io2_pee4"; 1241 nvidia,function = "rsvd1"; 1242 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1243 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1244 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1245 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1246 }; 1247 qspi_io3_pee5 { 1248 nvidia,pins = "qspi_io3_pee5"; 1249 nvidia,function = "rsvd1"; 1250 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1251 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1252 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1253 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1254 }; 1255 core_pwr_req { 1256 nvidia,pins = "core_pwr_req"; 1257 nvidia,function = "core"; 1258 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1259 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1260 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1261 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1262 }; 1263 cpu_pwr_req { 1264 nvidia,pins = "cpu_pwr_req"; 1265 nvidia,function = "cpu"; 1266 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1267 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1268 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1269 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1270 }; 1271 pwr_int_n { 1272 nvidia,pins = "pwr_int_n"; 1273 nvidia,function = "pmi"; 1274 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1275 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1276 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1277 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1278 }; 1279 clk_32k_in { 1280 nvidia,pins = "clk_32k_in"; 1281 nvidia,function = "clk"; 1282 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1283 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1284 nvidia,enable-input = <TEGRA_PIN_ENABLE>; 1285 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1286 }; 1287 jtag_rtck { 1288 nvidia,pins = "jtag_rtck"; 1289 nvidia,function = "jtag"; 1290 nvidia,pull = <TEGRA_PIN_PULL_UP>; 1291 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1292 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1293 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1294 }; 1295 clk_req { 1296 nvidia,pins = "clk_req"; 1297 nvidia,function = "rsvd1"; 1298 nvidia,pull = <TEGRA_PIN_PULL_DOWN>; 1299 nvidia,tristate = <TEGRA_PIN_ENABLE>; 1300 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1301 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1302 }; 1303 shutdown { 1304 nvidia,pins = "shutdown"; 1305 nvidia,function = "shutdown"; 1306 nvidia,pull = <TEGRA_PIN_PULL_NONE>; 1307 nvidia,tristate = <TEGRA_PIN_DISABLE>; 1308 nvidia,enable-input = <TEGRA_PIN_DISABLE>; 1309 nvidia,open-drain = <TEGRA_PIN_DISABLE>; 1310 }; 1311 }; 1312 }; 1313 1314 serial@70006000 { 1315 status = "okay"; 1316 }; 1317 1318 uartd: serial@70006300 { 1319 compatible = "nvidia,tegra30-hsuart"; 1320 status = "okay"; 1321 1322 bluetooth { 1323 compatible = "brcm,bcm43540-bt"; 1324 max-speed = <4000000>; 1325 brcm,bt-pcm-int-params = [01 02 00 01 01]; 1326 device-wakeup-gpios = <&gpio TEGRA_GPIO(H, 3) GPIO_ACTIVE_HIGH>; 1327 shutdown-gpios = <&gpio TEGRA_GPIO(H, 4) GPIO_ACTIVE_HIGH>; 1328 interrupt-parent = <&gpio>; 1329 interrupts = <TEGRA_GPIO(H, 5) IRQ_TYPE_LEVEL_LOW>; 1330 interrupt-names = "host-wakeup"; 1331 }; 1332 }; 1333 1334 i2c@7000c400 { 1335 status = "okay"; 1336 clock-frequency = <1000000>; 1337 1338 ec@1e { 1339 compatible = "google,cros-ec-i2c"; 1340 reg = <0x1e>; 1341 interrupt-parent = <&gpio>; 1342 interrupts = <TEGRA_GPIO(Z, 1) IRQ_TYPE_LEVEL_LOW>; 1343 wakeup-source; 1344 1345 ec_i2c_0: i2c-tunnel { 1346 compatible = "google,cros-ec-i2c-tunnel"; 1347 #address-cells = <1>; 1348 #size-cells = <0>; 1349 1350 google,remote-bus = <0>; 1351 1352 battery: bq27742@55 { 1353 compatible = "ti,bq27742"; 1354 reg = <0x55>; 1355 }; 1356 }; 1357 }; 1358 }; 1359 1360 i2c@7000d000 { 1361 status = "okay"; 1362 clock-frequency = <1000000>; 1363 1364 max77621_cpu: max77621@1b { 1365 compatible = "maxim,max77621"; 1366 reg = <0x1b>; 1367 interrupt-parent = <&gpio>; 1368 interrupts = <TEGRA_GPIO(Y, 1) IRQ_TYPE_LEVEL_LOW>; 1369 regulator-always-on; 1370 regulator-boot-on; 1371 regulator-min-microvolt = <800000>; 1372 regulator-max-microvolt = <1231250>; 1373 regulator-name = "PPVAR_CPU"; 1374 regulator-ramp-delay = <12500>; 1375 maxim,dvs-default-state = <1>; 1376 maxim,enable-active-discharge; 1377 maxim,enable-bias-control; 1378 maxim,enable-gpio = <&pmic 5 0>; 1379 maxim,externally-enable; 1380 }; 1381 1382 max77621_gpu: regulator@1c { 1383 compatible = "maxim,max77621"; 1384 reg = <0x1c>; 1385 interrupt-parent = <&gpio>; 1386 interrupts = <TEGRA_GPIO(A, 6) IRQ_TYPE_LEVEL_LOW>; 1387 regulator-min-microvolt = <840000>; 1388 regulator-max-microvolt = <1150000>; 1389 regulator-name = "PPVAR_GPU"; 1390 regulator-ramp-delay = <12500>; 1391 maxim,dvs-default-state = <1>; 1392 maxim,enable-active-discharge; 1393 maxim,enable-bias-control; 1394 maxim,disable-etr; 1395 maxim,enable-gpio = <&pmic 6 GPIO_ACTIVE_HIGH>; 1396 maxim,externally-enable; 1397 }; 1398 1399 pmic: pmic@3c { 1400 compatible = "maxim,max77620"; 1401 reg = <0x3c>; 1402 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>; 1403 1404 #interrupt-cells = <2>; 1405 interrupt-controller; 1406 1407 gpio-controller; 1408 #gpio-cells = <2>; 1409 1410 pinctrl-names = "default"; 1411 pinctrl-0 = <&max77620_default>; 1412 1413 fps { 1414 fps0 { 1415 maxim,shutdown-fps-time-period-us = <5120>; 1416 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1417 }; 1418 1419 fps1 { 1420 maxim,shutdown-fps-time-period-us = <5120>; 1421 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 1422 maxim,device-state-on-disabled-event = <MAX77620_FPS_INACTIVE_STATE_SLEEP>; 1423 }; 1424 1425 fps2 { 1426 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 1427 }; 1428 }; 1429 1430 max77620_default: pinmux { 1431 gpio0_1_2_7 { 1432 pins = "gpio0", "gpio1", "gpio2", "gpio7"; 1433 function = "gpio"; 1434 }; 1435 1436 /* 1437 * GPIO3 is used to en_pp3300, and it is part of power 1438 * sequence, So it must be sequenced up (automatically 1439 * set by OTP) and down properly. 1440 */ 1441 gpio3 { 1442 pins = "gpio3"; 1443 function = "fps-out"; 1444 drive-open-drain = <1>; 1445 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1446 maxim,active-fps-power-up-slot = <4>; 1447 maxim,active-fps-power-down-slot = <2>; 1448 }; 1449 1450 gpio4 { 1451 pins = "gpio4"; 1452 function = "32k-out1"; 1453 }; 1454 1455 gpio5_6 { 1456 pins = "gpio5", "gpio6"; 1457 function = "gpio"; 1458 drive-push-pull = <1>; 1459 }; 1460 }; 1461 1462 regulators { 1463 in-ldo0-1-supply = <&pp1350>; 1464 in-ldo2-supply = <&pp3300>; 1465 in-ldo3-5-supply = <&pp3300>; 1466 in-ldo7-8-supply = <&pp1350>; 1467 1468 ppvar_soc: sd0 { 1469 regulator-name = "PPVAR_SOC"; 1470 regulator-min-microvolt = <825000>; 1471 regulator-max-microvolt = <1125000>; 1472 regulator-always-on; 1473 regulator-boot-on; 1474 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1475 maxim,active-fps-power-up-slot = <1>; 1476 maxim,active-fps-power-down-slot = <7>; 1477 }; 1478 1479 pp1100_sd1: sd1 { 1480 regulator-name = "PP1100"; 1481 regulator-min-microvolt = <1125000>; 1482 regulator-max-microvolt = <1125000>; 1483 regulator-always-on; 1484 regulator-boot-on; 1485 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1486 maxim,active-fps-power-up-slot = <5>; 1487 maxim,active-fps-power-down-slot = <1>; 1488 }; 1489 1490 pp1350: sd2 { 1491 regulator-name = "PP1350"; 1492 regulator-min-microvolt = <1350000>; 1493 regulator-max-microvolt = <1350000>; 1494 regulator-always-on; 1495 regulator-boot-on; 1496 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1497 maxim,active-fps-power-up-slot = <2>; 1498 maxim,active-fps-power-down-slot = <5>; 1499 }; 1500 1501 pp1800: sd3 { 1502 regulator-name = "PP1800"; 1503 regulator-min-microvolt = <1800000>; 1504 regulator-max-microvolt = <1800000>; 1505 regulator-always-on; 1506 regulator-boot-on; 1507 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1508 maxim,active-fps-power-up-slot = <3>; 1509 maxim,active-fps-power-down-slot = <3>; 1510 }; 1511 1512 pp1200_avdd: ldo0 { 1513 regulator-name = "PP1200_AVDD"; 1514 regulator-min-microvolt = <1200000>; 1515 regulator-max-microvolt = <1200000>; 1516 regulator-enable-ramp-delay = <26>; 1517 regulator-ramp-delay = <100000>; 1518 regulator-boot-on; 1519 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1520 maxim,active-fps-power-up-slot = <0>; 1521 maxim,active-fps-power-down-slot = <7>; 1522 }; 1523 1524 pp1200_rcam: ldo1 { 1525 regulator-name = "PP1200_RCAM"; 1526 regulator-min-microvolt = <1200000>; 1527 regulator-max-microvolt = <1200000>; 1528 regulator-enable-ramp-delay = <22>; 1529 regulator-ramp-delay = <100000>; 1530 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1531 maxim,active-fps-power-up-slot = <0>; 1532 maxim,active-fps-power-down-slot = <7>; 1533 }; 1534 1535 pp_ldo2: ldo2 { 1536 regulator-name = "PP_LDO2"; 1537 regulator-min-microvolt = <1800000>; 1538 regulator-max-microvolt = <1800000>; 1539 regulator-enable-ramp-delay = <62>; 1540 regulator-ramp-delay = <11000>; 1541 regulator-always-on; 1542 regulator-boot-on; 1543 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1544 maxim,active-fps-power-up-slot = <0>; 1545 maxim,active-fps-power-down-slot = <7>; 1546 }; 1547 1548 pp2800l_rcam: ldo3 { 1549 regulator-name = "PP2800L_RCAM"; 1550 regulator-min-microvolt = <2800000>; 1551 regulator-max-microvolt = <2800000>; 1552 regulator-enable-ramp-delay = <50>; 1553 regulator-ramp-delay = <100000>; 1554 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1555 maxim,active-fps-power-up-slot = <0>; 1556 maxim,active-fps-power-down-slot = <7>; 1557 }; 1558 1559 pp100_soc_rtc: ldo4 { 1560 regulator-name = "PP1100_SOC_RTC"; 1561 regulator-min-microvolt = <850000>; 1562 regulator-max-microvolt = <850000>; 1563 regulator-enable-ramp-delay = <22>; 1564 regulator-ramp-delay = <100000>; 1565 regulator-always-on; /* Check this */ 1566 regulator-boot-on; 1567 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 1568 maxim,active-fps-power-up-slot = <1>; 1569 maxim,active-fps-power-down-slot = <7>; 1570 }; 1571 1572 pp2800l_fcam: ldo5 { 1573 regulator-name = "PP2800L_FCAM"; 1574 regulator-min-microvolt = <2800000>; 1575 regulator-max-microvolt = <2800000>; 1576 regulator-enable-ramp-delay = <62>; 1577 regulator-ramp-delay = <100000>; 1578 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1579 maxim,active-fps-power-up-slot = <0>; 1580 maxim,active-fps-power-down-slot = <7>; 1581 }; 1582 1583 ldo6 { 1584 /* Unused. */ 1585 regulator-name = "PP_LDO6"; 1586 regulator-min-microvolt = <1800000>; 1587 regulator-max-microvolt = <1800000>; 1588 regulator-enable-ramp-delay = <36>; 1589 regulator-ramp-delay = <100000>; 1590 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1591 maxim,active-fps-power-up-slot = <0>; 1592 maxim,active-fps-power-down-slot = <7>; 1593 }; 1594 1595 pp1050_avdd: ldo7 { 1596 regulator-name = "PP1050_AVDD"; 1597 regulator-min-microvolt = <1050000>; 1598 regulator-max-microvolt = <1050000>; 1599 regulator-enable-ramp-delay = <24>; 1600 regulator-ramp-delay = <100000>; 1601 regulator-always-on; 1602 regulator-boot-on; 1603 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 1604 maxim,active-fps-power-up-slot = <3>; 1605 maxim,active-fps-power-down-slot = <4>; 1606 }; 1607 1608 avddio_1v05: ldo8 { 1609 regulator-name = "AVDDIO_1V05"; 1610 regulator-min-microvolt = <1050000>; 1611 regulator-max-microvolt = <1050000>; 1612 regulator-enable-ramp-delay = <22>; 1613 regulator-ramp-delay = <100000>; 1614 regulator-boot-on; 1615 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 1616 maxim,active-fps-power-up-slot = <0>; 1617 maxim,active-fps-power-down-slot = <7>; 1618 }; 1619 }; 1620 }; 1621 }; 1622 1623 i2c@7000d100 { 1624 status = "okay"; 1625 clock-frequency = <400000>; 1626 1627 nau8825@1a { 1628 compatible = "nuvoton,nau8825"; 1629 reg = <0x1a>; 1630 interrupt-parent = <&gpio>; 1631 interrupts = <TEGRA_GPIO(E, 6) IRQ_TYPE_LEVEL_LOW>; 1632 clocks = <&tegra_pmc TEGRA_PMC_CLK_OUT_2>; 1633 clock-names = "mclk"; 1634 1635 nuvoton,jkdet-enable; 1636 nuvoton,jkdet-polarity = <GPIO_ACTIVE_LOW>; 1637 nuvoton,vref-impedance = <2>; 1638 nuvoton,micbias-voltage = <6>; 1639 nuvoton,sar-threshold-num = <4>; 1640 nuvoton,sar-threshold = <0xc 0x1e 0x38 0x60>; 1641 nuvoton,sar-hysteresis = <1>; 1642 nuvoton,sar-voltage = <0>; 1643 nuvoton,sar-compare-time = <0>; 1644 nuvoton,sar-sampling-time = <0>; 1645 nuvoton,short-key-debounce = <2>; 1646 nuvoton,jack-insert-debounce = <7>; 1647 nuvoton,jack-eject-debounce = <7>; 1648 status = "okay"; 1649 }; 1650 1651 audio-codec@2d { 1652 compatible = "realtek,rt5677"; 1653 reg = <0x2d>; 1654 interrupt-parent = <&gpio>; 1655 interrupts = <TEGRA_GPIO(X, 0) IRQ_TYPE_LEVEL_HIGH>; 1656 realtek,reset-gpio = <&gpio TEGRA_GPIO(BB, 3) GPIO_ACTIVE_LOW>; 1657 gpio-controller; 1658 #gpio-cells = <2>; 1659 status = "okay"; 1660 }; 1661 }; 1662 1663 pmc@7000e400 { 1664 nvidia,invert-interrupt; 1665 nvidia,suspend-mode = <0>; 1666 nvidia,cpu-pwr-good-time = <0>; 1667 nvidia,cpu-pwr-off-time = <0>; 1668 nvidia,core-pwr-good-time = <12000 6000>; 1669 nvidia,core-pwr-off-time = <39053>; 1670 nvidia,core-power-req-active-high; 1671 nvidia,sys-clock-req-active-high; 1672 status = "okay"; 1673 }; 1674 1675 usb@70090000 { 1676 phys = <&{/padctl@7009f000/pads/usb2/lanes/usb2-0}>, 1677 <&{/padctl@7009f000/pads/pcie/lanes/pcie-6}>; 1678 phy-names = "usb2-0", "usb3-0"; 1679 1680 dvddio-pex-supply = <&avddio_1v05>; 1681 hvddio-pex-supply = <&pp1800>; 1682 avdd-usb-supply = <&pp3300>; 1683 1684 status = "okay"; 1685 }; 1686 1687 padctl@7009f000 { 1688 status = "okay"; 1689 1690 avdd-pll-utmip-supply = <&pp1800>; 1691 avdd-pll-uerefe-supply = <&pp1050_avdd>; 1692 dvdd-pex-pll-supply = <&avddio_1v05>; 1693 hvdd-pex-pll-e-supply = <&pp1800>; 1694 1695 pads { 1696 usb2 { 1697 status = "okay"; 1698 1699 lanes { 1700 usb2-0 { 1701 nvidia,function = "xusb"; 1702 status = "okay"; 1703 }; 1704 }; 1705 }; 1706 1707 pcie { 1708 status = "okay"; 1709 1710 lanes { 1711 pcie-6 { 1712 nvidia,function = "usb3-ss"; 1713 status = "okay"; 1714 }; 1715 }; 1716 }; 1717 }; 1718 1719 ports { 1720 usb2-0 { 1721 status = "okay"; 1722 vbus-supply = <&usbc_vbus>; 1723 mode = "otg"; 1724 }; 1725 1726 usb3-0 { 1727 nvidia,usb2-companion = <0>; 1728 status = "okay"; 1729 }; 1730 }; 1731 }; 1732 1733 mmc@700b0200 { 1734 power-gpios = <&gpio TEGRA_GPIO(H, 1) GPIO_ACTIVE_HIGH>; 1735 bus-width = <4>; 1736 non-removable; 1737 vqmmc-supply = <&pp1800>; 1738 vmmc-supply = <&pp3300>; 1739 #address-cells = <1>; 1740 #size-cells = <0>; 1741 status = "okay"; 1742 1743 wifi@1 { 1744 compatible = "brcm,bcm4354-fmac", "brcm,bcm4329-fmac"; 1745 reg = <1>; 1746 interrupt-parent = <&gpio>; 1747 interrupts = <TEGRA_GPIO(H, 2) IRQ_TYPE_LEVEL_HIGH>; 1748 interrupt-names = "host-wake"; 1749 }; 1750 }; 1751 1752 mmc@700b0600 { 1753 bus-width = <8>; 1754 non-removable; 1755 status = "okay"; 1756 }; 1757 1758 clock@70110000 { 1759 status = "okay"; 1760 nvidia,cf = <6>; 1761 nvidia,ci = <0>; 1762 nvidia,cg = <2>; 1763 nvidia,droop-ctrl = <0x00000f00>; 1764 nvidia,force-mode = <1>; 1765 nvidia,i2c-fs-rate = <400000>; 1766 nvidia,sample-rate = <12500>; 1767 vdd-cpu-supply = <&max77621_cpu>; 1768 }; 1769 1770 aconnect@702c0000 { 1771 status = "okay"; 1772 1773 dma-controller@702e2000 { 1774 status = "okay"; 1775 }; 1776 1777 interrupt-controller@702f9000 { 1778 status = "okay"; 1779 }; 1780 }; 1781 1782 clk32k_in: clock-32k { 1783 compatible = "fixed-clock"; 1784 clock-frequency = <32768>; 1785 #clock-cells = <0>; 1786 }; 1787 1788 cpus { 1789 cpu@0 { 1790 enable-method = "psci"; 1791 }; 1792 1793 cpu@1 { 1794 enable-method = "psci"; 1795 }; 1796 1797 cpu@2 { 1798 enable-method = "psci"; 1799 }; 1800 1801 cpu@3 { 1802 enable-method = "psci"; 1803 }; 1804 1805 idle-states { 1806 cpu-sleep { 1807 arm,psci-suspend-param = <0x00010007>; 1808 status = "okay"; 1809 }; 1810 }; 1811 }; 1812 1813 gpio-keys { 1814 compatible = "gpio-keys"; 1815 1816 key-power { 1817 label = "Power"; 1818 gpios = <&gpio TEGRA_GPIO(X, 5) GPIO_ACTIVE_LOW>; 1819 linux,code = <KEY_POWER>; 1820 debounce-interval = <30>; 1821 wakeup-source; 1822 }; 1823 1824 key-volume-down { 1825 label = "Volume Down"; 1826 gpios = <&gpio TEGRA_GPIO(X, 7) GPIO_ACTIVE_LOW>; 1827 linux,code = <KEY_VOLUMEDOWN>; 1828 }; 1829 1830 key-volume-up { 1831 label = "Volume Up"; 1832 gpios = <&gpio TEGRA_GPIO(M, 4) GPIO_ACTIVE_LOW>; 1833 linux,code = <KEY_VOLUMEUP>; 1834 }; 1835 1836 switch-lid { 1837 label = "Lid"; 1838 gpios = <&gpio TEGRA_GPIO(B, 4) GPIO_ACTIVE_LOW>; 1839 linux,input-type = <EV_SW>; 1840 linux,code = <SW_LID>; 1841 wakeup-source; 1842 }; 1843 1844 switch-tablet-mode { 1845 label = "Tablet Mode"; 1846 gpios = <&gpio TEGRA_GPIO(Z, 2) GPIO_ACTIVE_HIGH>; 1847 linux,input-type = <EV_SW>; 1848 linux,code = <SW_TABLET_MODE>; 1849 wakeup-source; 1850 }; 1851 }; 1852 1853 max98357a { 1854 compatible = "maxim,max98357a"; 1855 status = "okay"; 1856 }; 1857 1858 psci { 1859 compatible = "arm,psci-1.0"; 1860 method = "smc"; 1861 }; 1862 1863 ppvar_sys: regulator-ppvar-sys { 1864 compatible = "regulator-fixed"; 1865 regulator-name = "PPVAR_SYS"; 1866 regulator-min-microvolt = <4400000>; 1867 regulator-max-microvolt = <4400000>; 1868 regulator-always-on; 1869 }; 1870 1871 pplcd_vdd: regulator-pplcd-vdd { 1872 compatible = "regulator-fixed"; 1873 regulator-name = "PPLCD_VDD"; 1874 regulator-min-microvolt = <4400000>; 1875 regulator-max-microvolt = <4400000>; 1876 gpio = <&gpio TEGRA_GPIO(V, 4) 0>; 1877 enable-active-high; 1878 regulator-boot-on; 1879 }; 1880 1881 pp3000_always: regulator-pp3000-always { 1882 compatible = "regulator-fixed"; 1883 regulator-name = "PP3000_ALWAYS"; 1884 regulator-min-microvolt = <3000000>; 1885 regulator-max-microvolt = <3000000>; 1886 regulator-always-on; 1887 }; 1888 1889 pp3300: regulator-pp3000 { 1890 compatible = "regulator-fixed"; 1891 regulator-name = "PP3300"; 1892 regulator-min-microvolt = <3300000>; 1893 regulator-max-microvolt = <3300000>; 1894 regulator-boot-on; 1895 regulator-always-on; 1896 enable-active-high; 1897 }; 1898 1899 pp5000: regulator-pp5000 { 1900 compatible = "regulator-fixed"; 1901 regulator-name = "PP5000"; 1902 regulator-min-microvolt = <5000000>; 1903 regulator-max-microvolt = <5000000>; 1904 regulator-always-on; 1905 }; 1906 1907 pp1800_lcdio: regulator-pp1800-lcdio { 1908 compatible = "regulator-fixed"; 1909 regulator-name = "PP1800_LCDIO"; 1910 regulator-min-microvolt = <1800000>; 1911 regulator-max-microvolt = <1800000>; 1912 gpio = <&gpio TEGRA_GPIO(V, 3) 0>; 1913 enable-active-high; 1914 regulator-boot-on; 1915 }; 1916 1917 pp1800_cam: regulator-pp1800-cam { 1918 compatible = "regulator-fixed"; 1919 regulator-name = "PP1800_CAM"; 1920 regulator-min-microvolt = <1800000>; 1921 regulator-max-microvolt = <1800000>; 1922 gpio = <&gpio TEGRA_GPIO(K, 3) 0>; 1923 enable-active-high; 1924 }; 1925 1926 usbc_vbus: regulator-usbc-vbus { 1927 compatible = "regulator-fixed"; 1928 regulator-name = "USBC_VBUS"; 1929 regulator-min-microvolt = <5000000>; 1930 regulator-max-microvolt = <5000000>; 1931 }; 1932}; 1933