xref: /freebsd/sys/contrib/device-tree/src/arm64/nvidia/tegra210-p2371-2180.dts (revision ebacd8013fe5f7fdf9f6a5b286f6680dd2891036) 
1// SPDX-License-Identifier: GPL-2.0
2/dts-v1/;
3
4#include "tegra210-p2180.dtsi"
5#include "tegra210-p2597.dtsi"
6
7/ {
8	model = "NVIDIA Jetson TX1 Developer Kit";
9	compatible = "nvidia,p2371-2180", "nvidia,tegra210";
10
11	pcie@1003000 {
12		status = "okay";
13
14		hvddio-pex-supply = <&vdd_1v8>;
15		dvddio-pex-supply = <&vdd_pex_1v05>;
16		vddio-pex-ctl-supply = <&vdd_1v8>;
17
18		pci@1,0 {
19			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>,
20			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>,
21			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>,
22			       <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>;
23			phy-names = "pcie-0", "pcie-1", "pcie-2", "pcie-3";
24			status = "okay";
25		};
26
27		pci@2,0 {
28			phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
29			phy-names = "pcie-0";
30			status = "okay";
31		};
32	};
33
34	host1x@50000000 {
35		dsi@54300000 {
36			status = "okay";
37
38			avdd-dsi-csi-supply = <&vdd_dsi_csi>;
39
40			panel@0 {
41				compatible = "auo,b080uan01";
42				reg = <0>;
43
44				enable-gpios = <&gpio TEGRA_GPIO(V, 2)
45						GPIO_ACTIVE_HIGH>;
46				power-supply = <&vdd_5v0_io>;
47				backlight = <&backlight>;
48			};
49		};
50	};
51
52	i2c@7000c400 {
53		backlight: backlight@2c {
54			compatible = "ti,lp8557";
55			reg = <0x2c>;
56			power-supply = <&vdd_3v3_sys>;
57
58			dev-ctrl = /bits/ 8 <0x80>;
59			init-brt = /bits/ 8 <0xff>;
60
61			pwm-period = <29334>;
62
63			pwms = <&pwm 0 29334>;
64			pwm-names = "lp8557";
65
66			/* 3 LED string */
67			rom_14h {
68				rom-addr = /bits/ 8 <0x14>;
69				rom-val = /bits/ 8 <0x87>;
70			};
71
72			/* boost frequency 1 MHz */
73			rom_13h {
74				rom-addr = /bits/ 8 <0x13>;
75				rom-val = /bits/ 8 <0x01>;
76			};
77		};
78	};
79
80	i2c@7000c500 {
81		/* carrier board ID EEPROM */
82		eeprom@57 {
83			compatible = "atmel,24c02";
84			reg = <0x57>;
85
86			label = "system";
87			vcc-supply = <&vdd_1v8>;
88			address-width = <8>;
89			pagesize = <8>;
90			size = <256>;
91			read-only;
92		};
93	};
94
95	clock@70110000 {
96		status = "okay";
97
98		nvidia,cf = <6>;
99		nvidia,ci = <0>;
100		nvidia,cg = <2>;
101		nvidia,droop-ctrl = <0x00000f00>;
102		nvidia,force-mode = <1>;
103		nvidia,sample-rate = <25000>;
104
105		nvidia,pwm-min-microvolts = <708000>;
106		nvidia,pwm-period-nanoseconds = <2500>; /* 2.5us */
107		nvidia,pwm-to-pmic;
108		nvidia,pwm-tristate-microvolts = <1000000>;
109		nvidia,pwm-voltage-step-microvolts = <19200>;
110
111		pinctrl-names = "dvfs_pwm_enable", "dvfs_pwm_disable";
112		pinctrl-0 = <&dvfs_pwm_active_state>;
113		pinctrl-1 = <&dvfs_pwm_inactive_state>;
114	};
115
116	aconnect@702c0000 {
117		status = "okay";
118
119		dma-controller@702e2000 {
120			status = "okay";
121		};
122
123		interrupt-controller@702f9000 {
124			status = "okay";
125		};
126
127		ahub@702d0800 {
128			status = "okay";
129
130			admaif@702d0000 {
131				status = "okay";
132			};
133
134			i2s@702d1000 {
135				status = "okay";
136
137				ports {
138					#address-cells = <1>;
139					#size-cells = <0>;
140
141					port@0 {
142						reg = <0>;
143
144						i2s1_cif_ep: endpoint {
145							remote-endpoint = <&xbar_i2s1_ep>;
146						};
147					};
148
149					i2s1_port: port@1 {
150						reg = <1>;
151
152						i2s1_dap_ep: endpoint {
153							dai-format = "i2s";
154							/* Placeholder for external Codec */
155						};
156					};
157				};
158			};
159
160			i2s@702d1100 {
161				status = "okay";
162
163				ports {
164					#address-cells = <1>;
165					#size-cells = <0>;
166
167					port@0 {
168						reg = <0>;
169
170						i2s2_cif_ep: endpoint {
171							remote-endpoint = <&xbar_i2s2_ep>;
172						};
173					};
174
175					i2s2_port: port@1 {
176						reg = <1>;
177
178						i2s2_dap_ep: endpoint {
179							dai-format = "i2s";
180							/* Placeholder for external Codec */
181						};
182					};
183				};
184			};
185
186			i2s@702d1200 {
187				status = "okay";
188
189				ports {
190					#address-cells = <1>;
191					#size-cells = <0>;
192
193					port@0 {
194						reg = <0>;
195
196						i2s3_cif_ep: endpoint {
197							remote-endpoint = <&xbar_i2s3_ep>;
198						};
199					};
200
201					i2s3_port: port@1 {
202						reg = <1>;
203
204						i2s3_dap_ep: endpoint {
205							dai-format = "i2s";
206							/* Placeholder for external Codec */
207						};
208					};
209				};
210			};
211
212			i2s@702d1300 {
213				status = "okay";
214
215				ports {
216					#address-cells = <1>;
217					#size-cells = <0>;
218
219					port@0 {
220						reg = <0>;
221
222						i2s4_cif_ep: endpoint {
223							remote-endpoint = <&xbar_i2s4_ep>;
224						};
225					};
226
227					i2s4_port: port@1 {
228						reg = <1>;
229
230						i2s4_dap_ep: endpoint {
231							dai-format = "i2s";
232							/* Placeholder for external Codec */
233						};
234					};
235				};
236			};
237
238			i2s@702d1400 {
239				status = "okay";
240
241				ports {
242					#address-cells = <1>;
243					#size-cells = <0>;
244
245					port@0 {
246						reg = <0>;
247
248						i2s5_cif_ep: endpoint {
249							remote-endpoint = <&xbar_i2s5_ep>;
250						};
251					};
252
253					i2s5_port: port@1 {
254						reg = <1>;
255
256						i2s5_dap_ep: endpoint {
257							dai-format = "i2s";
258							/* Placeholder for external Codec */
259						};
260					};
261				};
262			};
263
264			dmic@702d4000 {
265				status = "okay";
266
267				ports {
268					#address-cells = <1>;
269					#size-cells = <0>;
270
271					port@0 {
272						reg = <0>;
273
274						dmic1_cif_ep: endpoint {
275							remote-endpoint = <&xbar_dmic1_ep>;
276						};
277					};
278
279					dmic1_port: port@1 {
280						reg = <1>;
281
282						dmic1_dap_ep: endpoint {
283							/* Placeholder for external Codec */
284						};
285					};
286				};
287			};
288
289			dmic@702d4100 {
290				status = "okay";
291
292				ports {
293					#address-cells = <1>;
294					#size-cells = <0>;
295
296					port@0 {
297						reg = <0>;
298
299						dmic2_cif_ep: endpoint {
300							remote-endpoint = <&xbar_dmic2_ep>;
301						};
302					};
303
304					dmic2_port: port@1 {
305						reg = <1>;
306
307						dmic2_dap_ep: endpoint {
308							/* Placeholder for external Codec */
309						};
310					};
311				};
312			};
313
314			dmic@702d4200 {
315				status = "okay";
316
317				ports {
318					#address-cells = <1>;
319					#size-cells = <0>;
320
321					port@0 {
322						reg = <0>;
323
324						dmic3_cif_ep: endpoint {
325							remote-endpoint = <&xbar_dmic3_ep>;
326						};
327					};
328
329					dmic3_port: port@1 {
330						reg = <1>;
331
332						dmic3_dap_ep: endpoint {
333							/* Placeholder for external Codec */
334						};
335					};
336				};
337			};
338
339			sfc@702d2000 {
340				status = "okay";
341
342				ports {
343					#address-cells = <1>;
344					#size-cells = <0>;
345
346					port@0 {
347						reg = <0>;
348
349						sfc1_cif_in_ep: endpoint {
350							remote-endpoint = <&xbar_sfc1_in_ep>;
351						};
352					};
353
354					sfc1_out_port: port@1 {
355						reg = <1>;
356
357						sfc1_cif_out_ep: endpoint {
358							remote-endpoint = <&xbar_sfc1_out_ep>;
359						};
360					};
361				};
362			};
363
364			sfc@702d2200 {
365				status = "okay";
366
367				ports {
368					#address-cells = <1>;
369					#size-cells = <0>;
370
371					port@0 {
372						reg = <0>;
373
374						sfc2_cif_in_ep: endpoint {
375							remote-endpoint = <&xbar_sfc2_in_ep>;
376						};
377					};
378
379					sfc2_out_port: port@1 {
380						reg = <1>;
381
382						sfc2_cif_out_ep: endpoint {
383							remote-endpoint = <&xbar_sfc2_out_ep>;
384						};
385					};
386				};
387			};
388
389			sfc@702d2400 {
390				status = "okay";
391
392				ports {
393					#address-cells = <1>;
394					#size-cells = <0>;
395
396					port@0 {
397						reg = <0>;
398
399						sfc3_cif_in_ep: endpoint {
400							remote-endpoint = <&xbar_sfc3_in_ep>;
401						};
402					};
403
404					sfc3_out_port: port@1 {
405						reg = <1>;
406
407						sfc3_cif_out_ep: endpoint {
408							remote-endpoint = <&xbar_sfc3_out_ep>;
409						};
410					};
411				};
412			};
413
414			sfc@702d2600 {
415				status = "okay";
416
417				ports {
418					#address-cells = <1>;
419					#size-cells = <0>;
420
421					port@0 {
422						reg = <0>;
423
424						sfc4_cif_in_ep: endpoint {
425							remote-endpoint = <&xbar_sfc4_in_ep>;
426						};
427					};
428
429					sfc4_out_port: port@1 {
430						reg = <1>;
431
432						sfc4_cif_out_ep: endpoint {
433							remote-endpoint = <&xbar_sfc4_out_ep>;
434						};
435					};
436				};
437			};
438
439			mvc@702da000 {
440				status = "okay";
441
442				ports {
443					#address-cells = <1>;
444					#size-cells = <0>;
445
446					port@0 {
447						reg = <0>;
448
449						mvc1_cif_in_ep: endpoint {
450							remote-endpoint = <&xbar_mvc1_in_ep>;
451						};
452					};
453
454					mvc1_out_port: port@1 {
455						reg = <1>;
456
457						mvc1_cif_out_ep: endpoint {
458							remote-endpoint = <&xbar_mvc1_out_ep>;
459						};
460					};
461				};
462			};
463
464			mvc@702da200 {
465				status = "okay";
466
467				ports {
468					#address-cells = <1>;
469					#size-cells = <0>;
470
471					port@0 {
472						reg = <0>;
473
474						mvc2_cif_in_ep: endpoint {
475							remote-endpoint = <&xbar_mvc2_in_ep>;
476						};
477					};
478
479					mvc2_out_port: port@1 {
480						reg = <1>;
481
482						mvc2_cif_out_ep: endpoint {
483							remote-endpoint = <&xbar_mvc2_out_ep>;
484						};
485					};
486				};
487			};
488
489			amx@702d3000 {
490				status = "okay";
491
492				ports {
493					#address-cells = <1>;
494					#size-cells = <0>;
495
496					port@0 {
497						reg = <0>;
498
499						amx1_in1_ep: endpoint {
500							remote-endpoint = <&xbar_amx1_in1_ep>;
501						};
502					};
503
504					port@1 {
505						reg = <1>;
506
507						amx1_in2_ep: endpoint {
508							remote-endpoint = <&xbar_amx1_in2_ep>;
509						};
510					};
511
512					port@2 {
513						reg = <2>;
514
515						amx1_in3_ep: endpoint {
516							remote-endpoint = <&xbar_amx1_in3_ep>;
517						};
518					};
519
520					port@3 {
521						reg = <3>;
522
523						amx1_in4_ep: endpoint {
524							remote-endpoint = <&xbar_amx1_in4_ep>;
525						};
526					};
527
528					amx1_out_port: port@4 {
529						reg = <4>;
530
531						amx1_out_ep: endpoint {
532							remote-endpoint = <&xbar_amx1_out_ep>;
533						};
534					};
535				};
536			};
537
538			amx@702d3100 {
539				status = "okay";
540
541				ports {
542					#address-cells = <1>;
543					#size-cells = <0>;
544
545					port@0 {
546						reg = <0>;
547
548						amx2_in1_ep: endpoint {
549							remote-endpoint = <&xbar_amx2_in1_ep>;
550						};
551					};
552
553					port@1 {
554						reg = <1>;
555
556						amx2_in2_ep: endpoint {
557							remote-endpoint = <&xbar_amx2_in2_ep>;
558						};
559					};
560
561					amx2_in3_port: port@2 {
562						reg = <2>;
563
564						amx2_in3_ep: endpoint {
565							remote-endpoint = <&xbar_amx2_in3_ep>;
566						};
567					};
568
569					amx2_in4_port: port@3 {
570						reg = <3>;
571
572						amx2_in4_ep: endpoint {
573							remote-endpoint = <&xbar_amx2_in4_ep>;
574						};
575					};
576
577					amx2_out_port: port@4 {
578						reg = <4>;
579
580						amx2_out_ep: endpoint {
581							remote-endpoint = <&xbar_amx2_out_ep>;
582						};
583					};
584				};
585			};
586
587			adx@702d3800 {
588				status = "okay";
589
590				ports {
591					#address-cells = <1>;
592					#size-cells = <0>;
593
594					port@0 {
595						reg = <0>;
596
597						adx1_in_ep: endpoint {
598							remote-endpoint = <&xbar_adx1_in_ep>;
599						};
600					};
601
602					adx1_out1_port: port@1 {
603						reg = <1>;
604
605						adx1_out1_ep: endpoint {
606							remote-endpoint = <&xbar_adx1_out1_ep>;
607						};
608					};
609
610					adx1_out2_port: port@2 {
611						reg = <2>;
612
613						adx1_out2_ep: endpoint {
614							remote-endpoint = <&xbar_adx1_out2_ep>;
615						};
616					};
617
618					adx1_out3_port: port@3 {
619						reg = <3>;
620
621						adx1_out3_ep: endpoint {
622							remote-endpoint = <&xbar_adx1_out3_ep>;
623						};
624					};
625
626					adx1_out4_port: port@4 {
627						reg = <4>;
628
629						adx1_out4_ep: endpoint {
630							remote-endpoint = <&xbar_adx1_out4_ep>;
631						};
632					};
633				};
634			};
635
636			adx@702d3900 {
637				status = "okay";
638
639				ports {
640					#address-cells = <1>;
641					#size-cells = <0>;
642
643					port@0 {
644						reg = <0>;
645
646						adx2_in_ep: endpoint {
647							remote-endpoint = <&xbar_adx2_in_ep>;
648						};
649					};
650
651					adx2_out1_port: port@1 {
652						reg = <1>;
653
654						adx2_out1_ep: endpoint {
655							remote-endpoint = <&xbar_adx2_out1_ep>;
656						};
657					};
658
659					adx2_out2_port: port@2 {
660						reg = <2>;
661
662						adx2_out2_ep: endpoint {
663							remote-endpoint = <&xbar_adx2_out2_ep>;
664						};
665					};
666
667					adx2_out3_port: port@3 {
668						reg = <3>;
669
670						adx2_out3_ep: endpoint {
671							remote-endpoint = <&xbar_adx2_out3_ep>;
672						};
673					};
674
675					adx2_out4_port: port@4 {
676						reg = <4>;
677
678						adx2_out4_ep: endpoint {
679							remote-endpoint = <&xbar_adx2_out4_ep>;
680						};
681					};
682				};
683			};
684
685			processing-engine@702d8000 {
686				status = "okay";
687
688				ports {
689					#address-cells = <1>;
690					#size-cells = <0>;
691
692					port@0 {
693						reg = <0x0>;
694
695						ope1_cif_in_ep: endpoint {
696							remote-endpoint = <&xbar_ope1_in_ep>;
697						};
698					};
699
700					ope1_out_port: port@1 {
701						reg = <0x1>;
702
703						ope1_cif_out_ep: endpoint {
704							remote-endpoint = <&xbar_ope1_out_ep>;
705						};
706					};
707				};
708			};
709
710			processing-engine@702d8400 {
711				status = "okay";
712
713				ports {
714					#address-cells = <1>;
715					#size-cells = <0>;
716
717					port@0 {
718						reg = <0x0>;
719
720						ope2_cif_in_ep: endpoint {
721							remote-endpoint = <&xbar_ope2_in_ep>;
722						};
723					};
724
725					ope2_out_port: port@1 {
726						reg = <0x1>;
727
728						ope2_cif_out_ep: endpoint {
729							remote-endpoint = <&xbar_ope2_out_ep>;
730						};
731					};
732				};
733			};
734
735			amixer@702dbb00 {
736				status = "okay";
737
738				ports {
739					#address-cells = <1>;
740					#size-cells = <0>;
741
742					port@0 {
743						reg = <0x0>;
744
745						mixer_in1_ep: endpoint {
746							remote-endpoint = <&xbar_mixer_in1_ep>;
747						};
748					};
749
750					port@1 {
751						reg = <0x1>;
752
753						mixer_in2_ep: endpoint {
754							remote-endpoint = <&xbar_mixer_in2_ep>;
755						};
756					};
757
758					port@2 {
759						reg = <0x2>;
760
761						mixer_in3_ep: endpoint {
762							remote-endpoint = <&xbar_mixer_in3_ep>;
763						};
764					};
765
766					port@3 {
767						reg = <0x3>;
768
769						mixer_in4_ep: endpoint {
770							remote-endpoint = <&xbar_mixer_in4_ep>;
771						};
772					};
773
774					port@4 {
775						reg = <0x4>;
776
777						mixer_in5_ep: endpoint {
778							remote-endpoint = <&xbar_mixer_in5_ep>;
779						};
780					};
781
782					port@5 {
783						reg = <0x5>;
784
785						mixer_in6_ep: endpoint {
786							remote-endpoint = <&xbar_mixer_in6_ep>;
787						};
788					};
789
790					port@6 {
791						reg = <0x6>;
792
793						mixer_in7_ep: endpoint {
794							remote-endpoint = <&xbar_mixer_in7_ep>;
795						};
796					};
797
798					port@7 {
799						reg = <0x7>;
800
801						mixer_in8_ep: endpoint {
802							remote-endpoint = <&xbar_mixer_in8_ep>;
803						};
804					};
805
806					port@8 {
807						reg = <0x8>;
808
809						mixer_in9_ep: endpoint {
810							remote-endpoint = <&xbar_mixer_in9_ep>;
811						};
812					};
813
814					port@9 {
815						reg = <0x9>;
816
817						mixer_in10_ep: endpoint {
818							remote-endpoint = <&xbar_mixer_in10_ep>;
819						};
820					};
821
822					mixer_out1_port: port@a {
823						reg = <0xa>;
824
825						mixer_out1_ep: endpoint {
826							remote-endpoint = <&xbar_mixer_out1_ep>;
827						};
828					};
829
830					mixer_out2_port: port@b {
831						reg = <0xb>;
832
833						mixer_out2_ep: endpoint {
834							remote-endpoint = <&xbar_mixer_out2_ep>;
835						};
836					};
837
838					mixer_out3_port: port@c {
839						reg = <0xc>;
840
841						mixer_out3_ep: endpoint {
842							remote-endpoint = <&xbar_mixer_out3_ep>;
843						};
844					};
845
846					mixer_out4_port: port@d {
847						reg = <0xd>;
848
849						mixer_out4_ep: endpoint {
850							remote-endpoint = <&xbar_mixer_out4_ep>;
851						};
852					};
853
854					mixer_out5_port: port@e {
855						reg = <0xe>;
856
857						mixer_out5_ep: endpoint {
858							remote-endpoint = <&xbar_mixer_out5_ep>;
859						};
860					};
861				};
862			};
863
864			ports {
865				xbar_i2s1_port: port@a {
866					reg = <0xa>;
867
868					xbar_i2s1_ep: endpoint {
869						remote-endpoint = <&i2s1_cif_ep>;
870					};
871				};
872
873				xbar_i2s2_port: port@b {
874					reg = <0xb>;
875
876					xbar_i2s2_ep: endpoint {
877						remote-endpoint = <&i2s2_cif_ep>;
878					};
879				};
880
881				xbar_i2s3_port: port@c {
882					reg = <0xc>;
883
884					xbar_i2s3_ep: endpoint {
885						remote-endpoint = <&i2s3_cif_ep>;
886					};
887				};
888
889				xbar_i2s4_port: port@d {
890					reg = <0xd>;
891
892					xbar_i2s4_ep: endpoint {
893						remote-endpoint = <&i2s4_cif_ep>;
894					};
895				};
896
897				xbar_i2s5_port: port@e {
898					reg = <0xe>;
899
900					xbar_i2s5_ep: endpoint {
901						remote-endpoint = <&i2s5_cif_ep>;
902					};
903				};
904
905				xbar_dmic1_port: port@f {
906					reg = <0xf>;
907
908					xbar_dmic1_ep: endpoint {
909						remote-endpoint = <&dmic1_cif_ep>;
910					};
911				};
912
913				xbar_dmic2_port: port@10 {
914					reg = <0x10>;
915
916					xbar_dmic2_ep: endpoint {
917						remote-endpoint = <&dmic2_cif_ep>;
918					};
919				};
920
921				xbar_dmic3_port: port@11 {
922					reg = <0x11>;
923
924					xbar_dmic3_ep: endpoint {
925						remote-endpoint = <&dmic3_cif_ep>;
926					};
927				};
928
929				xbar_sfc1_in_port: port@12 {
930					reg = <0x12>;
931
932					xbar_sfc1_in_ep: endpoint {
933						remote-endpoint = <&sfc1_cif_in_ep>;
934					};
935				};
936
937				port@13 {
938					reg = <0x13>;
939
940					xbar_sfc1_out_ep: endpoint {
941						remote-endpoint = <&sfc1_cif_out_ep>;
942					};
943				};
944
945				xbar_sfc2_in_port: port@14 {
946					reg = <0x14>;
947
948					xbar_sfc2_in_ep: endpoint {
949						remote-endpoint = <&sfc2_cif_in_ep>;
950					};
951				};
952
953				port@15 {
954					reg = <0x15>;
955
956					xbar_sfc2_out_ep: endpoint {
957						remote-endpoint = <&sfc2_cif_out_ep>;
958					};
959				};
960
961				xbar_sfc3_in_port: port@16 {
962					reg = <0x16>;
963
964					xbar_sfc3_in_ep: endpoint {
965						remote-endpoint = <&sfc3_cif_in_ep>;
966					};
967				};
968
969				port@17 {
970					reg = <0x17>;
971
972					xbar_sfc3_out_ep: endpoint {
973						remote-endpoint = <&sfc3_cif_out_ep>;
974					};
975				};
976
977				xbar_sfc4_in_port: port@18 {
978					reg = <0x18>;
979
980					xbar_sfc4_in_ep: endpoint {
981						remote-endpoint = <&sfc4_cif_in_ep>;
982					};
983				};
984
985				port@19 {
986					reg = <0x19>;
987
988					xbar_sfc4_out_ep: endpoint {
989						remote-endpoint = <&sfc4_cif_out_ep>;
990					};
991				};
992
993				xbar_mvc1_in_port: port@1a {
994					reg = <0x1a>;
995
996					xbar_mvc1_in_ep: endpoint {
997						remote-endpoint = <&mvc1_cif_in_ep>;
998					};
999				};
1000
1001				port@1b {
1002					reg = <0x1b>;
1003
1004					xbar_mvc1_out_ep: endpoint {
1005						remote-endpoint = <&mvc1_cif_out_ep>;
1006					};
1007				};
1008
1009				xbar_mvc2_in_port: port@1c {
1010					reg = <0x1c>;
1011
1012					xbar_mvc2_in_ep: endpoint {
1013						remote-endpoint = <&mvc2_cif_in_ep>;
1014					};
1015				};
1016
1017				port@1d {
1018					reg = <0x1d>;
1019
1020					xbar_mvc2_out_ep: endpoint {
1021						remote-endpoint = <&mvc2_cif_out_ep>;
1022					};
1023				};
1024
1025				xbar_amx1_in1_port: port@1e {
1026					reg = <0x1e>;
1027
1028					xbar_amx1_in1_ep: endpoint {
1029						remote-endpoint = <&amx1_in1_ep>;
1030					};
1031				};
1032
1033				xbar_amx1_in2_port: port@1f {
1034					reg = <0x1f>;
1035
1036					xbar_amx1_in2_ep: endpoint {
1037						remote-endpoint = <&amx1_in2_ep>;
1038					};
1039				};
1040
1041				xbar_amx1_in3_port: port@20 {
1042					reg = <0x20>;
1043
1044					xbar_amx1_in3_ep: endpoint {
1045						remote-endpoint = <&amx1_in3_ep>;
1046					};
1047				};
1048
1049				xbar_amx1_in4_port: port@21 {
1050					reg = <0x21>;
1051
1052					xbar_amx1_in4_ep: endpoint {
1053						remote-endpoint = <&amx1_in4_ep>;
1054					};
1055				};
1056
1057				port@22 {
1058					reg = <0x22>;
1059
1060					xbar_amx1_out_ep: endpoint {
1061						remote-endpoint = <&amx1_out_ep>;
1062					};
1063				};
1064
1065				xbar_amx2_in1_port: port@23 {
1066					reg = <0x23>;
1067
1068					xbar_amx2_in1_ep: endpoint {
1069						remote-endpoint = <&amx2_in1_ep>;
1070					};
1071				};
1072
1073				xbar_amx2_in2_port: port@24 {
1074					reg = <0x24>;
1075
1076					xbar_amx2_in2_ep: endpoint {
1077						remote-endpoint = <&amx2_in2_ep>;
1078					};
1079				};
1080
1081				xbar_amx2_in3_port: port@25 {
1082					reg = <0x25>;
1083
1084					xbar_amx2_in3_ep: endpoint {
1085						remote-endpoint = <&amx2_in3_ep>;
1086					};
1087				};
1088
1089				xbar_amx2_in4_port: port@26 {
1090					reg = <0x26>;
1091
1092					xbar_amx2_in4_ep: endpoint {
1093						remote-endpoint = <&amx2_in4_ep>;
1094					};
1095				};
1096
1097				port@27 {
1098					reg = <0x27>;
1099
1100					xbar_amx2_out_ep: endpoint {
1101						remote-endpoint = <&amx2_out_ep>;
1102					};
1103				};
1104
1105				xbar_adx1_in_port: port@28 {
1106					reg = <0x28>;
1107
1108					xbar_adx1_in_ep: endpoint {
1109						remote-endpoint = <&adx1_in_ep>;
1110					};
1111				};
1112
1113				port@29 {
1114					reg = <0x29>;
1115
1116					xbar_adx1_out1_ep: endpoint {
1117						remote-endpoint = <&adx1_out1_ep>;
1118					};
1119				};
1120
1121				port@2a {
1122					reg = <0x2a>;
1123
1124					xbar_adx1_out2_ep: endpoint {
1125						remote-endpoint = <&adx1_out2_ep>;
1126					};
1127				};
1128
1129				port@2b {
1130					reg = <0x2b>;
1131
1132					xbar_adx1_out3_ep: endpoint {
1133						remote-endpoint = <&adx1_out3_ep>;
1134					};
1135				};
1136
1137				port@2c {
1138					reg = <0x2c>;
1139
1140					xbar_adx1_out4_ep: endpoint {
1141						remote-endpoint = <&adx1_out4_ep>;
1142					};
1143				};
1144
1145				xbar_adx2_in_port: port@2d {
1146					reg = <0x2d>;
1147
1148					xbar_adx2_in_ep: endpoint {
1149						remote-endpoint = <&adx2_in_ep>;
1150					};
1151				};
1152
1153				port@2e {
1154					reg = <0x2e>;
1155
1156					xbar_adx2_out1_ep: endpoint {
1157						remote-endpoint = <&adx2_out1_ep>;
1158					};
1159				};
1160
1161				port@2f {
1162					reg = <0x2f>;
1163
1164					xbar_adx2_out2_ep: endpoint {
1165						remote-endpoint = <&adx2_out2_ep>;
1166					};
1167				};
1168
1169				port@30 {
1170					reg = <0x30>;
1171
1172					xbar_adx2_out3_ep: endpoint {
1173						remote-endpoint = <&adx2_out3_ep>;
1174					};
1175				};
1176
1177				port@31 {
1178					reg = <0x31>;
1179
1180					xbar_adx2_out4_ep: endpoint {
1181						remote-endpoint = <&adx2_out4_ep>;
1182					};
1183				};
1184
1185				xbar_mixer_in1_port: port@32 {
1186					reg = <0x32>;
1187
1188					xbar_mixer_in1_ep: endpoint {
1189						remote-endpoint = <&mixer_in1_ep>;
1190					};
1191				};
1192
1193				xbar_mixer_in2_port: port@33 {
1194					reg = <0x33>;
1195
1196					xbar_mixer_in2_ep: endpoint {
1197						remote-endpoint = <&mixer_in2_ep>;
1198					};
1199				};
1200
1201				xbar_mixer_in3_port: port@34 {
1202					reg = <0x34>;
1203
1204					xbar_mixer_in3_ep: endpoint {
1205						remote-endpoint = <&mixer_in3_ep>;
1206					};
1207				};
1208
1209				xbar_mixer_in4_port: port@35 {
1210					reg = <0x35>;
1211
1212					xbar_mixer_in4_ep: endpoint {
1213						remote-endpoint = <&mixer_in4_ep>;
1214					};
1215				};
1216
1217				xbar_mixer_in5_port: port@36 {
1218					reg = <0x36>;
1219
1220					xbar_mixer_in5_ep: endpoint {
1221						remote-endpoint = <&mixer_in5_ep>;
1222					};
1223				};
1224
1225				xbar_mixer_in6_port: port@37 {
1226					reg = <0x37>;
1227
1228					xbar_mixer_in6_ep: endpoint {
1229						remote-endpoint = <&mixer_in6_ep>;
1230					};
1231				};
1232
1233				xbar_mixer_in7_port: port@38 {
1234					reg = <0x38>;
1235
1236					xbar_mixer_in7_ep: endpoint {
1237						remote-endpoint = <&mixer_in7_ep>;
1238					};
1239				};
1240
1241				xbar_mixer_in8_port: port@39 {
1242					reg = <0x39>;
1243
1244					xbar_mixer_in8_ep: endpoint {
1245						remote-endpoint = <&mixer_in8_ep>;
1246					};
1247				};
1248
1249				xbar_mixer_in9_port: port@3a {
1250					reg = <0x3a>;
1251
1252					xbar_mixer_in9_ep: endpoint {
1253						remote-endpoint = <&mixer_in9_ep>;
1254					};
1255				};
1256
1257				xbar_mixer_in10_port: port@3b {
1258					reg = <0x3b>;
1259
1260					xbar_mixer_in10_ep: endpoint {
1261						remote-endpoint = <&mixer_in10_ep>;
1262					};
1263				};
1264
1265				port@3c {
1266					reg = <0x3c>;
1267
1268					xbar_mixer_out1_ep: endpoint {
1269						remote-endpoint = <&mixer_out1_ep>;
1270					};
1271				};
1272
1273				port@3d {
1274					reg = <0x3d>;
1275
1276					xbar_mixer_out2_ep: endpoint {
1277						remote-endpoint = <&mixer_out2_ep>;
1278					};
1279				};
1280
1281				port@3e {
1282					reg = <0x3e>;
1283
1284					xbar_mixer_out3_ep: endpoint {
1285						remote-endpoint = <&mixer_out3_ep>;
1286					};
1287				};
1288
1289				port@3f {
1290					reg = <0x3f>;
1291
1292					xbar_mixer_out4_ep: endpoint {
1293						remote-endpoint = <&mixer_out4_ep>;
1294					};
1295				};
1296
1297				port@40 {
1298					reg = <0x40>;
1299
1300					xbar_mixer_out5_ep: endpoint {
1301						remote-endpoint = <&mixer_out5_ep>;
1302					};
1303				};
1304
1305				xbar_ope1_in_port: port@41 {
1306					reg = <0x41>;
1307
1308					xbar_ope1_in_ep: endpoint {
1309						remote-endpoint = <&ope1_cif_in_ep>;
1310					};
1311				};
1312
1313				port@42 {
1314					reg = <0x42>;
1315
1316					xbar_ope1_out_ep: endpoint {
1317						remote-endpoint = <&ope1_cif_out_ep>;
1318					};
1319				};
1320
1321				xbar_ope2_in_port: port@43 {
1322					reg = <0x43>;
1323
1324					xbar_ope2_in_ep: endpoint {
1325						remote-endpoint = <&ope2_cif_in_ep>;
1326					};
1327				};
1328
1329				port@44 {
1330					reg = <0x44>;
1331
1332					xbar_ope2_out_ep: endpoint {
1333						remote-endpoint = <&ope2_cif_out_ep>;
1334					};
1335				};
1336			};
1337		};
1338	};
1339
1340	sound {
1341		compatible = "nvidia,tegra210-audio-graph-card";
1342		status = "okay";
1343
1344		dais = /* FE */
1345		       <&admaif1_port>, <&admaif2_port>, <&admaif3_port>,
1346		       <&admaif4_port>, <&admaif5_port>, <&admaif6_port>,
1347		       <&admaif7_port>, <&admaif8_port>, <&admaif9_port>,
1348		       <&admaif10_port>,
1349		       /* Router */
1350		       <&xbar_i2s1_port>, <&xbar_i2s2_port>, <&xbar_i2s3_port>,
1351		       <&xbar_i2s4_port>, <&xbar_i2s5_port>, <&xbar_dmic1_port>,
1352		       <&xbar_dmic2_port>, <&xbar_dmic3_port>,
1353		       <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>,
1354		       <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>,
1355		       <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>,
1356		       <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>,
1357		       <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>,
1358		       <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>,
1359		       <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>,
1360		       <&xbar_adx1_in_port>, <&xbar_adx2_in_port>,
1361		       <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>,
1362		       <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>,
1363		       <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>,
1364		       <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>,
1365		       <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>,
1366		       <&xbar_ope1_in_port>, <&xbar_ope2_in_port>,
1367		       /* HW accelerators */
1368		       <&sfc1_out_port>, <&sfc2_out_port>,
1369		       <&sfc3_out_port>, <&sfc4_out_port>,
1370		       <&mvc1_out_port>, <&mvc2_out_port>,
1371		       <&amx1_out_port>, <&amx2_out_port>,
1372		       <&adx1_out1_port>, <&adx1_out2_port>,
1373		       <&adx1_out3_port>, <&adx1_out4_port>,
1374		       <&adx2_out1_port>, <&adx2_out2_port>,
1375		       <&adx2_out3_port>, <&adx2_out4_port>,
1376		       <&mixer_out1_port>, <&mixer_out2_port>,
1377		       <&mixer_out3_port>, <&mixer_out4_port>,
1378		       <&mixer_out5_port>,
1379		       <&ope1_out_port>, <&ope2_out_port>,
1380		       /* I/O DAP Ports */
1381		       <&i2s1_port>, <&i2s2_port>, <&i2s3_port>, <&i2s4_port>,
1382		       <&i2s5_port>, <&dmic1_port>, <&dmic2_port>, <&dmic3_port>;
1383
1384		label = "NVIDIA Jetson TX1 APE";
1385	};
1386};
1387