1// SPDX-License-Identifier: GPL-2.0 2#include <dt-bindings/mfd/max77620.h> 3 4#include "tegra210.dtsi" 5 6/ { 7 model = "NVIDIA Jetson TX1"; 8 compatible = "nvidia,p2180", "nvidia,tegra210"; 9 10 aliases { 11 rtc0 = "/i2c@7000d000/pmic@3c"; 12 rtc1 = "/rtc@7000e000"; 13 serial0 = &uarta; 14 }; 15 16 chosen { 17 stdout-path = "serial0:115200n8"; 18 }; 19 20 memory@80000000 { 21 device_type = "memory"; 22 reg = <0x0 0x80000000 0x1 0x0>; 23 }; 24 25 gpu@57000000 { 26 vdd-supply = <&vdd_gpu>; 27 }; 28 29 /* debug port */ 30 serial@70006000 { 31 status = "okay"; 32 }; 33 34 i2c@7000c500 { 35 status = "okay"; 36 37 /* module ID EEPROM */ 38 eeprom@50 { 39 compatible = "atmel,24c02"; 40 reg = <0x50>; 41 42 label = "module"; 43 vcc-supply = <&vdd_1v8>; 44 address-width = <8>; 45 pagesize = <8>; 46 size = <256>; 47 read-only; 48 }; 49 }; 50 51 i2c@7000d000 { 52 status = "okay"; 53 clock-frequency = <400000>; 54 55 pmic: pmic@3c { 56 compatible = "maxim,max77620"; 57 reg = <0x3c>; 58 interrupt-parent = <&tegra_pmc>; 59 interrupts = <51 IRQ_TYPE_LEVEL_LOW>; 60 61 #interrupt-cells = <2>; 62 interrupt-controller; 63 64 #gpio-cells = <2>; 65 gpio-controller; 66 67 pinctrl-names = "default"; 68 pinctrl-0 = <&max77620_default>; 69 70 fps { 71 fps0 { 72 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 73 maxim,suspend-fps-time-period-us = <1280>; 74 }; 75 76 fps1 { 77 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN1>; 78 maxim,suspend-fps-time-period-us = <1280>; 79 }; 80 81 fps2 { 82 maxim,fps-event-source = <MAX77620_FPS_EVENT_SRC_EN0>; 83 }; 84 }; 85 86 max77620_default: pinmux { 87 gpio0 { 88 pins = "gpio0"; 89 function = "gpio"; 90 }; 91 92 gpio1 { 93 pins = "gpio1"; 94 function = "fps-out"; 95 drive-push-pull = <1>; 96 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 97 maxim,active-fps-power-up-slot = <7>; 98 maxim,active-fps-power-down-slot = <0>; 99 }; 100 101 gpio2_3 { 102 pins = "gpio2", "gpio3"; 103 function = "fps-out"; 104 drive-open-drain = <1>; 105 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 106 }; 107 108 gpio4 { 109 pins = "gpio4"; 110 function = "32k-out1"; 111 }; 112 113 gpio5_6_7 { 114 pins = "gpio5", "gpio6", "gpio7"; 115 function = "gpio"; 116 drive-push-pull = <1>; 117 }; 118 }; 119 120 regulators { 121 in-ldo0-1-supply = <&vdd_pre>; 122 in-ldo7-8-supply = <&vdd_pre>; 123 in-sd3-supply = <&vdd_5v0_sys>; 124 125 vdd_soc: sd0 { 126 regulator-name = "VDD_SOC"; 127 regulator-min-microvolt = <600000>; 128 regulator-max-microvolt = <1400000>; 129 regulator-always-on; 130 regulator-boot-on; 131 132 regulator-enable-ramp-delay = <146>; 133 regulator-ramp-delay = <27500>; 134 135 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 136 }; 137 138 vdd_ddr: sd1 { 139 regulator-name = "VDD_DDR_1V1_PMIC"; 140 regulator-always-on; 141 regulator-boot-on; 142 143 regulator-enable-ramp-delay = <130>; 144 regulator-ramp-delay = <27500>; 145 146 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 147 }; 148 149 vdd_pre: sd2 { 150 regulator-name = "VDD_PRE_REG_1V35"; 151 regulator-min-microvolt = <1350000>; 152 regulator-max-microvolt = <1350000>; 153 154 regulator-enable-ramp-delay = <176>; 155 regulator-ramp-delay = <27500>; 156 157 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 158 }; 159 160 vdd_1v8: sd3 { 161 regulator-name = "VDD_1V8"; 162 regulator-min-microvolt = <1800000>; 163 regulator-max-microvolt = <1800000>; 164 regulator-always-on; 165 regulator-boot-on; 166 167 regulator-enable-ramp-delay = <242>; 168 regulator-ramp-delay = <27500>; 169 170 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 171 }; 172 173 vdd_sys_1v2: ldo0 { 174 regulator-name = "AVDD_SYS_1V2"; 175 regulator-min-microvolt = <1200000>; 176 regulator-max-microvolt = <1200000>; 177 regulator-always-on; 178 regulator-boot-on; 179 180 regulator-enable-ramp-delay = <26>; 181 regulator-ramp-delay = <100000>; 182 183 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 184 }; 185 186 vdd_pex_1v05: ldo1 { 187 regulator-name = "VDD_PEX_1V05"; 188 regulator-min-microvolt = <1050000>; 189 regulator-max-microvolt = <1050000>; 190 191 regulator-enable-ramp-delay = <22>; 192 regulator-ramp-delay = <100000>; 193 194 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 195 }; 196 197 vddio_sdmmc: ldo2 { 198 regulator-name = "VDDIO_SDMMC"; 199 regulator-min-microvolt = <1800000>; 200 regulator-max-microvolt = <3300000>; 201 regulator-always-on; 202 regulator-boot-on; 203 204 regulator-enable-ramp-delay = <62>; 205 regulator-ramp-delay = <100000>; 206 207 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 208 }; 209 210 vdd_cam_hv: ldo3 { 211 regulator-name = "VDD_CAM_HV"; 212 regulator-min-microvolt = <2800000>; 213 regulator-max-microvolt = <2800000>; 214 215 regulator-enable-ramp-delay = <50>; 216 regulator-ramp-delay = <100000>; 217 218 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 219 }; 220 221 vdd_rtc: ldo4 { 222 regulator-name = "VDD_RTC"; 223 regulator-min-microvolt = <850000>; 224 regulator-max-microvolt = <850000>; 225 regulator-always-on; 226 regulator-boot-on; 227 228 regulator-enable-ramp-delay = <22>; 229 regulator-ramp-delay = <100000>; 230 231 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 232 }; 233 234 vdd_ts_hv: ldo5 { 235 regulator-name = "VDD_TS_HV"; 236 regulator-min-microvolt = <3300000>; 237 regulator-max-microvolt = <3300000>; 238 239 regulator-enable-ramp-delay = <62>; 240 regulator-ramp-delay = <100000>; 241 242 maxim,active-fps-source = <MAX77620_FPS_SRC_NONE>; 243 }; 244 245 vdd_ts: ldo6 { 246 regulator-name = "VDD_TS_1V8"; 247 regulator-min-microvolt = <1800000>; 248 regulator-max-microvolt = <1800000>; 249 250 regulator-enable-ramp-delay = <36>; 251 regulator-ramp-delay = <100000>; 252 253 maxim,active-fps-source = <MAX77620_FPS_SRC_0>; 254 maxim,active-fps-power-up-slot = <7>; 255 maxim,active-fps-power-down-slot = <0>; 256 }; 257 258 avdd_1v05_pll: ldo7 { 259 regulator-name = "AVDD_1V05_PLL"; 260 regulator-min-microvolt = <1050000>; 261 regulator-max-microvolt = <1050000>; 262 regulator-always-on; 263 regulator-boot-on; 264 265 regulator-enable-ramp-delay = <24>; 266 regulator-ramp-delay = <100000>; 267 268 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 269 }; 270 271 avdd_1v05: ldo8 { 272 regulator-name = "AVDD_SATA_HDMI_DP_1V05"; 273 regulator-min-microvolt = <1050000>; 274 regulator-max-microvolt = <1050000>; 275 276 regulator-enable-ramp-delay = <22>; 277 regulator-ramp-delay = <100000>; 278 279 maxim,active-fps-source = <MAX77620_FPS_SRC_1>; 280 }; 281 }; 282 }; 283 }; 284 285 pmc@7000e400 { 286 nvidia,invert-interrupt; 287 nvidia,suspend-mode = <0>; 288 nvidia,cpu-pwr-good-time = <0>; 289 nvidia,cpu-pwr-off-time = <0>; 290 nvidia,core-pwr-good-time = <4587 3876>; 291 nvidia,core-pwr-off-time = <39065>; 292 nvidia,core-power-req-active-high; 293 nvidia,sys-clock-req-active-high; 294 }; 295 296 /* eMMC */ 297 mmc@700b0600 { 298 status = "okay"; 299 bus-width = <8>; 300 non-removable; 301 vqmmc-supply = <&vdd_1v8>; 302 }; 303 304 clk32k_in: clock-32k { 305 compatible = "fixed-clock"; 306 clock-frequency = <32768>; 307 #clock-cells = <0>; 308 }; 309 310 cpus { 311 cpu@0 { 312 enable-method = "psci"; 313 }; 314 315 cpu@1 { 316 enable-method = "psci"; 317 }; 318 319 cpu@2 { 320 enable-method = "psci"; 321 }; 322 323 cpu@3 { 324 enable-method = "psci"; 325 }; 326 327 idle-states { 328 cpu-sleep { 329 status = "okay"; 330 }; 331 }; 332 }; 333 334 psci { 335 compatible = "arm,psci-0.2"; 336 method = "smc"; 337 }; 338 339 vdd_gpu: regulator-vdd-gpu { 340 compatible = "pwm-regulator"; 341 pwms = <&pwm 1 8000>; 342 regulator-name = "VDD_GPU"; 343 regulator-min-microvolt = <710000>; 344 regulator-max-microvolt = <1320000>; 345 enable-gpios = <&pmic 6 GPIO_ACTIVE_HIGH>; 346 regulator-ramp-delay = <80>; 347 regulator-enable-ramp-delay = <2000>; 348 regulator-settling-time-us = <160>; 349 }; 350}; 351