1// SPDX-License-Identifier: GPL-2.0 2 3#include <dt-bindings/input/linux-event-codes.h> 4#include <dt-bindings/input/gpio-keys.h> 5 6/ { 7 bus@0 { 8 aconnect@2900000 { 9 status = "okay"; 10 11 dma-controller@2930000 { 12 status = "okay"; 13 }; 14 15 interrupt-controller@2a40000 { 16 status = "okay"; 17 }; 18 19 ahub@2900800 { 20 status = "okay"; 21 22 ports { 23 #address-cells = <1>; 24 #size-cells = <0>; 25 26 port@0 { 27 reg = <0x0>; 28 29 xbar_admaif0_ep: endpoint { 30 remote-endpoint = <&admaif0_ep>; 31 }; 32 }; 33 34 port@1 { 35 reg = <0x1>; 36 37 xbar_admaif1_ep: endpoint { 38 remote-endpoint = <&admaif1_ep>; 39 }; 40 }; 41 42 port@2 { 43 reg = <0x2>; 44 45 xbar_admaif2_ep: endpoint { 46 remote-endpoint = <&admaif2_ep>; 47 }; 48 }; 49 50 port@3 { 51 reg = <0x3>; 52 53 xbar_admaif3_ep: endpoint { 54 remote-endpoint = <&admaif3_ep>; 55 }; 56 }; 57 58 port@4 { 59 reg = <0x4>; 60 61 xbar_admaif4_ep: endpoint { 62 remote-endpoint = <&admaif4_ep>; 63 }; 64 }; 65 66 port@5 { 67 reg = <0x5>; 68 69 xbar_admaif5_ep: endpoint { 70 remote-endpoint = <&admaif5_ep>; 71 }; 72 }; 73 74 port@6 { 75 reg = <0x6>; 76 77 xbar_admaif6_ep: endpoint { 78 remote-endpoint = <&admaif6_ep>; 79 }; 80 }; 81 82 port@7 { 83 reg = <0x7>; 84 85 xbar_admaif7_ep: endpoint { 86 remote-endpoint = <&admaif7_ep>; 87 }; 88 }; 89 90 port@8 { 91 reg = <0x8>; 92 93 xbar_admaif8_ep: endpoint { 94 remote-endpoint = <&admaif8_ep>; 95 }; 96 }; 97 98 port@9 { 99 reg = <0x9>; 100 101 xbar_admaif9_ep: endpoint { 102 remote-endpoint = <&admaif9_ep>; 103 }; 104 }; 105 106 port@a { 107 reg = <0xa>; 108 109 xbar_admaif10_ep: endpoint { 110 remote-endpoint = <&admaif10_ep>; 111 }; 112 }; 113 114 port@b { 115 reg = <0xb>; 116 117 xbar_admaif11_ep: endpoint { 118 remote-endpoint = <&admaif11_ep>; 119 }; 120 }; 121 122 port@c { 123 reg = <0xc>; 124 125 xbar_admaif12_ep: endpoint { 126 remote-endpoint = <&admaif12_ep>; 127 }; 128 }; 129 130 port@d { 131 reg = <0xd>; 132 133 xbar_admaif13_ep: endpoint { 134 remote-endpoint = <&admaif13_ep>; 135 }; 136 }; 137 138 port@e { 139 reg = <0xe>; 140 141 xbar_admaif14_ep: endpoint { 142 remote-endpoint = <&admaif14_ep>; 143 }; 144 }; 145 146 port@f { 147 reg = <0xf>; 148 149 xbar_admaif15_ep: endpoint { 150 remote-endpoint = <&admaif15_ep>; 151 }; 152 }; 153 154 port@10 { 155 reg = <0x10>; 156 157 xbar_admaif16_ep: endpoint { 158 remote-endpoint = <&admaif16_ep>; 159 }; 160 }; 161 162 port@11 { 163 reg = <0x11>; 164 165 xbar_admaif17_ep: endpoint { 166 remote-endpoint = <&admaif17_ep>; 167 }; 168 }; 169 170 port@12 { 171 reg = <0x12>; 172 173 xbar_admaif18_ep: endpoint { 174 remote-endpoint = <&admaif18_ep>; 175 }; 176 }; 177 178 port@13 { 179 reg = <0x13>; 180 181 xbar_admaif19_ep: endpoint { 182 remote-endpoint = <&admaif19_ep>; 183 }; 184 }; 185 186 xbar_i2s3_port: port@16 { 187 reg = <0x16>; 188 189 xbar_i2s3_ep: endpoint { 190 remote-endpoint = <&i2s3_cif_ep>; 191 }; 192 }; 193 194 xbar_i2s5_port: port@18 { 195 reg = <0x18>; 196 197 xbar_i2s5_ep: endpoint { 198 remote-endpoint = <&i2s5_cif_ep>; 199 }; 200 }; 201 202 xbar_dmic1_port: port@1a { 203 reg = <0x1a>; 204 205 xbar_dmic1_ep: endpoint { 206 remote-endpoint = <&dmic1_cif_ep>; 207 }; 208 }; 209 210 xbar_dmic2_port: port@1b { 211 reg = <0x1b>; 212 213 xbar_dmic2_ep: endpoint { 214 remote-endpoint = <&dmic2_cif_ep>; 215 }; 216 }; 217 218 xbar_dmic4_port: port@1d { 219 reg = <0x1d>; 220 221 xbar_dmic4_ep: endpoint { 222 remote-endpoint = <&dmic4_cif_ep>; 223 }; 224 }; 225 226 xbar_dspk1_port: port@1e { 227 reg = <0x1e>; 228 229 xbar_dspk1_ep: endpoint { 230 remote-endpoint = <&dspk1_cif_ep>; 231 }; 232 }; 233 234 xbar_dspk2_port: port@1f { 235 reg = <0x1f>; 236 237 xbar_dspk2_ep: endpoint { 238 remote-endpoint = <&dspk2_cif_ep>; 239 }; 240 }; 241 242 xbar_sfc1_in_port: port@20 { 243 reg = <0x20>; 244 245 xbar_sfc1_in_ep: endpoint { 246 remote-endpoint = <&sfc1_cif_in_ep>; 247 }; 248 }; 249 250 port@21 { 251 reg = <0x21>; 252 253 xbar_sfc1_out_ep: endpoint { 254 remote-endpoint = <&sfc1_cif_out_ep>; 255 }; 256 }; 257 258 xbar_sfc2_in_port: port@22 { 259 reg = <0x22>; 260 261 xbar_sfc2_in_ep: endpoint { 262 remote-endpoint = <&sfc2_cif_in_ep>; 263 }; 264 }; 265 266 port@23 { 267 reg = <0x23>; 268 269 xbar_sfc2_out_ep: endpoint { 270 remote-endpoint = <&sfc2_cif_out_ep>; 271 }; 272 }; 273 274 xbar_sfc3_in_port: port@24 { 275 reg = <0x24>; 276 277 xbar_sfc3_in_ep: endpoint { 278 remote-endpoint = <&sfc3_cif_in_ep>; 279 }; 280 }; 281 282 port@25 { 283 reg = <0x25>; 284 285 xbar_sfc3_out_ep: endpoint { 286 remote-endpoint = <&sfc3_cif_out_ep>; 287 }; 288 }; 289 290 xbar_sfc4_in_port: port@26 { 291 reg = <0x26>; 292 293 xbar_sfc4_in_ep: endpoint { 294 remote-endpoint = <&sfc4_cif_in_ep>; 295 }; 296 }; 297 298 port@27 { 299 reg = <0x27>; 300 301 xbar_sfc4_out_ep: endpoint { 302 remote-endpoint = <&sfc4_cif_out_ep>; 303 }; 304 }; 305 306 xbar_mvc1_in_port: port@28 { 307 reg = <0x28>; 308 309 xbar_mvc1_in_ep: endpoint { 310 remote-endpoint = <&mvc1_cif_in_ep>; 311 }; 312 }; 313 314 port@29 { 315 reg = <0x29>; 316 317 xbar_mvc1_out_ep: endpoint { 318 remote-endpoint = <&mvc1_cif_out_ep>; 319 }; 320 }; 321 322 xbar_mvc2_in_port: port@2a { 323 reg = <0x2a>; 324 325 xbar_mvc2_in_ep: endpoint { 326 remote-endpoint = <&mvc2_cif_in_ep>; 327 }; 328 }; 329 330 port@2b { 331 reg = <0x2b>; 332 333 xbar_mvc2_out_ep: endpoint { 334 remote-endpoint = <&mvc2_cif_out_ep>; 335 }; 336 }; 337 338 xbar_amx1_in1_port: port@2c { 339 reg = <0x2c>; 340 341 xbar_amx1_in1_ep: endpoint { 342 remote-endpoint = <&amx1_in1_ep>; 343 }; 344 }; 345 346 xbar_amx1_in2_port: port@2d { 347 reg = <0x2d>; 348 349 xbar_amx1_in2_ep: endpoint { 350 remote-endpoint = <&amx1_in2_ep>; 351 }; 352 }; 353 354 xbar_amx1_in3_port: port@2e { 355 reg = <0x2e>; 356 357 xbar_amx1_in3_ep: endpoint { 358 remote-endpoint = <&amx1_in3_ep>; 359 }; 360 }; 361 362 xbar_amx1_in4_port: port@2f { 363 reg = <0x2f>; 364 365 xbar_amx1_in4_ep: endpoint { 366 remote-endpoint = <&amx1_in4_ep>; 367 }; 368 }; 369 370 port@30 { 371 reg = <0x30>; 372 373 xbar_amx1_out_ep: endpoint { 374 remote-endpoint = <&amx1_out_ep>; 375 }; 376 }; 377 378 xbar_amx2_in1_port: port@31 { 379 reg = <0x31>; 380 381 xbar_amx2_in1_ep: endpoint { 382 remote-endpoint = <&amx2_in1_ep>; 383 }; 384 }; 385 386 xbar_amx2_in2_port: port@32 { 387 reg = <0x32>; 388 389 xbar_amx2_in2_ep: endpoint { 390 remote-endpoint = <&amx2_in2_ep>; 391 }; 392 }; 393 394 xbar_amx2_in3_port: port@33 { 395 reg = <0x33>; 396 397 xbar_amx2_in3_ep: endpoint { 398 remote-endpoint = <&amx2_in3_ep>; 399 }; 400 }; 401 402 xbar_amx2_in4_port: port@34 { 403 reg = <0x34>; 404 405 xbar_amx2_in4_ep: endpoint { 406 remote-endpoint = <&amx2_in4_ep>; 407 }; 408 }; 409 410 port@35 { 411 reg = <0x35>; 412 413 xbar_amx2_out_ep: endpoint { 414 remote-endpoint = <&amx2_out_ep>; 415 }; 416 }; 417 418 xbar_amx3_in1_port: port@36 { 419 reg = <0x36>; 420 421 xbar_amx3_in1_ep: endpoint { 422 remote-endpoint = <&amx3_in1_ep>; 423 }; 424 }; 425 426 xbar_amx3_in2_port: port@37 { 427 reg = <0x37>; 428 429 xbar_amx3_in2_ep: endpoint { 430 remote-endpoint = <&amx3_in2_ep>; 431 }; 432 }; 433 434 xbar_amx3_in3_port: port@38 { 435 reg = <0x38>; 436 437 xbar_amx3_in3_ep: endpoint { 438 remote-endpoint = <&amx3_in3_ep>; 439 }; 440 }; 441 442 xbar_amx3_in4_port: port@39 { 443 reg = <0x39>; 444 445 xbar_amx3_in4_ep: endpoint { 446 remote-endpoint = <&amx3_in4_ep>; 447 }; 448 }; 449 450 port@3a { 451 reg = <0x3a>; 452 453 xbar_amx3_out_ep: endpoint { 454 remote-endpoint = <&amx3_out_ep>; 455 }; 456 }; 457 458 xbar_amx4_in1_port: port@3b { 459 reg = <0x3b>; 460 461 xbar_amx4_in1_ep: endpoint { 462 remote-endpoint = <&amx4_in1_ep>; 463 }; 464 }; 465 466 xbar_amx4_in2_port: port@3c { 467 reg = <0x3c>; 468 469 xbar_amx4_in2_ep: endpoint { 470 remote-endpoint = <&amx4_in2_ep>; 471 }; 472 }; 473 474 xbar_amx4_in3_port: port@3d { 475 reg = <0x3d>; 476 477 xbar_amx4_in3_ep: endpoint { 478 remote-endpoint = <&amx4_in3_ep>; 479 }; 480 }; 481 482 xbar_amx4_in4_port: port@3e { 483 reg = <0x3e>; 484 485 xbar_amx4_in4_ep: endpoint { 486 remote-endpoint = <&amx4_in4_ep>; 487 }; 488 }; 489 490 port@3f { 491 reg = <0x3f>; 492 493 xbar_amx4_out_ep: endpoint { 494 remote-endpoint = <&amx4_out_ep>; 495 }; 496 }; 497 498 xbar_adx1_in_port: port@40 { 499 reg = <0x40>; 500 501 xbar_adx1_in_ep: endpoint { 502 remote-endpoint = <&adx1_in_ep>; 503 }; 504 }; 505 506 port@41 { 507 reg = <0x41>; 508 509 xbar_adx1_out1_ep: endpoint { 510 remote-endpoint = <&adx1_out1_ep>; 511 }; 512 }; 513 514 port@42 { 515 reg = <0x42>; 516 517 xbar_adx1_out2_ep: endpoint { 518 remote-endpoint = <&adx1_out2_ep>; 519 }; 520 }; 521 522 port@43 { 523 reg = <0x43>; 524 525 xbar_adx1_out3_ep: endpoint { 526 remote-endpoint = <&adx1_out3_ep>; 527 }; 528 }; 529 530 port@44 { 531 reg = <0x44>; 532 533 xbar_adx1_out4_ep: endpoint { 534 remote-endpoint = <&adx1_out4_ep>; 535 }; 536 }; 537 538 xbar_adx2_in_port: port@45 { 539 reg = <0x45>; 540 541 xbar_adx2_in_ep: endpoint { 542 remote-endpoint = <&adx2_in_ep>; 543 }; 544 }; 545 546 port@46 { 547 reg = <0x46>; 548 549 xbar_adx2_out1_ep: endpoint { 550 remote-endpoint = <&adx2_out1_ep>; 551 }; 552 }; 553 554 port@47 { 555 reg = <0x47>; 556 557 xbar_adx2_out2_ep: endpoint { 558 remote-endpoint = <&adx2_out2_ep>; 559 }; 560 }; 561 562 port@48 { 563 reg = <0x48>; 564 565 xbar_adx2_out3_ep: endpoint { 566 remote-endpoint = <&adx2_out3_ep>; 567 }; 568 }; 569 570 port@49 { 571 reg = <0x49>; 572 573 xbar_adx2_out4_ep: endpoint { 574 remote-endpoint = <&adx2_out4_ep>; 575 }; 576 }; 577 578 xbar_adx3_in_port: port@4a { 579 reg = <0x4a>; 580 581 xbar_adx3_in_ep: endpoint { 582 remote-endpoint = <&adx3_in_ep>; 583 }; 584 }; 585 586 port@4b { 587 reg = <0x4b>; 588 589 xbar_adx3_out1_ep: endpoint { 590 remote-endpoint = <&adx3_out1_ep>; 591 }; 592 }; 593 594 port@4c { 595 reg = <0x4c>; 596 597 xbar_adx3_out2_ep: endpoint { 598 remote-endpoint = <&adx3_out2_ep>; 599 }; 600 }; 601 602 port@4d { 603 reg = <0x4d>; 604 605 xbar_adx3_out3_ep: endpoint { 606 remote-endpoint = <&adx3_out3_ep>; 607 }; 608 }; 609 610 port@4e { 611 reg = <0x4e>; 612 613 xbar_adx3_out4_ep: endpoint { 614 remote-endpoint = <&adx3_out4_ep>; 615 }; 616 }; 617 618 xbar_adx4_in_port: port@4f { 619 reg = <0x4f>; 620 621 xbar_adx4_in_ep: endpoint { 622 remote-endpoint = <&adx4_in_ep>; 623 }; 624 }; 625 626 port@50 { 627 reg = <0x50>; 628 629 xbar_adx4_out1_ep: endpoint { 630 remote-endpoint = <&adx4_out1_ep>; 631 }; 632 }; 633 634 port@51 { 635 reg = <0x51>; 636 637 xbar_adx4_out2_ep: endpoint { 638 remote-endpoint = <&adx4_out2_ep>; 639 }; 640 }; 641 642 port@52 { 643 reg = <0x52>; 644 645 xbar_adx4_out3_ep: endpoint { 646 remote-endpoint = <&adx4_out3_ep>; 647 }; 648 }; 649 650 port@53 { 651 reg = <0x53>; 652 653 xbar_adx4_out4_ep: endpoint { 654 remote-endpoint = <&adx4_out4_ep>; 655 }; 656 }; 657 658 xbar_mixer_in1_port: port@54 { 659 reg = <0x54>; 660 661 xbar_mixer_in1_ep: endpoint { 662 remote-endpoint = <&mixer_in1_ep>; 663 }; 664 }; 665 666 xbar_mixer_in2_port: port@55 { 667 reg = <0x55>; 668 669 xbar_mixer_in2_ep: endpoint { 670 remote-endpoint = <&mixer_in2_ep>; 671 }; 672 }; 673 674 xbar_mixer_in3_port: port@56 { 675 reg = <0x56>; 676 677 xbar_mixer_in3_ep: endpoint { 678 remote-endpoint = <&mixer_in3_ep>; 679 }; 680 }; 681 682 xbar_mixer_in4_port: port@57 { 683 reg = <0x57>; 684 685 xbar_mixer_in4_ep: endpoint { 686 remote-endpoint = <&mixer_in4_ep>; 687 }; 688 }; 689 690 xbar_mixer_in5_port: port@58 { 691 reg = <0x58>; 692 693 xbar_mixer_in5_ep: endpoint { 694 remote-endpoint = <&mixer_in5_ep>; 695 }; 696 }; 697 698 xbar_mixer_in6_port: port@59 { 699 reg = <0x59>; 700 701 xbar_mixer_in6_ep: endpoint { 702 remote-endpoint = <&mixer_in6_ep>; 703 }; 704 }; 705 706 xbar_mixer_in7_port: port@5a { 707 reg = <0x5a>; 708 709 xbar_mixer_in7_ep: endpoint { 710 remote-endpoint = <&mixer_in7_ep>; 711 }; 712 }; 713 714 xbar_mixer_in8_port: port@5b { 715 reg = <0x5b>; 716 717 xbar_mixer_in8_ep: endpoint { 718 remote-endpoint = <&mixer_in8_ep>; 719 }; 720 }; 721 722 xbar_mixer_in9_port: port@5c { 723 reg = <0x5c>; 724 725 xbar_mixer_in9_ep: endpoint { 726 remote-endpoint = <&mixer_in9_ep>; 727 }; 728 }; 729 730 xbar_mixer_in10_port: port@5d { 731 reg = <0x5d>; 732 733 xbar_mixer_in10_ep: endpoint { 734 remote-endpoint = <&mixer_in10_ep>; 735 }; 736 }; 737 738 port@5e { 739 reg = <0x5e>; 740 741 xbar_mixer_out1_ep: endpoint { 742 remote-endpoint = <&mixer_out1_ep>; 743 }; 744 }; 745 746 port@5f { 747 reg = <0x5f>; 748 749 xbar_mixer_out2_ep: endpoint { 750 remote-endpoint = <&mixer_out2_ep>; 751 }; 752 }; 753 754 port@60 { 755 reg = <0x60>; 756 757 xbar_mixer_out3_ep: endpoint { 758 remote-endpoint = <&mixer_out3_ep>; 759 }; 760 }; 761 762 port@61 { 763 reg = <0x61>; 764 765 xbar_mixer_out4_ep: endpoint { 766 remote-endpoint = <&mixer_out4_ep>; 767 }; 768 }; 769 770 port@62 { 771 reg = <0x62>; 772 773 xbar_mixer_out5_ep: endpoint { 774 remote-endpoint = <&mixer_out5_ep>; 775 }; 776 }; 777 }; 778 779 admaif@290f000 { 780 status = "okay"; 781 782 ports { 783 #address-cells = <1>; 784 #size-cells = <0>; 785 786 admaif0_port: port@0 { 787 reg = <0x0>; 788 789 admaif0_ep: endpoint { 790 remote-endpoint = <&xbar_admaif0_ep>; 791 }; 792 }; 793 794 admaif1_port: port@1 { 795 reg = <0x1>; 796 797 admaif1_ep: endpoint { 798 remote-endpoint = <&xbar_admaif1_ep>; 799 }; 800 }; 801 802 admaif2_port: port@2 { 803 reg = <0x2>; 804 805 admaif2_ep: endpoint { 806 remote-endpoint = <&xbar_admaif2_ep>; 807 }; 808 }; 809 810 admaif3_port: port@3 { 811 reg = <0x3>; 812 813 admaif3_ep: endpoint { 814 remote-endpoint = <&xbar_admaif3_ep>; 815 }; 816 }; 817 818 admaif4_port: port@4 { 819 reg = <0x4>; 820 821 admaif4_ep: endpoint { 822 remote-endpoint = <&xbar_admaif4_ep>; 823 }; 824 }; 825 826 admaif5_port: port@5 { 827 reg = <0x5>; 828 829 admaif5_ep: endpoint { 830 remote-endpoint = <&xbar_admaif5_ep>; 831 }; 832 }; 833 834 admaif6_port: port@6 { 835 reg = <0x6>; 836 837 admaif6_ep: endpoint { 838 remote-endpoint = <&xbar_admaif6_ep>; 839 }; 840 }; 841 842 admaif7_port: port@7 { 843 reg = <0x7>; 844 845 admaif7_ep: endpoint { 846 remote-endpoint = <&xbar_admaif7_ep>; 847 }; 848 }; 849 850 admaif8_port: port@8 { 851 reg = <0x8>; 852 853 admaif8_ep: endpoint { 854 remote-endpoint = <&xbar_admaif8_ep>; 855 }; 856 }; 857 858 admaif9_port: port@9 { 859 reg = <0x9>; 860 861 admaif9_ep: endpoint { 862 remote-endpoint = <&xbar_admaif9_ep>; 863 }; 864 }; 865 866 admaif10_port: port@a { 867 reg = <0xa>; 868 869 admaif10_ep: endpoint { 870 remote-endpoint = <&xbar_admaif10_ep>; 871 }; 872 }; 873 874 admaif11_port: port@b { 875 reg = <0xb>; 876 877 admaif11_ep: endpoint { 878 remote-endpoint = <&xbar_admaif11_ep>; 879 }; 880 }; 881 882 admaif12_port: port@c { 883 reg = <0xc>; 884 885 admaif12_ep: endpoint { 886 remote-endpoint = <&xbar_admaif12_ep>; 887 }; 888 }; 889 890 admaif13_port: port@d { 891 reg = <0xd>; 892 893 admaif13_ep: endpoint { 894 remote-endpoint = <&xbar_admaif13_ep>; 895 }; 896 }; 897 898 admaif14_port: port@e { 899 reg = <0xe>; 900 901 admaif14_ep: endpoint { 902 remote-endpoint = <&xbar_admaif14_ep>; 903 }; 904 }; 905 906 admaif15_port: port@f { 907 reg = <0xf>; 908 909 admaif15_ep: endpoint { 910 remote-endpoint = <&xbar_admaif15_ep>; 911 }; 912 }; 913 914 admaif16_port: port@10 { 915 reg = <0x10>; 916 917 admaif16_ep: endpoint { 918 remote-endpoint = <&xbar_admaif16_ep>; 919 }; 920 }; 921 922 admaif17_port: port@11 { 923 reg = <0x11>; 924 925 admaif17_ep: endpoint { 926 remote-endpoint = <&xbar_admaif17_ep>; 927 }; 928 }; 929 930 admaif18_port: port@12 { 931 reg = <0x12>; 932 933 admaif18_ep: endpoint { 934 remote-endpoint = <&xbar_admaif18_ep>; 935 }; 936 }; 937 938 admaif19_port: port@13 { 939 reg = <0x13>; 940 941 admaif19_ep: endpoint { 942 remote-endpoint = <&xbar_admaif19_ep>; 943 }; 944 }; 945 }; 946 }; 947 948 i2s@2901200 { 949 status = "okay"; 950 951 ports { 952 #address-cells = <1>; 953 #size-cells = <0>; 954 955 port@0 { 956 reg = <0>; 957 958 i2s3_cif_ep: endpoint { 959 remote-endpoint = <&xbar_i2s3_ep>; 960 }; 961 }; 962 963 i2s3_port: port@1 { 964 reg = <1>; 965 966 i2s3_dap_ep: endpoint { 967 dai-format = "i2s"; 968 /* Place holder for external Codec */ 969 }; 970 }; 971 }; 972 }; 973 974 i2s@2901400 { 975 status = "okay"; 976 977 ports { 978 #address-cells = <1>; 979 #size-cells = <0>; 980 981 port@0 { 982 reg = <0>; 983 984 i2s5_cif_ep: endpoint { 985 remote-endpoint = <&xbar_i2s5_ep>; 986 }; 987 }; 988 989 i2s5_port: port@1 { 990 reg = <1>; 991 992 i2s5_dap_ep: endpoint { 993 dai-format = "i2s"; 994 /* Place holder for external Codec */ 995 }; 996 }; 997 }; 998 }; 999 1000 dmic@2904000 { 1001 status = "okay"; 1002 1003 ports { 1004 #address-cells = <1>; 1005 #size-cells = <0>; 1006 1007 port@0 { 1008 reg = <0>; 1009 1010 dmic1_cif_ep: endpoint { 1011 remote-endpoint = <&xbar_dmic1_ep>; 1012 }; 1013 }; 1014 1015 dmic1_port: port@1 { 1016 reg = <1>; 1017 1018 dmic1_dap_ep: endpoint { 1019 /* Place holder for external Codec */ 1020 }; 1021 }; 1022 }; 1023 }; 1024 1025 dmic@2904100 { 1026 status = "okay"; 1027 1028 ports { 1029 #address-cells = <1>; 1030 #size-cells = <0>; 1031 1032 port@0 { 1033 reg = <0>; 1034 1035 dmic2_cif_ep: endpoint { 1036 remote-endpoint = <&xbar_dmic2_ep>; 1037 }; 1038 }; 1039 1040 dmic2_port: port@1 { 1041 reg = <1>; 1042 1043 dmic2_dap_ep: endpoint { 1044 /* Place holder for external Codec */ 1045 }; 1046 }; 1047 }; 1048 }; 1049 1050 dmic@2904300 { 1051 status = "okay"; 1052 1053 ports { 1054 #address-cells = <1>; 1055 #size-cells = <0>; 1056 1057 port@0 { 1058 reg = <0>; 1059 1060 dmic4_cif_ep: endpoint { 1061 remote-endpoint = <&xbar_dmic4_ep>; 1062 }; 1063 }; 1064 1065 dmic4_port: port@1 { 1066 reg = <1>; 1067 1068 dmic4_dap_ep: endpoint { 1069 /* Place holder for external Codec */ 1070 }; 1071 }; 1072 }; 1073 }; 1074 1075 dspk@2905000 { 1076 status = "okay"; 1077 1078 ports { 1079 #address-cells = <1>; 1080 #size-cells = <0>; 1081 1082 port@0 { 1083 reg = <0>; 1084 1085 dspk1_cif_ep: endpoint { 1086 remote-endpoint = <&xbar_dspk1_ep>; 1087 }; 1088 }; 1089 1090 dspk1_port: port@1 { 1091 reg = <1>; 1092 1093 dspk1_dap_ep: endpoint { 1094 /* Place holder for external Codec */ 1095 }; 1096 }; 1097 }; 1098 }; 1099 1100 dspk@2905100 { 1101 status = "okay"; 1102 1103 ports { 1104 #address-cells = <1>; 1105 #size-cells = <0>; 1106 1107 port@0 { 1108 reg = <0>; 1109 1110 dspk2_cif_ep: endpoint { 1111 remote-endpoint = <&xbar_dspk2_ep>; 1112 }; 1113 }; 1114 1115 dspk2_port: port@1 { 1116 reg = <1>; 1117 1118 dspk2_dap_ep: endpoint { 1119 /* Place holder for external Codec */ 1120 }; 1121 }; 1122 }; 1123 }; 1124 1125 sfc@2902000 { 1126 status = "okay"; 1127 1128 ports { 1129 #address-cells = <1>; 1130 #size-cells = <0>; 1131 1132 port@0 { 1133 reg = <0>; 1134 1135 sfc1_cif_in_ep: endpoint { 1136 remote-endpoint = <&xbar_sfc1_in_ep>; 1137 convert-rate = <44100>; 1138 }; 1139 }; 1140 1141 sfc1_out_port: port@1 { 1142 reg = <1>; 1143 1144 sfc1_cif_out_ep: endpoint { 1145 remote-endpoint = <&xbar_sfc1_out_ep>; 1146 convert-rate = <48000>; 1147 }; 1148 }; 1149 }; 1150 }; 1151 1152 sfc@2902200 { 1153 status = "okay"; 1154 1155 ports { 1156 #address-cells = <1>; 1157 #size-cells = <0>; 1158 1159 port@0 { 1160 reg = <0>; 1161 1162 sfc2_cif_in_ep: endpoint { 1163 remote-endpoint = <&xbar_sfc2_in_ep>; 1164 }; 1165 }; 1166 1167 sfc2_out_port: port@1 { 1168 reg = <1>; 1169 1170 sfc2_cif_out_ep: endpoint { 1171 remote-endpoint = <&xbar_sfc2_out_ep>; 1172 }; 1173 }; 1174 }; 1175 }; 1176 1177 sfc@2902400 { 1178 status = "okay"; 1179 1180 ports { 1181 #address-cells = <1>; 1182 #size-cells = <0>; 1183 1184 port@0 { 1185 reg = <0>; 1186 1187 sfc3_cif_in_ep: endpoint { 1188 remote-endpoint = <&xbar_sfc3_in_ep>; 1189 }; 1190 }; 1191 1192 sfc3_out_port: port@1 { 1193 reg = <1>; 1194 1195 sfc3_cif_out_ep: endpoint { 1196 remote-endpoint = <&xbar_sfc3_out_ep>; 1197 }; 1198 }; 1199 }; 1200 }; 1201 1202 sfc@2902600 { 1203 status = "okay"; 1204 1205 ports { 1206 #address-cells = <1>; 1207 #size-cells = <0>; 1208 1209 port@0 { 1210 reg = <0>; 1211 1212 sfc4_cif_in_ep: endpoint { 1213 remote-endpoint = <&xbar_sfc4_in_ep>; 1214 }; 1215 }; 1216 1217 sfc4_out_port: port@1 { 1218 reg = <1>; 1219 1220 sfc4_cif_out_ep: endpoint { 1221 remote-endpoint = <&xbar_sfc4_out_ep>; 1222 }; 1223 }; 1224 }; 1225 }; 1226 1227 mvc@290a000 { 1228 status = "okay"; 1229 1230 ports { 1231 #address-cells = <1>; 1232 #size-cells = <0>; 1233 1234 port@0 { 1235 reg = <0>; 1236 1237 mvc1_cif_in_ep: endpoint { 1238 remote-endpoint = <&xbar_mvc1_in_ep>; 1239 }; 1240 }; 1241 1242 mvc1_out_port: port@1 { 1243 reg = <1>; 1244 1245 mvc1_cif_out_ep: endpoint { 1246 remote-endpoint = <&xbar_mvc1_out_ep>; 1247 }; 1248 }; 1249 }; 1250 }; 1251 1252 mvc@290a200 { 1253 status = "okay"; 1254 1255 ports { 1256 #address-cells = <1>; 1257 #size-cells = <0>; 1258 1259 port@0 { 1260 reg = <0>; 1261 1262 mvc2_cif_in_ep: endpoint { 1263 remote-endpoint = <&xbar_mvc2_in_ep>; 1264 }; 1265 }; 1266 1267 mvc2_out_port: port@1 { 1268 reg = <1>; 1269 1270 mvc2_cif_out_ep: endpoint { 1271 remote-endpoint = <&xbar_mvc2_out_ep>; 1272 }; 1273 }; 1274 }; 1275 }; 1276 1277 amx@2903000 { 1278 status = "okay"; 1279 1280 ports { 1281 #address-cells = <1>; 1282 #size-cells = <0>; 1283 1284 port@0 { 1285 reg = <0>; 1286 1287 amx1_in1_ep: endpoint { 1288 remote-endpoint = <&xbar_amx1_in1_ep>; 1289 }; 1290 }; 1291 1292 port@1 { 1293 reg = <1>; 1294 1295 amx1_in2_ep: endpoint { 1296 remote-endpoint = <&xbar_amx1_in2_ep>; 1297 }; 1298 }; 1299 1300 port@2 { 1301 reg = <2>; 1302 1303 amx1_in3_ep: endpoint { 1304 remote-endpoint = <&xbar_amx1_in3_ep>; 1305 }; 1306 }; 1307 1308 port@3 { 1309 reg = <3>; 1310 1311 amx1_in4_ep: endpoint { 1312 remote-endpoint = <&xbar_amx1_in4_ep>; 1313 }; 1314 }; 1315 1316 amx1_out_port: port@4 { 1317 reg = <4>; 1318 1319 amx1_out_ep: endpoint { 1320 remote-endpoint = <&xbar_amx1_out_ep>; 1321 }; 1322 }; 1323 }; 1324 }; 1325 1326 amx@2903100 { 1327 status = "okay"; 1328 1329 ports { 1330 #address-cells = <1>; 1331 #size-cells = <0>; 1332 1333 port@0 { 1334 reg = <0>; 1335 1336 amx2_in1_ep: endpoint { 1337 remote-endpoint = <&xbar_amx2_in1_ep>; 1338 }; 1339 }; 1340 1341 port@1 { 1342 reg = <1>; 1343 1344 amx2_in2_ep: endpoint { 1345 remote-endpoint = <&xbar_amx2_in2_ep>; 1346 }; 1347 }; 1348 1349 amx2_in3_port: port@2 { 1350 reg = <2>; 1351 1352 amx2_in3_ep: endpoint { 1353 remote-endpoint = <&xbar_amx2_in3_ep>; 1354 }; 1355 }; 1356 1357 amx2_in4_port: port@3 { 1358 reg = <3>; 1359 1360 amx2_in4_ep: endpoint { 1361 remote-endpoint = <&xbar_amx2_in4_ep>; 1362 }; 1363 }; 1364 1365 amx2_out_port: port@4 { 1366 reg = <4>; 1367 1368 amx2_out_ep: endpoint { 1369 remote-endpoint = <&xbar_amx2_out_ep>; 1370 }; 1371 }; 1372 }; 1373 }; 1374 1375 amx@2903200 { 1376 status = "okay"; 1377 1378 ports { 1379 #address-cells = <1>; 1380 #size-cells = <0>; 1381 1382 port@0 { 1383 reg = <0>; 1384 1385 amx3_in1_ep: endpoint { 1386 remote-endpoint = <&xbar_amx3_in1_ep>; 1387 }; 1388 }; 1389 1390 port@1 { 1391 reg = <1>; 1392 1393 amx3_in2_ep: endpoint { 1394 remote-endpoint = <&xbar_amx3_in2_ep>; 1395 }; 1396 }; 1397 1398 port@2 { 1399 reg = <2>; 1400 1401 amx3_in3_ep: endpoint { 1402 remote-endpoint = <&xbar_amx3_in3_ep>; 1403 }; 1404 }; 1405 1406 port@3 { 1407 reg = <3>; 1408 1409 amx3_in4_ep: endpoint { 1410 remote-endpoint = <&xbar_amx3_in4_ep>; 1411 }; 1412 }; 1413 1414 amx3_out_port: port@4 { 1415 reg = <4>; 1416 1417 amx3_out_ep: endpoint { 1418 remote-endpoint = <&xbar_amx3_out_ep>; 1419 }; 1420 }; 1421 }; 1422 }; 1423 1424 amx@2903300 { 1425 status = "okay"; 1426 1427 ports { 1428 #address-cells = <1>; 1429 #size-cells = <0>; 1430 1431 port@0 { 1432 reg = <0>; 1433 1434 amx4_in1_ep: endpoint { 1435 remote-endpoint = <&xbar_amx4_in1_ep>; 1436 }; 1437 }; 1438 1439 port@1 { 1440 reg = <1>; 1441 1442 amx4_in2_ep: endpoint { 1443 remote-endpoint = <&xbar_amx4_in2_ep>; 1444 }; 1445 }; 1446 1447 port@2 { 1448 reg = <2>; 1449 1450 amx4_in3_ep: endpoint { 1451 remote-endpoint = <&xbar_amx4_in3_ep>; 1452 }; 1453 }; 1454 1455 port@3 { 1456 reg = <3>; 1457 1458 amx4_in4_ep: endpoint { 1459 remote-endpoint = <&xbar_amx4_in4_ep>; 1460 }; 1461 }; 1462 1463 amx4_out_port: port@4 { 1464 reg = <4>; 1465 1466 amx4_out_ep: endpoint { 1467 remote-endpoint = <&xbar_amx4_out_ep>; 1468 }; 1469 }; 1470 }; 1471 }; 1472 1473 adx@2903800 { 1474 status = "okay"; 1475 1476 ports { 1477 #address-cells = <1>; 1478 #size-cells = <0>; 1479 1480 port@0 { 1481 reg = <0>; 1482 1483 adx1_in_ep: endpoint { 1484 remote-endpoint = <&xbar_adx1_in_ep>; 1485 }; 1486 }; 1487 1488 adx1_out1_port: port@1 { 1489 reg = <1>; 1490 1491 adx1_out1_ep: endpoint { 1492 remote-endpoint = <&xbar_adx1_out1_ep>; 1493 }; 1494 }; 1495 1496 adx1_out2_port: port@2 { 1497 reg = <2>; 1498 1499 adx1_out2_ep: endpoint { 1500 remote-endpoint = <&xbar_adx1_out2_ep>; 1501 }; 1502 }; 1503 1504 adx1_out3_port: port@3 { 1505 reg = <3>; 1506 1507 adx1_out3_ep: endpoint { 1508 remote-endpoint = <&xbar_adx1_out3_ep>; 1509 }; 1510 }; 1511 1512 adx1_out4_port: port@4 { 1513 reg = <4>; 1514 1515 adx1_out4_ep: endpoint { 1516 remote-endpoint = <&xbar_adx1_out4_ep>; 1517 }; 1518 }; 1519 }; 1520 }; 1521 1522 adx@2903900 { 1523 status = "okay"; 1524 1525 ports { 1526 #address-cells = <1>; 1527 #size-cells = <0>; 1528 1529 port@0 { 1530 reg = <0>; 1531 1532 adx2_in_ep: endpoint { 1533 remote-endpoint = <&xbar_adx2_in_ep>; 1534 }; 1535 }; 1536 1537 adx2_out1_port: port@1 { 1538 reg = <1>; 1539 1540 adx2_out1_ep: endpoint { 1541 remote-endpoint = <&xbar_adx2_out1_ep>; 1542 }; 1543 }; 1544 1545 adx2_out2_port: port@2 { 1546 reg = <2>; 1547 1548 adx2_out2_ep: endpoint { 1549 remote-endpoint = <&xbar_adx2_out2_ep>; 1550 }; 1551 }; 1552 1553 adx2_out3_port: port@3 { 1554 reg = <3>; 1555 1556 adx2_out3_ep: endpoint { 1557 remote-endpoint = <&xbar_adx2_out3_ep>; 1558 }; 1559 }; 1560 1561 adx2_out4_port: port@4 { 1562 reg = <4>; 1563 1564 adx2_out4_ep: endpoint { 1565 remote-endpoint = <&xbar_adx2_out4_ep>; 1566 }; 1567 }; 1568 }; 1569 }; 1570 1571 adx@2903a00 { 1572 status = "okay"; 1573 1574 ports { 1575 #address-cells = <1>; 1576 #size-cells = <0>; 1577 1578 port@0 { 1579 reg = <0>; 1580 1581 adx3_in_ep: endpoint { 1582 remote-endpoint = <&xbar_adx3_in_ep>; 1583 }; 1584 }; 1585 1586 adx3_out1_port: port@1 { 1587 reg = <1>; 1588 1589 adx3_out1_ep: endpoint { 1590 remote-endpoint = <&xbar_adx3_out1_ep>; 1591 }; 1592 }; 1593 1594 adx3_out2_port: port@2 { 1595 reg = <2>; 1596 1597 adx3_out2_ep: endpoint { 1598 remote-endpoint = <&xbar_adx3_out2_ep>; 1599 }; 1600 }; 1601 1602 adx3_out3_port: port@3 { 1603 reg = <3>; 1604 1605 adx3_out3_ep: endpoint { 1606 remote-endpoint = <&xbar_adx3_out3_ep>; 1607 }; 1608 }; 1609 1610 adx3_out4_port: port@4 { 1611 reg = <4>; 1612 1613 adx3_out4_ep: endpoint { 1614 remote-endpoint = <&xbar_adx3_out4_ep>; 1615 }; 1616 }; 1617 }; 1618 }; 1619 1620 adx@2903b00 { 1621 status = "okay"; 1622 1623 ports { 1624 #address-cells = <1>; 1625 #size-cells = <0>; 1626 1627 port@0 { 1628 reg = <0>; 1629 1630 adx4_in_ep: endpoint { 1631 remote-endpoint = <&xbar_adx4_in_ep>; 1632 }; 1633 }; 1634 1635 adx4_out1_port: port@1 { 1636 reg = <1>; 1637 1638 adx4_out1_ep: endpoint { 1639 remote-endpoint = <&xbar_adx4_out1_ep>; 1640 }; 1641 }; 1642 1643 adx4_out2_port: port@2 { 1644 reg = <2>; 1645 1646 adx4_out2_ep: endpoint { 1647 remote-endpoint = <&xbar_adx4_out2_ep>; 1648 }; 1649 }; 1650 1651 adx4_out3_port: port@3 { 1652 reg = <3>; 1653 1654 adx4_out3_ep: endpoint { 1655 remote-endpoint = <&xbar_adx4_out3_ep>; 1656 }; 1657 }; 1658 1659 adx4_out4_port: port@4 { 1660 reg = <4>; 1661 1662 adx4_out4_ep: endpoint { 1663 remote-endpoint = <&xbar_adx4_out4_ep>; 1664 }; 1665 }; 1666 }; 1667 }; 1668 1669 amixer@290bb00 { 1670 status = "okay"; 1671 1672 ports { 1673 #address-cells = <1>; 1674 #size-cells = <0>; 1675 1676 port@0 { 1677 reg = <0x0>; 1678 1679 mixer_in1_ep: endpoint { 1680 remote-endpoint = <&xbar_mixer_in1_ep>; 1681 }; 1682 }; 1683 1684 port@1 { 1685 reg = <0x1>; 1686 1687 mixer_in2_ep: endpoint { 1688 remote-endpoint = <&xbar_mixer_in2_ep>; 1689 }; 1690 }; 1691 1692 port@2 { 1693 reg = <0x2>; 1694 1695 mixer_in3_ep: endpoint { 1696 remote-endpoint = <&xbar_mixer_in3_ep>; 1697 }; 1698 }; 1699 1700 port@3 { 1701 reg = <0x3>; 1702 1703 mixer_in4_ep: endpoint { 1704 remote-endpoint = <&xbar_mixer_in4_ep>; 1705 }; 1706 }; 1707 1708 port@4 { 1709 reg = <0x4>; 1710 1711 mixer_in5_ep: endpoint { 1712 remote-endpoint = <&xbar_mixer_in5_ep>; 1713 }; 1714 }; 1715 1716 port@5 { 1717 reg = <0x5>; 1718 1719 mixer_in6_ep: endpoint { 1720 remote-endpoint = <&xbar_mixer_in6_ep>; 1721 }; 1722 }; 1723 1724 port@6 { 1725 reg = <0x6>; 1726 1727 mixer_in7_ep: endpoint { 1728 remote-endpoint = <&xbar_mixer_in7_ep>; 1729 }; 1730 }; 1731 1732 port@7 { 1733 reg = <0x7>; 1734 1735 mixer_in8_ep: endpoint { 1736 remote-endpoint = <&xbar_mixer_in8_ep>; 1737 }; 1738 }; 1739 1740 port@8 { 1741 reg = <0x8>; 1742 1743 mixer_in9_ep: endpoint { 1744 remote-endpoint = <&xbar_mixer_in9_ep>; 1745 }; 1746 }; 1747 1748 port@9 { 1749 reg = <0x9>; 1750 1751 mixer_in10_ep: endpoint { 1752 remote-endpoint = <&xbar_mixer_in10_ep>; 1753 }; 1754 }; 1755 1756 mixer_out1_port: port@a { 1757 reg = <0xa>; 1758 1759 mixer_out1_ep: endpoint { 1760 remote-endpoint = <&xbar_mixer_out1_ep>; 1761 }; 1762 }; 1763 1764 mixer_out2_port: port@b { 1765 reg = <0xb>; 1766 1767 mixer_out2_ep: endpoint { 1768 remote-endpoint = <&xbar_mixer_out2_ep>; 1769 }; 1770 }; 1771 1772 mixer_out3_port: port@c { 1773 reg = <0xc>; 1774 1775 mixer_out3_ep: endpoint { 1776 remote-endpoint = <&xbar_mixer_out3_ep>; 1777 }; 1778 }; 1779 1780 mixer_out4_port: port@d { 1781 reg = <0xd>; 1782 1783 mixer_out4_ep: endpoint { 1784 remote-endpoint = <&xbar_mixer_out4_ep>; 1785 }; 1786 }; 1787 1788 mixer_out5_port: port@e { 1789 reg = <0xe>; 1790 1791 mixer_out5_ep: endpoint { 1792 remote-endpoint = <&xbar_mixer_out5_ep>; 1793 }; 1794 }; 1795 }; 1796 }; 1797 }; 1798 }; 1799 1800 ddc: i2c@3190000 { 1801 status = "okay"; 1802 }; 1803 1804 i2c@3160000 { 1805 eeprom@57 { 1806 compatible = "atmel,24c02"; 1807 reg = <0x57>; 1808 1809 label = "system"; 1810 vcc-supply = <&vdd_1v8>; 1811 address-width = <8>; 1812 pagesize = <8>; 1813 size = <256>; 1814 read-only; 1815 }; 1816 }; 1817 1818 hda@3510000 { 1819 nvidia,model = "NVIDIA Jetson Xavier NX HDA"; 1820 status = "okay"; 1821 }; 1822 1823 padctl@3520000 { 1824 status = "okay"; 1825 1826 pads { 1827 usb2 { 1828 lanes { 1829 usb2-0 { 1830 status = "okay"; 1831 }; 1832 1833 usb2-1 { 1834 status = "okay"; 1835 }; 1836 1837 usb2-2 { 1838 status = "okay"; 1839 }; 1840 }; 1841 }; 1842 1843 usb3 { 1844 lanes { 1845 usb3-2 { 1846 status = "okay"; 1847 }; 1848 }; 1849 }; 1850 }; 1851 1852 ports { 1853 usb2-0 { 1854 mode = "otg"; 1855 status = "okay"; 1856 usb-role-switch; 1857 connector { 1858 compatible = "gpio-usb-b-connector", 1859 "usb-b-connector"; 1860 label = "micro-USB"; 1861 type = "micro"; 1862 vbus-gpio = <&gpio TEGRA194_MAIN_GPIO(Z, 1) 1863 GPIO_ACTIVE_LOW>; 1864 }; 1865 }; 1866 1867 usb2-1 { 1868 mode = "host"; 1869 status = "okay"; 1870 }; 1871 1872 usb2-2 { 1873 mode = "host"; 1874 vbus-supply = <&vdd_5v0_sys>; 1875 status = "okay"; 1876 }; 1877 1878 usb3-2 { 1879 nvidia,usb2-companion = <1>; 1880 vbus-supply = <&vdd_5v0_sys>; 1881 status = "okay"; 1882 }; 1883 }; 1884 }; 1885 1886 usb@3610000 { 1887 status = "okay"; 1888 1889 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-1}>, 1890 <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-2}>, 1891 <&{/bus@0/padctl@3520000/pads/usb3/lanes/usb3-2}>; 1892 phy-names = "usb2-1", "usb2-2", "usb3-2"; 1893 }; 1894 1895 usb@3550000 { 1896 status = "okay"; 1897 1898 phys = <&{/bus@0/padctl@3520000/pads/usb2/lanes/usb2-0}>; 1899 phy-names = "usb2-0"; 1900 }; 1901 1902 spi@3270000 { 1903 status = "okay"; 1904 1905 flash@0 { 1906 compatible = "jedec,spi-nor"; 1907 reg = <0>; 1908 spi-max-frequency = <102000000>; 1909 spi-tx-bus-width = <4>; 1910 spi-rx-bus-width = <4>; 1911 }; 1912 }; 1913 1914 pwm@32d0000 { 1915 status = "okay"; 1916 }; 1917 1918 host1x@13e00000 { 1919 display-hub@15200000 { 1920 status = "okay"; 1921 }; 1922 1923 dpaux@155c0000 { 1924 status = "okay"; 1925 }; 1926 1927 dpaux@155d0000 { 1928 status = "okay"; 1929 }; 1930 1931 /* DP0 */ 1932 sor@15b00000 { 1933 status = "okay"; 1934 1935 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 1936 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 1937 1938 nvidia,dpaux = <&dpaux0>; 1939 }; 1940 1941 /* HDMI */ 1942 sor@15b40000 { 1943 status = "okay"; 1944 1945 avdd-io-hdmi-dp-supply = <&vdd_1v0>; 1946 vdd-hdmi-dp-pll-supply = <&vdd_1v8hs>; 1947 hdmi-supply = <&vdd_hdmi>; 1948 1949 nvidia,ddc-i2c-bus = <&ddc>; 1950 nvidia,hpd-gpio = <&gpio TEGRA194_MAIN_GPIO(M, 1) 1951 GPIO_ACTIVE_LOW>; 1952 }; 1953 }; 1954 }; 1955 1956 pcie@14160000 { 1957 status = "okay"; 1958 1959 vddio-pex-ctl-supply = <&vdd_1v8ao>; 1960 1961 phys = <&p2u_hsio_11>; 1962 phy-names = "p2u-0"; 1963 }; 1964 1965 pcie@141a0000 { 1966 status = "okay"; 1967 1968 vddio-pex-ctl-supply = <&vdd_1v8ao>; 1969 1970 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 1971 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 1972 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 1973 1974 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 1975 "p2u-5", "p2u-6", "p2u-7"; 1976 }; 1977 1978 pcie-ep@141a0000 { 1979 status = "disabled"; 1980 1981 vddio-pex-ctl-supply = <&vdd_1v8ao>; 1982 1983 reset-gpios = <&gpio TEGRA194_MAIN_GPIO(GG, 1) GPIO_ACTIVE_LOW>; 1984 1985 nvidia,refclk-select-gpios = <&gpio_aon TEGRA194_AON_GPIO(AA, 5) 1986 GPIO_ACTIVE_HIGH>; 1987 1988 phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>, 1989 <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>, 1990 <&p2u_nvhs_6>, <&p2u_nvhs_7>; 1991 1992 phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4", 1993 "p2u-5", "p2u-6", "p2u-7"; 1994 }; 1995 1996 fan: fan { 1997 compatible = "pwm-fan"; 1998 pwms = <&pwm6 0 45334>; 1999 2000 cooling-levels = <0 64 128 255>; 2001 #cooling-cells = <2>; 2002 }; 2003 2004 gpio-keys { 2005 compatible = "gpio-keys"; 2006 2007 force-recovery { 2008 label = "Force Recovery"; 2009 gpios = <&gpio TEGRA194_MAIN_GPIO(G, 0) 2010 GPIO_ACTIVE_LOW>; 2011 linux,input-type = <EV_KEY>; 2012 linux,code = <KEY_SLEEP>; 2013 debounce-interval = <10>; 2014 }; 2015 2016 power { 2017 label = "Power"; 2018 gpios = <&gpio_aon TEGRA194_AON_GPIO(EE, 4) 2019 GPIO_ACTIVE_LOW>; 2020 linux,input-type = <EV_KEY>; 2021 linux,code = <KEY_POWER>; 2022 debounce-interval = <10>; 2023 wakeup-event-action = <EV_ACT_ASSERTED>; 2024 wakeup-source; 2025 }; 2026 }; 2027 2028 vdd_5v0_sys: regulator-vdd-5v0-sys { 2029 compatible = "regulator-fixed"; 2030 regulator-name = "VDD_5V_SYS"; 2031 regulator-min-microvolt = <5000000>; 2032 regulator-max-microvolt = <5000000>; 2033 regulator-always-on; 2034 regulator-boot-on; 2035 }; 2036 2037 vdd_3v3_sys: regulator-vdd-3v3-sys { 2038 compatible = "regulator-fixed"; 2039 regulator-name = "VDD_3V3_SYS"; 2040 regulator-min-microvolt = <3300000>; 2041 regulator-max-microvolt = <3300000>; 2042 regulator-always-on; 2043 regulator-boot-on; 2044 }; 2045 2046 vdd_3v3_ao: regulator-vdd-3v3-ao { 2047 compatible = "regulator-fixed"; 2048 regulator-name = "VDD_3V3_AO"; 2049 regulator-min-microvolt = <3300000>; 2050 regulator-max-microvolt = <3300000>; 2051 regulator-always-on; 2052 regulator-boot-on; 2053 }; 2054 2055 vdd_1v8: regulator-vdd-1v8 { 2056 compatible = "regulator-fixed"; 2057 regulator-name = "VDD_1V8"; 2058 regulator-min-microvolt = <1800000>; 2059 regulator-max-microvolt = <1800000>; 2060 regulator-always-on; 2061 regulator-boot-on; 2062 }; 2063 2064 vdd_hdmi: regulator-vdd-hdmi { 2065 compatible = "regulator-fixed"; 2066 regulator-name = "VDD_5V0_HDMI_CON"; 2067 regulator-min-microvolt = <5000000>; 2068 regulator-max-microvolt = <5000000>; 2069 regulator-always-on; 2070 regulator-boot-on; 2071 }; 2072 2073 sound { 2074 compatible = "nvidia,tegra186-audio-graph-card"; 2075 status = "okay"; 2076 2077 dais = /* ADMAIF (FE) Ports */ 2078 <&admaif0_port>, <&admaif1_port>, <&admaif2_port>, <&admaif3_port>, 2079 <&admaif4_port>, <&admaif5_port>, <&admaif6_port>, <&admaif7_port>, 2080 <&admaif8_port>, <&admaif9_port>, <&admaif10_port>, <&admaif11_port>, 2081 <&admaif12_port>, <&admaif13_port>, <&admaif14_port>, <&admaif15_port>, 2082 <&admaif16_port>, <&admaif17_port>, <&admaif18_port>, <&admaif19_port>, 2083 /* XBAR Ports */ 2084 <&xbar_i2s3_port>, <&xbar_i2s5_port>, 2085 <&xbar_dmic1_port>, <&xbar_dmic2_port>, <&xbar_dmic4_port>, 2086 <&xbar_dspk1_port>, <&xbar_dspk2_port>, 2087 <&xbar_sfc1_in_port>, <&xbar_sfc2_in_port>, 2088 <&xbar_sfc3_in_port>, <&xbar_sfc4_in_port>, 2089 <&xbar_mvc1_in_port>, <&xbar_mvc2_in_port>, 2090 <&xbar_amx1_in1_port>, <&xbar_amx1_in2_port>, 2091 <&xbar_amx1_in3_port>, <&xbar_amx1_in4_port>, 2092 <&xbar_amx2_in1_port>, <&xbar_amx2_in2_port>, 2093 <&xbar_amx2_in3_port>, <&xbar_amx2_in4_port>, 2094 <&xbar_amx3_in1_port>, <&xbar_amx3_in2_port>, 2095 <&xbar_amx3_in3_port>, <&xbar_amx3_in4_port>, 2096 <&xbar_amx4_in1_port>, <&xbar_amx4_in2_port>, 2097 <&xbar_amx4_in3_port>, <&xbar_amx4_in4_port>, 2098 <&xbar_adx1_in_port>, <&xbar_adx2_in_port>, 2099 <&xbar_adx3_in_port>, <&xbar_adx4_in_port>, 2100 <&xbar_mixer_in1_port>, <&xbar_mixer_in2_port>, 2101 <&xbar_mixer_in3_port>, <&xbar_mixer_in4_port>, 2102 <&xbar_mixer_in5_port>, <&xbar_mixer_in6_port>, 2103 <&xbar_mixer_in7_port>, <&xbar_mixer_in8_port>, 2104 <&xbar_mixer_in9_port>, <&xbar_mixer_in10_port>, 2105 /* HW accelerators */ 2106 <&sfc1_out_port>, <&sfc2_out_port>, 2107 <&sfc3_out_port>, <&sfc4_out_port>, 2108 <&mvc1_out_port>, <&mvc2_out_port>, 2109 <&amx1_out_port>, <&amx2_out_port>, 2110 <&amx3_out_port>, <&amx4_out_port>, 2111 <&adx1_out1_port>, <&adx1_out2_port>, 2112 <&adx1_out3_port>, <&adx1_out4_port>, 2113 <&adx2_out1_port>, <&adx2_out2_port>, 2114 <&adx2_out3_port>, <&adx2_out4_port>, 2115 <&adx3_out1_port>, <&adx3_out2_port>, 2116 <&adx3_out3_port>, <&adx3_out4_port>, 2117 <&adx4_out1_port>, <&adx4_out2_port>, 2118 <&adx4_out3_port>, <&adx4_out4_port>, 2119 <&mixer_out1_port>, <&mixer_out2_port>, 2120 <&mixer_out3_port>, <&mixer_out4_port>, 2121 <&mixer_out5_port>, 2122 /* BE I/O Ports */ 2123 <&i2s3_port>, <&i2s5_port>, 2124 <&dmic1_port>, <&dmic2_port>, <&dmic4_port>, 2125 <&dspk1_port>, <&dspk2_port>; 2126 2127 label = "NVIDIA Jetson Xavier NX APE"; 2128 }; 2129 2130 thermal-zones { 2131 cpu-thermal { 2132 polling-delay = <0>; 2133 polling-delay-passive = <500>; 2134 status = "okay"; 2135 2136 trips { 2137 cpu_trip_critical: critical { 2138 temperature = <96500>; 2139 hysteresis = <0>; 2140 type = "critical"; 2141 }; 2142 2143 cpu_trip_hot: hot { 2144 temperature = <70000>; 2145 hysteresis = <2000>; 2146 type = "hot"; 2147 }; 2148 2149 cpu_trip_active: active { 2150 temperature = <50000>; 2151 hysteresis = <2000>; 2152 type = "active"; 2153 }; 2154 2155 cpu_trip_passive: passive { 2156 temperature = <30000>; 2157 hysteresis = <2000>; 2158 type = "passive"; 2159 }; 2160 }; 2161 2162 cooling-maps { 2163 cpu-critical { 2164 cooling-device = <&fan 3 3>; 2165 trip = <&cpu_trip_critical>; 2166 }; 2167 2168 cpu-hot { 2169 cooling-device = <&fan 2 2>; 2170 trip = <&cpu_trip_hot>; 2171 }; 2172 2173 cpu-active { 2174 cooling-device = <&fan 1 1>; 2175 trip = <&cpu_trip_active>; 2176 }; 2177 2178 cpu-passive { 2179 cooling-device = <&fan 0 0>; 2180 trip = <&cpu_trip_passive>; 2181 }; 2182 }; 2183 }; 2184 2185 gpu-thermal { 2186 polling-delay = <0>; 2187 polling-delay-passive = <500>; 2188 status = "okay"; 2189 2190 trips { 2191 gpu_alert0: critical { 2192 temperature = <99000>; 2193 hysteresis = <0>; 2194 type = "critical"; 2195 }; 2196 }; 2197 }; 2198 2199 aux-thermal { 2200 polling-delay = <0>; 2201 polling-delay-passive = <500>; 2202 status = "okay"; 2203 2204 trips { 2205 aux_alert0: critical { 2206 temperature = <90000>; 2207 hysteresis = <0>; 2208 type = "critical"; 2209 }; 2210 }; 2211 }; 2212 }; 2213}; 2214