1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (C) 2023 Nuvoton Technology Corp. 4 * Author: Shan-Chun Hung <schung@nuvoton.com> 5 * Jacky huang <ychuang3@nuvoton.com> 6 */ 7 8#include <dt-bindings/interrupt-controller/arm-gic.h> 9#include <dt-bindings/input/input.h> 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/clock/nuvoton,ma35d1-clk.h> 12#include <dt-bindings/reset/nuvoton,ma35d1-reset.h> 13 14/ { 15 compatible = "nuvoton,ma35d1"; 16 interrupt-parent = <&gic>; 17 #address-cells = <2>; 18 #size-cells = <2>; 19 20 cpus { 21 #address-cells = <2>; 22 #size-cells = <0>; 23 24 cpu0: cpu@0 { 25 device_type = "cpu"; 26 compatible = "arm,cortex-a35"; 27 reg = <0x0 0x0>; 28 enable-method = "psci"; 29 next-level-cache = <&L2_0>; 30 }; 31 32 cpu1: cpu@1 { 33 device_type = "cpu"; 34 compatible = "arm,cortex-a35"; 35 reg = <0x0 0x1>; 36 enable-method = "psci"; 37 next-level-cache = <&L2_0>; 38 }; 39 40 L2_0: l2-cache { 41 compatible = "cache"; 42 cache-level = <2>; 43 cache-unified; 44 cache-size = <0x80000>; 45 }; 46 }; 47 48 psci { 49 compatible = "arm,psci-0.2"; 50 method = "smc"; 51 }; 52 53 gic: interrupt-controller@50801000 { 54 compatible = "arm,gic-400"; 55 reg = <0x0 0x50801000 0 0x1000>, /* GICD */ 56 <0x0 0x50802000 0 0x2000>, /* GICC */ 57 <0x0 0x50804000 0 0x2000>, /* GICH */ 58 <0x0 0x50806000 0 0x2000>; /* GICV */ 59 #interrupt-cells = <3>; 60 interrupt-parent = <&gic>; 61 interrupt-controller; 62 interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0x13) | 63 IRQ_TYPE_LEVEL_HIGH)>; 64 }; 65 66 timer { 67 compatible = "arm,armv8-timer"; 68 interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | 69 IRQ_TYPE_LEVEL_LOW)>, /* Physical Secure */ 70 <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | 71 IRQ_TYPE_LEVEL_LOW)>, /* Physical Non-Secure */ 72 <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | 73 IRQ_TYPE_LEVEL_LOW)>, /* Virtual */ 74 <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | 75 IRQ_TYPE_LEVEL_LOW)>; /* Hypervisor */ 76 interrupt-parent = <&gic>; 77 }; 78 79 soc { 80 compatible = "simple-bus"; 81 #address-cells = <2>; 82 #size-cells = <2>; 83 ranges; 84 85 sys: system-management@40460000 { 86 compatible = "nuvoton,ma35d1-reset"; 87 reg = <0x0 0x40460000 0x0 0x200>; 88 #reset-cells = <1>; 89 }; 90 91 clk: clock-controller@40460200 { 92 compatible = "nuvoton,ma35d1-clk"; 93 reg = <0x00000000 0x40460200 0x0 0x100>; 94 #clock-cells = <1>; 95 clocks = <&clk_hxt>; 96 }; 97 98 uart0: serial@40700000 { 99 compatible = "nuvoton,ma35d1-uart"; 100 reg = <0x0 0x40700000 0x0 0x100>; 101 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 102 clocks = <&clk UART0_GATE>; 103 status = "disabled"; 104 }; 105 106 uart1: serial@40710000 { 107 compatible = "nuvoton,ma35d1-uart"; 108 reg = <0x0 0x40710000 0x0 0x100>; 109 interrupts = <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>; 110 clocks = <&clk UART1_GATE>; 111 status = "disabled"; 112 }; 113 114 uart2: serial@40720000 { 115 compatible = "nuvoton,ma35d1-uart"; 116 reg = <0x0 0x40720000 0x0 0x100>; 117 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>; 118 clocks = <&clk UART2_GATE>; 119 status = "disabled"; 120 }; 121 122 uart3: serial@40730000 { 123 compatible = "nuvoton,ma35d1-uart"; 124 reg = <0x0 0x40730000 0x0 0x100>; 125 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>; 126 clocks = <&clk UART3_GATE>; 127 status = "disabled"; 128 }; 129 130 uart4: serial@40740000 { 131 compatible = "nuvoton,ma35d1-uart"; 132 reg = <0x0 0x40740000 0x0 0x100>; 133 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>; 134 clocks = <&clk UART4_GATE>; 135 status = "disabled"; 136 }; 137 138 uart5: serial@40750000 { 139 compatible = "nuvoton,ma35d1-uart"; 140 reg = <0x0 0x40750000 0x0 0x100>; 141 interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>; 142 clocks = <&clk UART5_GATE>; 143 status = "disabled"; 144 }; 145 146 uart6: serial@40760000 { 147 compatible = "nuvoton,ma35d1-uart"; 148 reg = <0x0 0x40760000 0x0 0x100>; 149 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>; 150 clocks = <&clk UART6_GATE>; 151 status = "disabled"; 152 }; 153 154 uart7: serial@40770000 { 155 compatible = "nuvoton,ma35d1-uart"; 156 reg = <0x0 0x40770000 0x0 0x100>; 157 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>; 158 clocks = <&clk UART7_GATE>; 159 status = "disabled"; 160 }; 161 162 uart8: serial@40780000 { 163 compatible = "nuvoton,ma35d1-uart"; 164 reg = <0x0 0x40780000 0x0 0x100>; 165 interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 166 clocks = <&clk UART8_GATE>; 167 status = "disabled"; 168 }; 169 170 uart9: serial@40790000 { 171 compatible = "nuvoton,ma35d1-uart"; 172 reg = <0x0 0x40790000 0x0 0x100>; 173 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>; 174 clocks = <&clk UART9_GATE>; 175 status = "disabled"; 176 }; 177 178 uart10: serial@407a0000 { 179 compatible = "nuvoton,ma35d1-uart"; 180 reg = <0x0 0x407a0000 0x0 0x100>; 181 interrupts = <GIC_SPI 95 IRQ_TYPE_LEVEL_HIGH>; 182 clocks = <&clk UART10_GATE>; 183 status = "disabled"; 184 }; 185 186 uart11: serial@407b0000 { 187 compatible = "nuvoton,ma35d1-uart"; 188 reg = <0x0 0x407b0000 0x0 0x100>; 189 interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>; 190 clocks = <&clk UART11_GATE>; 191 status = "disabled"; 192 }; 193 194 uart12: serial@407c0000 { 195 compatible = "nuvoton,ma35d1-uart"; 196 reg = <0x0 0x407c0000 0x0 0x100>; 197 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>; 198 clocks = <&clk UART12_GATE>; 199 status = "disabled"; 200 }; 201 202 uart13: serial@407d0000 { 203 compatible = "nuvoton,ma35d1-uart"; 204 reg = <0x0 0x407d0000 0x0 0x100>; 205 interrupts = <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>; 206 clocks = <&clk UART13_GATE>; 207 status = "disabled"; 208 }; 209 210 uart14: serial@407e0000 { 211 compatible = "nuvoton,ma35d1-uart"; 212 reg = <0x0 0x407e0000 0x0 0x100>; 213 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 214 clocks = <&clk UART14_GATE>; 215 status = "disabled"; 216 }; 217 218 uart15: serial@407f0000 { 219 compatible = "nuvoton,ma35d1-uart"; 220 reg = <0x0 0x407f0000 0x0 0x100>; 221 interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>; 222 clocks = <&clk UART15_GATE>; 223 status = "disabled"; 224 }; 225 226 uart16: serial@40880000 { 227 compatible = "nuvoton,ma35d1-uart"; 228 reg = <0x0 0x40880000 0x0 0x100>; 229 interrupts = <GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>; 230 clocks = <&clk UART16_GATE>; 231 status = "disabled"; 232 }; 233 }; 234}; 235