xref: /freebsd/sys/contrib/device-tree/src/arm64/microchip/sparx5_pcb135_board.dtsi (revision c66ec88fed842fbaad62c30d510644ceb7bd2d71)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries.
4 */
5
6/dts-v1/;
7#include "sparx5_pcb_common.dtsi"
8
9/{
10	aliases {
11	    i2c0   = &i2c0;
12	    i2c152 = &i2c152;
13	    i2c153 = &i2c153;
14	    i2c154 = &i2c154;
15	    i2c155 = &i2c155;
16	};
17
18	gpio-restart {
19		compatible = "gpio-restart";
20		gpios = <&gpio 37 GPIO_ACTIVE_LOW>;
21		priority = <200>;
22	};
23};
24
25&gpio {
26	i2cmux_pins_i: i2cmux-pins-i {
27	       pins = "GPIO_35", "GPIO_36",
28		      "GPIO_50", "GPIO_51";
29		function = "twi_scl_m";
30		output-low;
31	};
32	i2cmux_s29: i2cmux-0 {
33		pins = "GPIO_35";
34		function = "twi_scl_m";
35		output-high;
36	};
37	i2cmux_s30: i2cmux-1 {
38		pins = "GPIO_36";
39		function = "twi_scl_m";
40		output-high;
41	};
42	i2cmux_s31: i2cmux-2 {
43		pins = "GPIO_50";
44		function = "twi_scl_m";
45		output-high;
46	};
47	i2cmux_s32: i2cmux-3 {
48		pins = "GPIO_51";
49		function = "twi_scl_m";
50		output-high;
51	};
52};
53
54&axi {
55	i2c0_imux: i2c0-imux@0 {
56		compatible = "i2c-mux-pinctrl";
57		#address-cells = <1>;
58		#size-cells = <0>;
59		i2c-parent = <&i2c0>;
60	};
61};
62
63&i2c0_imux {
64	pinctrl-names =
65		"i2c152", "i2c153", "i2c154", "i2c155",
66		"idle";
67	pinctrl-0 = <&i2cmux_s29>;
68	pinctrl-1 = <&i2cmux_s30>;
69	pinctrl-2 = <&i2cmux_s31>;
70	pinctrl-3 = <&i2cmux_s32>;
71	pinctrl-4 = <&i2cmux_pins_i>;
72	i2c152: i2c_sfp1 {
73		reg = <0x0>;
74		#address-cells = <1>;
75		#size-cells = <0>;
76	};
77	i2c153: i2c_sfp2 {
78		reg = <0x1>;
79		#address-cells = <1>;
80		#size-cells = <0>;
81	};
82	i2c154: i2c_sfp3 {
83		reg = <0x2>;
84		#address-cells = <1>;
85		#size-cells = <0>;
86	};
87	i2c155: i2c_sfp4 {
88		reg = <0x3>;
89		#address-cells = <1>;
90		#size-cells = <0>;
91	};
92};
93