1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (c) 2020 Microchip Technology Inc. and its subsidiaries. 4 */ 5 6/dts-v1/; 7#include "sparx5_pcb_common.dtsi" 8 9/{ 10 aliases { 11 i2c0 = &i2c0; 12 i2c100 = &i2c100; 13 i2c101 = &i2c101; 14 i2c102 = &i2c102; 15 i2c103 = &i2c103; 16 i2c104 = &i2c104; 17 i2c105 = &i2c105; 18 i2c106 = &i2c106; 19 i2c107 = &i2c107; 20 i2c108 = &i2c108; 21 i2c109 = &i2c109; 22 i2c110 = &i2c110; 23 i2c111 = &i2c111; 24 i2c112 = &i2c112; 25 i2c113 = &i2c113; 26 i2c114 = &i2c114; 27 i2c115 = &i2c115; 28 i2c116 = &i2c116; 29 i2c117 = &i2c117; 30 i2c118 = &i2c118; 31 i2c119 = &i2c119; 32 }; 33 34 gpio-restart { 35 compatible = "gpio-restart"; 36 gpios = <&gpio 37 GPIO_ACTIVE_LOW>; 37 priority = <200>; 38 }; 39}; 40 41&spi0 { 42 status = "okay"; 43 spi@0 { 44 compatible = "spi-mux"; 45 mux-controls = <&mux>; 46 #address-cells = <1>; 47 #size-cells = <0>; 48 reg = <0>; /* CS0 */ 49 spi-flash@9 { 50 compatible = "jedec,spi-nor"; 51 spi-max-frequency = <8000000>; 52 reg = <0x9>; /* SPI */ 53 }; 54 }; 55}; 56 57&spi0 { 58 status = "okay"; 59 spi@0 { 60 compatible = "spi-mux"; 61 mux-controls = <&mux>; 62 #address-cells = <1>; 63 #size-cells = <0>; 64 reg = <0>; /* CS0 */ 65 spi-flash@9 { 66 compatible = "jedec,spi-nor"; 67 spi-max-frequency = <8000000>; 68 reg = <0x9>; /* SPI */ 69 }; 70 }; 71}; 72 73&gpio { 74 i2cmux_pins_i: i2cmux-pins-i { 75 pins = "GPIO_16", "GPIO_17", "GPIO_18", "GPIO_19", 76 "GPIO_20", "GPIO_22", "GPIO_36", "GPIO_35", 77 "GPIO_50", "GPIO_51", "GPIO_56", "GPIO_57"; 78 function = "twi_scl_m"; 79 output-low; 80 }; 81 i2cmux_0: i2cmux-0 { 82 pins = "GPIO_16"; 83 function = "twi_scl_m"; 84 output-high; 85 }; 86 i2cmux_1: i2cmux-1 { 87 pins = "GPIO_17"; 88 function = "twi_scl_m"; 89 output-high; 90 }; 91 i2cmux_2: i2cmux-2 { 92 pins = "GPIO_18"; 93 function = "twi_scl_m"; 94 output-high; 95 }; 96 i2cmux_3: i2cmux-3 { 97 pins = "GPIO_19"; 98 function = "twi_scl_m"; 99 output-high; 100 }; 101 i2cmux_4: i2cmux-4 { 102 pins = "GPIO_20"; 103 function = "twi_scl_m"; 104 output-high; 105 }; 106 i2cmux_5: i2cmux-5 { 107 pins = "GPIO_22"; 108 function = "twi_scl_m"; 109 output-high; 110 }; 111 i2cmux_6: i2cmux-6 { 112 pins = "GPIO_36"; 113 function = "twi_scl_m"; 114 output-high; 115 }; 116 i2cmux_7: i2cmux-7 { 117 pins = "GPIO_35"; 118 function = "twi_scl_m"; 119 output-high; 120 }; 121 i2cmux_8: i2cmux-8 { 122 pins = "GPIO_50"; 123 function = "twi_scl_m"; 124 output-high; 125 }; 126 i2cmux_9: i2cmux-9 { 127 pins = "GPIO_51"; 128 function = "twi_scl_m"; 129 output-high; 130 }; 131 i2cmux_10: i2cmux-10 { 132 pins = "GPIO_56"; 133 function = "twi_scl_m"; 134 output-high; 135 }; 136 i2cmux_11: i2cmux-11 { 137 pins = "GPIO_57"; 138 function = "twi_scl_m"; 139 output-high; 140 }; 141}; 142 143&axi { 144 i2c0_imux: i2c0-imux@0 { 145 compatible = "i2c-mux-pinctrl"; 146 #address-cells = <1>; 147 #size-cells = <0>; 148 i2c-parent = <&i2c0>; 149 }; 150 i2c0_emux: i2c0-emux@0 { 151 compatible = "i2c-mux-gpio"; 152 #address-cells = <1>; 153 #size-cells = <0>; 154 i2c-parent = <&i2c0>; 155 }; 156}; 157 158&i2c0_imux { 159 pinctrl-names = 160 "i2c100", "i2c101", "i2c102", "i2c103", 161 "i2c104", "i2c105", "i2c106", "i2c107", 162 "i2c108", "i2c109", "i2c110", "i2c111", "idle"; 163 pinctrl-0 = <&i2cmux_0>; 164 pinctrl-1 = <&i2cmux_1>; 165 pinctrl-2 = <&i2cmux_2>; 166 pinctrl-3 = <&i2cmux_3>; 167 pinctrl-4 = <&i2cmux_4>; 168 pinctrl-5 = <&i2cmux_5>; 169 pinctrl-6 = <&i2cmux_6>; 170 pinctrl-7 = <&i2cmux_7>; 171 pinctrl-8 = <&i2cmux_8>; 172 pinctrl-9 = <&i2cmux_9>; 173 pinctrl-10 = <&i2cmux_10>; 174 pinctrl-11 = <&i2cmux_11>; 175 pinctrl-12 = <&i2cmux_pins_i>; 176 i2c100: i2c_sfp1 { 177 reg = <0x0>; 178 #address-cells = <1>; 179 #size-cells = <0>; 180 }; 181 i2c101: i2c_sfp2 { 182 reg = <0x1>; 183 #address-cells = <1>; 184 #size-cells = <0>; 185 }; 186 i2c102: i2c_sfp3 { 187 reg = <0x2>; 188 #address-cells = <1>; 189 #size-cells = <0>; 190 }; 191 i2c103: i2c_sfp4 { 192 reg = <0x3>; 193 #address-cells = <1>; 194 #size-cells = <0>; 195 }; 196 i2c104: i2c_sfp5 { 197 reg = <0x4>; 198 #address-cells = <1>; 199 #size-cells = <0>; 200 }; 201 i2c105: i2c_sfp6 { 202 reg = <0x5>; 203 #address-cells = <1>; 204 #size-cells = <0>; 205 }; 206 i2c106: i2c_sfp7 { 207 reg = <0x6>; 208 #address-cells = <1>; 209 #size-cells = <0>; 210 }; 211 i2c107: i2c_sfp8 { 212 reg = <0x7>; 213 #address-cells = <1>; 214 #size-cells = <0>; 215 }; 216 i2c108: i2c_sfp9 { 217 reg = <0x8>; 218 #address-cells = <1>; 219 #size-cells = <0>; 220 }; 221 i2c109: i2c_sfp10 { 222 reg = <0x9>; 223 #address-cells = <1>; 224 #size-cells = <0>; 225 }; 226 i2c110: i2c_sfp11 { 227 reg = <0xa>; 228 #address-cells = <1>; 229 #size-cells = <0>; 230 }; 231 i2c111: i2c_sfp12 { 232 reg = <0xb>; 233 #address-cells = <1>; 234 #size-cells = <0>; 235 }; 236}; 237 238&i2c0_emux { 239 mux-gpios = <&gpio 55 GPIO_ACTIVE_HIGH 240 &gpio 60 GPIO_ACTIVE_HIGH 241 &gpio 61 GPIO_ACTIVE_HIGH 242 &gpio 54 GPIO_ACTIVE_HIGH>; 243 idle-state = <0x8>; 244 i2c112: i2c_sfp13 { 245 reg = <0x0>; 246 #address-cells = <1>; 247 #size-cells = <0>; 248 }; 249 i2c113: i2c_sfp14 { 250 reg = <0x1>; 251 #address-cells = <1>; 252 #size-cells = <0>; 253 }; 254 i2c114: i2c_sfp15 { 255 reg = <0x2>; 256 #address-cells = <1>; 257 #size-cells = <0>; 258 }; 259 i2c115: i2c_sfp16 { 260 reg = <0x3>; 261 #address-cells = <1>; 262 #size-cells = <0>; 263 }; 264 i2c116: i2c_sfp17 { 265 reg = <0x4>; 266 #address-cells = <1>; 267 #size-cells = <0>; 268 }; 269 i2c117: i2c_sfp18 { 270 reg = <0x5>; 271 #address-cells = <1>; 272 #size-cells = <0>; 273 }; 274 i2c118: i2c_sfp19 { 275 reg = <0x6>; 276 #address-cells = <1>; 277 #size-cells = <0>; 278 }; 279 i2c119: i2c_sfp20 { 280 reg = <0x7>; 281 #address-cells = <1>; 282 #size-cells = <0>; 283 }; 284}; 285