1// SPDX-License-Identifier: GPL-2.0 2/* 3 * Copyright (c) 2021-2022 BayLibre, SAS. 4 * Authors: 5 * Fabien Parent <fparent@baylibre.com> 6 * Bernhard Rosenkränzer <bero@baylibre.com> 7 */ 8 9/dts-v1/; 10 11#include <dt-bindings/gpio/gpio.h> 12#include <dt-bindings/input/input.h> 13#include <dt-bindings/pinctrl/mt8365-pinfunc.h> 14#include "mt8365.dtsi" 15 16/ { 17 model = "MediaTek MT8365 Open Platform EVK"; 18 compatible = "mediatek,mt8365-evk", "mediatek,mt8365"; 19 20 aliases { 21 serial0 = &uart0; 22 }; 23 24 chosen { 25 stdout-path = "serial0:921600n8"; 26 }; 27 28 firmware { 29 optee { 30 compatible = "linaro,optee-tz"; 31 method = "smc"; 32 }; 33 }; 34 35 gpio-keys { 36 compatible = "gpio-keys"; 37 pinctrl-names = "default"; 38 pinctrl-0 = <&gpio_keys>; 39 40 key-volume-up { 41 gpios = <&pio 24 GPIO_ACTIVE_LOW>; 42 label = "volume_up"; 43 linux,code = <KEY_VOLUMEUP>; 44 wakeup-source; 45 debounce-interval = <15>; 46 }; 47 }; 48 49 memory@40000000 { 50 device_type = "memory"; 51 reg = <0 0x40000000 0 0xc0000000>; 52 }; 53 54 usb_otg_vbus: regulator-0 { 55 compatible = "regulator-fixed"; 56 regulator-name = "otg_vbus"; 57 regulator-min-microvolt = <5000000>; 58 regulator-max-microvolt = <5000000>; 59 gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 60 enable-active-high; 61 }; 62 63 reserved-memory { 64 #address-cells = <2>; 65 #size-cells = <2>; 66 ranges; 67 68 /* 192 KiB reserved for ARM Trusted Firmware (BL31) */ 69 bl31_secmon_reserved: secmon@43000000 { 70 no-map; 71 reg = <0 0x43000000 0 0x30000>; 72 }; 73 74 /* 12 MiB reserved for OP-TEE (BL32) 75 * +-----------------------+ 0x43e0_0000 76 * | SHMEM 2MiB | 77 * +-----------------------+ 0x43c0_0000 78 * | | TA_RAM 8MiB | 79 * + TZDRAM +--------------+ 0x4340_0000 80 * | | TEE_RAM 2MiB | 81 * +-----------------------+ 0x4320_0000 82 */ 83 optee_reserved: optee@43200000 { 84 no-map; 85 reg = <0 0x43200000 0 0x00c00000>; 86 }; 87 }; 88}; 89 90&i2c0 { 91 clock-frequency = <100000>; 92 pinctrl-0 = <&i2c0_pins>; 93 pinctrl-names = "default"; 94 status = "okay"; 95}; 96 97&pio { 98 gpio_keys: gpio-keys-pins { 99 pins { 100 pinmux = <MT8365_PIN_24_KPCOL0__FUNC_KPCOL0>; 101 bias-pull-up; 102 input-enable; 103 }; 104 }; 105 106 i2c0_pins: i2c0-pins { 107 pins { 108 pinmux = <MT8365_PIN_57_SDA0__FUNC_SDA0_0>, 109 <MT8365_PIN_58_SCL0__FUNC_SCL0_0>; 110 bias-pull-up; 111 }; 112 }; 113 114 uart0_pins: uart0-pins { 115 pins { 116 pinmux = <MT8365_PIN_35_URXD0__FUNC_URXD0>, 117 <MT8365_PIN_36_UTXD0__FUNC_UTXD0>; 118 }; 119 }; 120 121 uart1_pins: uart1-pins { 122 pins { 123 pinmux = <MT8365_PIN_37_URXD1__FUNC_URXD1>, 124 <MT8365_PIN_38_UTXD1__FUNC_UTXD1>; 125 }; 126 }; 127 128 uart2_pins: uart2-pins { 129 pins { 130 pinmux = <MT8365_PIN_39_URXD2__FUNC_URXD2>, 131 <MT8365_PIN_40_UTXD2__FUNC_UTXD2>; 132 }; 133 }; 134 135 usb_pins: usb-pins { 136 id-pins { 137 pinmux = <MT8365_PIN_17_GPIO17__FUNC_GPIO17>; 138 input-enable; 139 bias-pull-up; 140 }; 141 142 usb0-vbus-pins { 143 pinmux = <MT8365_PIN_16_GPIO16__FUNC_USB_DRVVBUS>; 144 output-high; 145 }; 146 147 usb1-vbus-pins { 148 pinmux = <MT8365_PIN_18_GPIO18__FUNC_GPIO18>; 149 output-high; 150 }; 151 }; 152 153 pwm_pins: pwm-pins { 154 pins { 155 pinmux = <MT8365_PIN_19_DISP_PWM__FUNC_PWM_A>, 156 <MT8365_PIN_116_I2S_BCK__FUNC_PWM_C>; 157 }; 158 }; 159}; 160 161&pwm { 162 pinctrl-0 = <&pwm_pins>; 163 pinctrl-names = "default"; 164 status = "okay"; 165}; 166 167&uart0 { 168 pinctrl-0 = <&uart0_pins>; 169 pinctrl-names = "default"; 170 status = "okay"; 171}; 172 173&uart1 { 174 pinctrl-0 = <&uart1_pins>; 175 pinctrl-names = "default"; 176 status = "okay"; 177}; 178 179&uart2 { 180 pinctrl-0 = <&uart2_pins>; 181 pinctrl-names = "default"; 182 status = "okay"; 183}; 184