xref: /freebsd/sys/contrib/device-tree/src/arm64/mediatek/mt8173-elm.dtsi (revision 924226fba12cc9a228c73b956e1b7fa24c60b055) 
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2016 MediaTek Inc.
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/regulator/dlg,da9211-regulator.h>
9#include <dt-bindings/gpio/gpio.h>
10#include "mt8173.dtsi"
11
12/ {
13	memory@40000000 {
14		device_type = "memory";
15		reg = <0 0x40000000 0 0x80000000>;
16	};
17
18	backlight: backlight {
19		compatible = "pwm-backlight";
20		pwms = <&pwm0 0 1000000>;
21		power-supply = <&bl_fixed_reg>;
22		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
23
24		pinctrl-names = "default";
25		pinctrl-0 = <&disp_pwm0_pins>;
26		status = "okay";
27	};
28
29	bl_fixed_reg: fixedregulator2 {
30		compatible = "regulator-fixed";
31		regulator-name = "bl_fixed";
32		regulator-min-microvolt = <1800000>;
33		regulator-max-microvolt = <1800000>;
34		startup-delay-us = <1000>;
35		enable-active-high;
36		gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
37		pinctrl-names = "default";
38		pinctrl-0 = <&bl_fixed_pins>;
39	};
40
41	chosen {
42		stdout-path = "serial0:115200n8";
43	};
44
45	gpio_keys: gpio-keys {
46		compatible = "gpio-keys";
47		pinctrl-names = "default";
48		pinctrl-0 = <&gpio_keys_pins>;
49
50		lid {
51			label = "Lid";
52			gpios = <&pio 69 GPIO_ACTIVE_LOW>;
53			linux,code = <SW_LID>;
54			linux,input-type = <EV_SW>;
55			gpio-key,wakeup;
56		};
57
58		power {
59			label = "Power";
60			gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
61			linux,code = <KEY_POWER>;
62			debounce-interval = <30>;
63			gpio-key,wakeup;
64		};
65
66		tablet_mode {
67			label = "Tablet_mode";
68			gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
69			linux,code = <SW_TABLET_MODE>;
70			linux,input-type = <EV_SW>;
71			gpio-key,wakeup;
72		};
73
74		volume_down {
75			label = "Volume_down";
76			gpios = <&pio 123 GPIO_ACTIVE_LOW>;
77			linux,code = <KEY_VOLUMEDOWN>;
78		};
79
80		volume_up {
81			label = "Volume_up";
82			gpios = <&pio 124 GPIO_ACTIVE_LOW>;
83			linux,code = <KEY_VOLUMEUP>;
84		};
85	};
86
87	panel: panel {
88		compatible = "lg,lp120up1";
89		power-supply = <&panel_fixed_3v3>;
90		backlight = <&backlight>;
91
92		port {
93			panel_in: endpoint {
94				remote-endpoint = <&ps8640_out>;
95			};
96		};
97	};
98
99	panel_fixed_3v3: regulator1 {
100		compatible = "regulator-fixed";
101		regulator-name = "PANEL_3V3";
102		regulator-min-microvolt = <3300000>;
103		regulator-max-microvolt = <3300000>;
104		enable-active-high;
105		gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
106		pinctrl-names = "default";
107		pinctrl-0 = <&panel_fixed_pins>;
108	};
109
110	ps8640_fixed_1v2: regulator2 {
111		compatible = "regulator-fixed";
112		regulator-name = "PS8640_1V2";
113		regulator-min-microvolt = <1200000>;
114		regulator-max-microvolt = <1200000>;
115		regulator-enable-ramp-delay = <2000>;
116		enable-active-high;
117		regulator-boot-on;
118		gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
119		pinctrl-names = "default";
120		pinctrl-0 = <&ps8640_fixed_pins>;
121	};
122
123	sdio_fixed_3v3: fixedregulator0 {
124		compatible = "regulator-fixed";
125		regulator-name = "3V3";
126		regulator-min-microvolt = <3300000>;
127		regulator-max-microvolt = <3300000>;
128		gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
129		pinctrl-names = "default";
130		pinctrl-0 = <&sdio_fixed_3v3_pins>;
131	};
132
133	sound: sound {
134		compatible = "mediatek,mt8173-rt5650";
135		mediatek,audio-codec = <&rt5650 &hdmi0>;
136		mediatek,platform = <&afe>;
137		pinctrl-names = "default";
138		pinctrl-0 = <&aud_i2s2>;
139
140		mediatek,mclk = <1>;
141		codec-capture {
142			sound-dai = <&rt5650 1>;
143		};
144	};
145
146	hdmicon: connector {
147		compatible = "hdmi-connector";
148		label = "hdmi";
149		type = "a";
150		ddc-i2c-bus = <&hdmiddc0>;
151
152		port {
153			hdmi_connector_in: endpoint {
154				remote-endpoint = <&hdmi0_out>;
155			};
156		};
157	};
158};
159
160&cec {
161	status = "okay";
162};
163
164&cpu0 {
165	proc-supply = <&mt6397_vpca15_reg>;
166};
167
168&cpu1 {
169	proc-supply = <&mt6397_vpca15_reg>;
170};
171
172&cpu2 {
173	proc-supply = <&da9211_vcpu_reg>;
174	sram-supply = <&mt6397_vsramca7_reg>;
175};
176
177&cpu3 {
178	proc-supply = <&da9211_vcpu_reg>;
179	sram-supply = <&mt6397_vsramca7_reg>;
180};
181
182&cpu_thermal {
183	sustainable-power = <4500>; /* milliwatts */
184	trips {
185		threshold: trip-point0 {
186			temperature = <60000>;
187		};
188
189		target: trip-point1 {
190			temperature = <65000>;
191		};
192	};
193};
194
195&dsi0 {
196	status = "okay";
197	ports {
198		port {
199			dsi0_out: endpoint {
200				remote-endpoint = <&ps8640_in>;
201			};
202		};
203	};
204};
205
206&dpi0 {
207	status = "okay";
208};
209
210&hdmi0 {
211	status = "okay";
212	ports {
213		port@1 {
214			reg = <1>;
215
216			hdmi0_out: endpoint {
217				remote-endpoint = <&hdmi_connector_in>;
218			};
219		};
220	};
221};
222
223&hdmi_phy {
224	status = "okay";
225	mediatek,ibias = <0xc>;
226};
227
228&i2c0 {
229	status = "okay";
230
231	rt5650: audio-codec@1a {
232		compatible = "realtek,rt5650";
233		reg = <0x1a>;
234		avdd-supply = <&mt6397_vgp1_reg>;
235		cpvdd-supply = <&mt6397_vcama_reg>;
236		interrupt-parent = <&pio>;
237		interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
238		pinctrl-names = "default";
239		pinctrl-0 = <&rt5650_irq>;
240		#sound-dai-cells = <1>;
241		realtek,dmic1-data-pin = <2>;
242		realtek,jd-mode = <2>;
243	};
244
245	ps8640: edp-bridge@8 {
246		compatible = "parade,ps8640";
247		reg = <0x8>;
248		powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
249		reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
250		pinctrl-names = "default";
251		pinctrl-0 = <&ps8640_pins>;
252		vdd12-supply = <&ps8640_fixed_1v2>;
253		vdd33-supply = <&mt6397_vgp2_reg>;
254
255		ports {
256			#address-cells = <1>;
257			#size-cells = <0>;
258
259			port@0 {
260				reg = <0>;
261
262				ps8640_in: endpoint {
263					remote-endpoint = <&dsi0_out>;
264				};
265			};
266
267			port@1 {
268				reg = <1>;
269
270				ps8640_out: endpoint {
271					remote-endpoint = <&panel_in>;
272				};
273			};
274		};
275	};
276};
277
278&i2c1 {
279	clock-frequency = <1500000>;
280	status = "okay";
281
282	da9211: da9211@68 {
283		compatible = "dlg,da9211";
284		reg = <0x68>;
285		interrupt-parent = <&pio>;
286		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
287
288		regulators {
289			da9211_vcpu_reg: BUCKA {
290				regulator-name = "VBUCKA";
291				regulator-min-microvolt = < 700000>;
292				regulator-max-microvolt = <1310000>;
293				regulator-min-microamp  = <2000000>;
294				regulator-max-microamp  = <4400000>;
295				regulator-ramp-delay = <10000>;
296				regulator-always-on;
297				regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
298							   DA9211_BUCK_MODE_AUTO>;
299			};
300
301			da9211_vgpu_reg: BUCKB {
302				regulator-name = "VBUCKB";
303				regulator-min-microvolt = < 700000>;
304				regulator-max-microvolt = <1310000>;
305				regulator-min-microamp  = <2000000>;
306				regulator-max-microamp  = <3000000>;
307				regulator-ramp-delay = <10000>;
308			};
309		};
310	};
311};
312
313&i2c2 {
314	status = "okay";
315
316	tpm: tpm@20 {
317		compatible = "infineon,slb9645tt";
318		reg = <0x20>;
319		powered-while-suspended;
320	};
321};
322
323&i2c3 {
324	clock-frequency = <400000>;
325	status = "okay";
326
327	touchscreen: touchscreen@10 {
328		compatible = "elan,ekth3500";
329		reg = <0x10>;
330		interrupt-parent = <&pio>;
331		interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
332	};
333};
334
335&i2c4 {
336	clock-frequency = <400000>;
337	status = "okay";
338	pinctrl-names = "default";
339	pinctrl-0 = <&trackpad_irq>;
340
341	trackpad: trackpad@15 {
342		compatible = "elan,ekth3000";
343		interrupt-parent = <&pio>;
344		interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
345		reg = <0x15>;
346		vcc-supply = <&mt6397_vgp6_reg>;
347		wakeup-source;
348	};
349};
350
351&mipi_tx0 {
352	status = "okay";
353};
354
355&mmc0 {
356	status = "okay";
357	pinctrl-names = "default", "state_uhs";
358	pinctrl-0 = <&mmc0_pins_default>;
359	pinctrl-1 = <&mmc0_pins_uhs>;
360	bus-width = <8>;
361	max-frequency = <200000000>;
362	cap-mmc-highspeed;
363	mmc-hs200-1_8v;
364	mmc-hs400-1_8v;
365	cap-mmc-hw-reset;
366	hs400-ds-delay = <0x14015>;
367	mediatek,hs200-cmd-int-delay=<30>;
368	mediatek,hs400-cmd-int-delay=<14>;
369	mediatek,hs400-cmd-resp-sel-rising;
370	vmmc-supply = <&mt6397_vemc_3v3_reg>;
371	vqmmc-supply = <&mt6397_vio18_reg>;
372	assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
373	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
374	non-removable;
375};
376
377&mmc1 {
378	status = "okay";
379	pinctrl-names = "default", "state_uhs";
380	pinctrl-0 = <&mmc1_pins_default>;
381	pinctrl-1 = <&mmc1_pins_uhs>;
382	bus-width = <4>;
383	max-frequency = <200000000>;
384	cap-sd-highspeed;
385	sd-uhs-sdr50;
386	sd-uhs-sdr104;
387	cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
388	vmmc-supply = <&mt6397_vmch_reg>;
389	vqmmc-supply = <&mt6397_vmc_reg>;
390};
391
392&mmc3 {
393	status = "okay";
394	pinctrl-names = "default", "state_uhs";
395	pinctrl-0 = <&mmc3_pins_default>;
396	pinctrl-1 = <&mmc3_pins_uhs>;
397	bus-width = <4>;
398	max-frequency = <200000000>;
399	cap-sd-highspeed;
400	sd-uhs-sdr50;
401	sd-uhs-sdr104;
402	keep-power-in-suspend;
403	enable-sdio-wakeup;
404	cap-sdio-irq;
405	vmmc-supply = <&sdio_fixed_3v3>;
406	vqmmc-supply = <&mt6397_vgp3_reg>;
407	non-removable;
408	cap-power-off-card;
409
410	#address-cells = <1>;
411	#size-cells = <0>;
412
413	btmrvl: btmrvl@2 {
414		compatible = "marvell,sd8897-bt";
415		reg = <2>;
416		interrupt-parent = <&pio>;
417		interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
418		marvell,wakeup-pin = /bits/ 16 <0x0d>;
419		marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
420	};
421
422	mwifiex: mwifiex@1 {
423		compatible = "marvell,sd8897";
424		reg = <1>;
425		interrupt-parent = <&pio>;
426		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
427		marvell,wakeup-pin = <3>;
428	};
429};
430
431&nor_flash {
432	status = "okay";
433	pinctrl-names = "default";
434	pinctrl-0 = <&nor_gpio1_pins>;
435
436	flash@0 {
437		compatible = "jedec,spi-nor";
438		reg = <0>;
439		spi-max-frequency = <50000000>;
440	};
441};
442
443&pio {
444	gpio-line-names = "EC_INT_1V8",
445			  "SD_CD_L",
446			  "ALC5514_IRQ",
447			  "ALC5650_IRQ",
448			  /*
449			   * AP_FLASH_WP_L is crossystem ABI. Schematics
450			   * call it SFWP_B.
451			   */
452			  "AP_FLASH_WP_L",
453			  "SFIN",
454			  "SFCS0",
455			  "SFHOLD",
456			  "SFOUT",
457			  "SFCK",
458			  "WRAP_EVENT_S_EINT10",
459			  "PMU_INT",
460			  "I2S2_WS_ALC5650",
461			  "I2S2_BCK_ALC5650",
462			  "PWR_BTN_1V8",
463			  "DA9212_IRQ",
464			  "IDDIG",
465			  "WATCHDOG",
466			  "CEC",
467			  "HDMISCK",
468			  "HDMISD",
469			  "HTPLG",
470			  "MSDC3_DAT0",
471			  "MSDC3_DAT1",
472			  "MSDC3_DAT2",
473			  "MSDC3_DAT3",
474			  "MSDC3_CLK",
475			  "MSDC3_CMD",
476			  "USB_C0_OC_FLAGB",
477			  "USBA_OC1_L",
478			  "PS8640_1V2_ENABLE",
479			  "THERM_ALERT_N",
480			  "PANEL_LCD_POWER_EN",
481			  "ANX7688_CHIP_PD_C",
482			  "EC_IN_RW_1V8",
483			  "ANX7688_1V_EN_C",
484			  "USB_DP_HPD_C",
485			  "TPM_DAVINT_N",
486			  "MARVELL8897_IRQ",
487			  "EN_USB_A0_PWR",
488			  "USBA_A0_OC_L",
489			  "EN_PP3300_DX_EDP",
490			  "",
491			  "SOC_I2C2_1V8_SDA_400K",
492			  "SOC_I2C2_1V8_SCL_400K",
493			  "SOC_I2C0_1V8_SDA_400K",
494			  "SOC_I2C0_1V8_SCL_400K",
495			  "EMMC_ID1",
496			  "EMMC_ID0",
497			  "MEM_CONFIG3",
498			  "EMMC_ID2",
499			  "MEM_CONFIG1",
500			  "MEM_CONFIG2",
501			  "BRD_ID2",
502			  "MEM_CONFIG0",
503			  "BRD_ID0",
504			  "BRD_ID1",
505			  "EMMC_DAT0",
506			  "EMMC_DAT1",
507			  "EMMC_DAT2",
508			  "EMMC_DAT3",
509			  "EMMC_DAT4",
510			  "EMMC_DAT5",
511			  "EMMC_DAT6",
512			  "EMMC_DAT7",
513			  "EMMC_CLK",
514			  "EMMC_CMD",
515			  "EMMC_RCLK",
516			  "PLT_RST_L",
517			  "LID_OPEN_1V8_L",
518			  "AUDIO_SPI_MISO_R",
519			  "",
520			  "AC_OK_1V8",
521			  "SD_DATA0",
522			  "SD_DATA1",
523			  "SD_DATA2",
524			  "SD_DATA3",
525			  "SD_CLK",
526			  "SD_CMD",
527			  "PWRAP_SPI0_MI",
528			  "PWRAP_SPI0_MO",
529			  "PWRAP_SPI0_CK",
530			  "PWRAP_SPI0_CSN",
531			  "",
532			  "",
533			  "WIFI_PDN",
534			  "RTC32K_1V8",
535			  "DISP_PWM0",
536			  "TOUCHSCREEN_INT_L",
537			  "",
538			  "SRCLKENA0",
539			  "SRCLKENA1",
540			  "PS8640_MODE_CONF",
541			  "TOUCHSCREEN_RESET_R",
542			  "PLATFORM_PROCHOT_L",
543			  "PANEL_POWER_EN",
544			  "REC_MODE_L",
545			  "EC_FW_UPDATE_L",
546			  "ACCEL2_INT_L",
547			  "HDMI_DP_INT",
548			  "ACCELGYRO3_INT_L",
549			  "ACCELGYRO4_INT_L",
550			  "SPI_EC_CLK",
551			  "SPI_EC_MI",
552			  "SPI_EC_MO",
553			  "SPI_EC_CSN",
554			  "SOC_I2C3_1V8_SDA_400K",
555			  "SOC_I2C3_1V8_SCL_400K",
556			  "",
557			  "",
558			  "",
559			  "",
560			  "",
561			  "",
562			  "",
563			  "PS8640_SYSRSTN_1V8",
564			  "APIN_MAX98090_DOUT2",
565			  "TP_INT_1V8_L_R",
566			  "RST_USB_HUB_R",
567			  "BT_WAKE_L",
568			  "ACCEL1_INT_L",
569			  "TABLET_MODE_L",
570			  "",
571			  "V_UP_IN_L_R",
572			  "V_DOWN_IN_L_R",
573			  "SOC_I2C1_1V8_SDA_1M",
574			  "SOC_I2C1_1V8_SCL_1M",
575			  "PS8640_PDN_1V8",
576			  "MAX98090_LRCLK",
577			  "MAX98090_BCLK",
578			  "MAX98090_MCLK",
579			  "APOUT_MAX98090_DIN",
580			  "APIN_MAX98090_DOUT",
581			  "SOC_I2C4_1V8_SDA_400K",
582			  "SOC_I2C4_1V8_SCL_400K";
583
584	aud_i2s2: aud_i2s2 {
585		pins1 {
586			pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
587				 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
588				 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
589				 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
590				 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
591				 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
592				 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
593			bias-pull-down;
594		};
595	};
596
597	bl_fixed_pins: bl_fixed_pins {
598		pins1 {
599			pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
600			output-low;
601		};
602	};
603
604	bt_wake_pins: bt_wake_pins {
605		pins1 {
606			pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
607			bias-pull-up;
608		};
609	};
610
611	disp_pwm0_pins: disp_pwm0_pins {
612		pins1 {
613			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
614			output-low;
615		};
616	};
617
618	gpio_keys_pins: gpio_keys_pins {
619		volume_pins {
620			pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
621				 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
622			bias-pull-up;
623		};
624
625		tablet_mode_pins {
626			pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
627			bias-pull-up;
628		};
629	};
630
631	hdmi_mux_pins: hdmi_mux_pins {
632		pins1 {
633			pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
634		};
635	};
636
637	i2c1_pins_a: i2c1 {
638		da9211_pins {
639			pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
640			bias-pull-up;
641		};
642	};
643
644	mmc0_pins_default: mmc0default {
645		pins_cmd_dat {
646			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
647				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
648				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
649				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
650				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
651				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
652				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
653				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
654				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
655			bias-pull-up;
656		};
657
658		pins_clk {
659			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
660			bias-pull-down;
661		};
662
663		pins_rst {
664			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
665			bias-pull-up;
666		};
667	};
668
669	mmc1_pins_default: mmc1default {
670		pins_cmd_dat {
671			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
672				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
673				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
674				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
675				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
676			input-enable;
677			drive-strength = <MTK_DRIVE_4mA>;
678			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
679		};
680
681		pins_clk {
682			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
683			bias-pull-down;
684			drive-strength = <MTK_DRIVE_4mA>;
685		};
686
687		pins_insert {
688			pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
689			bias-pull-up;
690		};
691	};
692
693	mmc3_pins_default: mmc3default {
694		pins_dat {
695			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
696				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
697				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
698				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
699			input-enable;
700			drive-strength = <MTK_DRIVE_8mA>;
701			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
702		};
703
704		pins_cmd {
705			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
706			input-enable;
707			drive-strength = <MTK_DRIVE_8mA>;
708			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
709		};
710
711		pins_clk {
712			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
713			bias-pull-down;
714			drive-strength = <MTK_DRIVE_8mA>;
715		};
716	};
717
718	mmc0_pins_uhs: mmc0 {
719		pins_cmd_dat {
720			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
721				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
722				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
723				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
724				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
725				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
726				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
727				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
728				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
729			input-enable;
730			drive-strength = <MTK_DRIVE_6mA>;
731			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
732		};
733
734		pins_clk {
735			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
736			drive-strength = <MTK_DRIVE_6mA>;
737			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
738		};
739
740		pins_ds {
741			pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
742			drive-strength = <MTK_DRIVE_10mA>;
743			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
744		};
745
746		pins_rst {
747			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
748			bias-pull-up;
749		};
750	};
751
752	mmc1_pins_uhs: mmc1 {
753		pins_cmd_dat {
754			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
755				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
756				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
757				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
758				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
759			input-enable;
760			drive-strength = <MTK_DRIVE_6mA>;
761			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
762		};
763
764		pins_clk {
765			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
766			drive-strength = <MTK_DRIVE_8mA>;
767			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
768		};
769	};
770
771	mmc3_pins_uhs: mmc3 {
772		pins_dat {
773			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
774				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
775				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
776				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
777			input-enable;
778			drive-strength = <MTK_DRIVE_8mA>;
779			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
780		};
781
782		pins_cmd {
783			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
784			input-enable;
785			drive-strength = <MTK_DRIVE_8mA>;
786			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
787		};
788
789		pins_clk {
790			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
791			drive-strength = <MTK_DRIVE_8mA>;
792			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
793		};
794	};
795
796	nor_gpio1_pins: nor {
797		pins1 {
798			pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
799				 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
800				 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
801			input-enable;
802			drive-strength = <MTK_DRIVE_4mA>;
803			bias-pull-up;
804		};
805
806		pins2 {
807			pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
808			drive-strength = <MTK_DRIVE_4mA>;
809			bias-pull-up;
810		};
811
812		pins_clk {
813			pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
814			input-enable;
815			drive-strength = <MTK_DRIVE_4mA>;
816			bias-pull-up;
817		};
818	};
819
820	panel_fixed_pins: panel_fixed_pins {
821		pins1 {
822			pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
823		};
824	};
825
826	ps8640_pins: ps8640_pins {
827		pins1 {
828			pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
829				 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
830				 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
831		};
832	};
833
834	ps8640_fixed_pins: ps8640_fixed_pins {
835		pins1 {
836			pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
837		};
838	};
839
840	rt5650_irq: rt5650_irq {
841		pins1 {
842			pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
843			bias-pull-down;
844		};
845	};
846
847	sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
848		pins1 {
849			pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
850			output-low;
851		};
852	};
853
854	spi_pins_a: spi1 {
855		pins1 {
856			pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
857			bias-pull-up;
858		};
859
860		pins_spi {
861			pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
862				 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
863				 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
864				 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
865			bias-disable;
866		};
867	};
868
869	trackpad_irq: trackpad_irq {
870		pins1 {
871			pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
872			input-enable;
873			bias-pull-up;
874		};
875	};
876
877	usb_pins: usb {
878		pins1 {
879			pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
880			output-high;
881			bias-disable;
882		};
883	};
884
885	wifi_wake_pins: wifi_wake_pins {
886		pins1 {
887			pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
888			bias-pull-up;
889		};
890	};
891};
892
893&pwm0 {
894	status = "okay";
895};
896
897&pwrap {
898	pmic: mt6397 {
899		compatible = "mediatek,mt6397";
900		#address-cells = <1>;
901		#size-cells = <1>;
902		interrupt-parent = <&pio>;
903		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
904		interrupt-controller;
905		#interrupt-cells = <2>;
906
907		clock: mt6397clock {
908			compatible = "mediatek,mt6397-clk";
909			#clock-cells = <1>;
910		};
911
912		pio6397: pinctrl {
913			compatible = "mediatek,mt6397-pinctrl";
914			pins-are-numbered;
915			gpio-controller;
916			#gpio-cells = <2>;
917		};
918
919		regulator: mt6397regulator {
920			compatible = "mediatek,mt6397-regulator";
921
922			mt6397_vpca15_reg: buck_vpca15 {
923				regulator-compatible = "buck_vpca15";
924				regulator-name = "vpca15";
925				regulator-min-microvolt = < 700000>;
926				regulator-max-microvolt = <1350000>;
927				regulator-ramp-delay = <12500>;
928				regulator-always-on;
929				regulator-allowed-modes = <0 1>;
930			};
931
932			mt6397_vpca7_reg: buck_vpca7 {
933				regulator-compatible = "buck_vpca7";
934				regulator-name = "vpca7";
935				regulator-min-microvolt = < 700000>;
936				regulator-max-microvolt = <1350000>;
937				regulator-ramp-delay = <12500>;
938				regulator-enable-ramp-delay = <115>;
939				regulator-always-on;
940			};
941
942			mt6397_vsramca15_reg: buck_vsramca15 {
943				regulator-compatible = "buck_vsramca15";
944				regulator-name = "vsramca15";
945				regulator-min-microvolt = < 700000>;
946				regulator-max-microvolt = <1350000>;
947				regulator-ramp-delay = <12500>;
948				regulator-always-on;
949			};
950
951			mt6397_vsramca7_reg: buck_vsramca7 {
952				regulator-compatible = "buck_vsramca7";
953				regulator-name = "vsramca7";
954				regulator-min-microvolt = < 700000>;
955				regulator-max-microvolt = <1350000>;
956				regulator-ramp-delay = <12500>;
957				regulator-always-on;
958			};
959
960			mt6397_vcore_reg: buck_vcore {
961				regulator-compatible = "buck_vcore";
962				regulator-name = "vcore";
963				regulator-min-microvolt = < 700000>;
964				regulator-max-microvolt = <1350000>;
965				regulator-ramp-delay = <12500>;
966				regulator-always-on;
967			};
968
969			mt6397_vgpu_reg: buck_vgpu {
970				regulator-compatible = "buck_vgpu";
971				regulator-name = "vgpu";
972				regulator-min-microvolt = < 700000>;
973				regulator-max-microvolt = <1350000>;
974				regulator-ramp-delay = <12500>;
975				regulator-enable-ramp-delay = <115>;
976			};
977
978			mt6397_vdrm_reg: buck_vdrm {
979				regulator-compatible = "buck_vdrm";
980				regulator-name = "vdrm";
981				regulator-min-microvolt = <1200000>;
982				regulator-max-microvolt = <1400000>;
983				regulator-ramp-delay = <12500>;
984				regulator-always-on;
985			};
986
987			mt6397_vio18_reg: buck_vio18 {
988				regulator-compatible = "buck_vio18";
989				regulator-name = "vio18";
990				regulator-min-microvolt = <1620000>;
991				regulator-max-microvolt = <1980000>;
992				regulator-ramp-delay = <12500>;
993				regulator-always-on;
994			};
995
996			mt6397_vtcxo_reg: ldo_vtcxo {
997				regulator-compatible = "ldo_vtcxo";
998				regulator-name = "vtcxo";
999				regulator-always-on;
1000			};
1001
1002			mt6397_va28_reg: ldo_va28 {
1003				regulator-compatible = "ldo_va28";
1004				regulator-name = "va28";
1005			};
1006
1007			mt6397_vcama_reg: ldo_vcama {
1008				regulator-compatible = "ldo_vcama";
1009				regulator-name = "vcama";
1010				regulator-min-microvolt = <1800000>;
1011				regulator-max-microvolt = <1800000>;
1012				regulator-enable-ramp-delay = <218>;
1013			};
1014
1015			mt6397_vio28_reg: ldo_vio28 {
1016				regulator-compatible = "ldo_vio28";
1017				regulator-name = "vio28";
1018				regulator-always-on;
1019			};
1020
1021			mt6397_vusb_reg: ldo_vusb {
1022				regulator-compatible = "ldo_vusb";
1023				regulator-name = "vusb";
1024			};
1025
1026			mt6397_vmc_reg: ldo_vmc {
1027				regulator-compatible = "ldo_vmc";
1028				regulator-name = "vmc";
1029				regulator-min-microvolt = <1800000>;
1030				regulator-max-microvolt = <3300000>;
1031				regulator-enable-ramp-delay = <218>;
1032			};
1033
1034			mt6397_vmch_reg: ldo_vmch {
1035				regulator-compatible = "ldo_vmch";
1036				regulator-name = "vmch";
1037				regulator-min-microvolt = <3000000>;
1038				regulator-max-microvolt = <3300000>;
1039				regulator-enable-ramp-delay = <218>;
1040			};
1041
1042			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1043				regulator-compatible = "ldo_vemc3v3";
1044				regulator-name = "vemc_3v3";
1045				regulator-min-microvolt = <3000000>;
1046				regulator-max-microvolt = <3300000>;
1047				regulator-enable-ramp-delay = <218>;
1048			};
1049
1050			mt6397_vgp1_reg: ldo_vgp1 {
1051				regulator-compatible = "ldo_vgp1";
1052				regulator-name = "vcamd";
1053				regulator-min-microvolt = <1800000>;
1054				regulator-max-microvolt = <1800000>;
1055				regulator-enable-ramp-delay = <240>;
1056			};
1057
1058			mt6397_vgp2_reg: ldo_vgp2 {
1059				regulator-compatible = "ldo_vgp2";
1060				regulator-name = "vcamio";
1061				regulator-min-microvolt = <3300000>;
1062				regulator-max-microvolt = <3300000>;
1063				regulator-enable-ramp-delay = <218>;
1064			};
1065
1066			mt6397_vgp3_reg: ldo_vgp3 {
1067				regulator-compatible = "ldo_vgp3";
1068				regulator-name = "vcamaf";
1069				regulator-min-microvolt = <1800000>;
1070				regulator-max-microvolt = <1800000>;
1071				regulator-enable-ramp-delay = <218>;
1072			};
1073
1074			mt6397_vgp4_reg: ldo_vgp4 {
1075				regulator-compatible = "ldo_vgp4";
1076				regulator-name = "vgp4";
1077				regulator-min-microvolt = <1200000>;
1078				regulator-max-microvolt = <3300000>;
1079				regulator-enable-ramp-delay = <218>;
1080			};
1081
1082			mt6397_vgp5_reg: ldo_vgp5 {
1083				regulator-compatible = "ldo_vgp5";
1084				regulator-name = "vgp5";
1085				regulator-min-microvolt = <1200000>;
1086				regulator-max-microvolt = <3000000>;
1087				regulator-enable-ramp-delay = <218>;
1088			};
1089
1090			mt6397_vgp6_reg: ldo_vgp6 {
1091				regulator-compatible = "ldo_vgp6";
1092				regulator-name = "vgp6";
1093				regulator-min-microvolt = <3300000>;
1094				regulator-max-microvolt = <3300000>;
1095				regulator-enable-ramp-delay = <218>;
1096				regulator-always-on;
1097			};
1098
1099			mt6397_vibr_reg: ldo_vibr {
1100				regulator-compatible = "ldo_vibr";
1101				regulator-name = "vibr";
1102				regulator-min-microvolt = <1300000>;
1103				regulator-max-microvolt = <3300000>;
1104				regulator-enable-ramp-delay = <218>;
1105			};
1106		};
1107
1108		rtc: mt6397rtc {
1109			compatible = "mediatek,mt6397-rtc";
1110		};
1111
1112		syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1113			compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1114				     "syscon";
1115			reg = <0 0x0000c000 0 0x0108>;
1116		};
1117	};
1118};
1119
1120&spi {
1121	pinctrl-names = "default";
1122	pinctrl-0 = <&spi_pins_a>;
1123	mediatek,pad-select = <1>;
1124	status = "okay";
1125	/* clients */
1126	cros_ec: ec@0 {
1127		compatible = "google,cros-ec-spi";
1128		reg = <0x0>;
1129		spi-max-frequency = <12000000>;
1130		interrupt-parent = <&pio>;
1131		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1132		google,cros-ec-spi-msg-delay = <500>;
1133
1134		i2c_tunnel: i2c-tunnel0 {
1135			compatible = "google,cros-ec-i2c-tunnel";
1136			google,remote-bus = <0>;
1137			#address-cells = <1>;
1138			#size-cells = <0>;
1139
1140			battery: sbs-battery@b {
1141				compatible = "sbs,sbs-battery";
1142				reg = <0xb>;
1143				sbs,i2c-retry-count = <2>;
1144				sbs,poll-retry-count = <1>;
1145			};
1146		};
1147	};
1148};
1149
1150&ssusb {
1151	dr_mode = "host";
1152	wakeup-source;
1153	vusb33-supply = <&mt6397_vusb_reg>;
1154	status = "okay";
1155};
1156
1157&thermal {
1158	bank0-supply = <&mt6397_vpca15_reg>;
1159	bank1-supply = <&da9211_vcpu_reg>;
1160};
1161
1162&uart0 {
1163	status = "okay";
1164};
1165
1166&usb_host {
1167	pinctrl-names = "default";
1168	pinctrl-0 = <&usb_pins>;
1169	vusb33-supply = <&mt6397_vusb_reg>;
1170	status = "okay";
1171};
1172
1173#include <arm/cros-ec-keyboard.dtsi>
1174