xref: /freebsd/sys/contrib/device-tree/src/arm64/mediatek/mt8173-elm.dtsi (revision 410556f1f10fd35b350102725fd8504c3cb0afc8) 
1// SPDX-License-Identifier: GPL-2.0-only
2/*
3 * Copyright 2016 MediaTek Inc.
4 */
5
6#include <dt-bindings/input/input.h>
7#include <dt-bindings/input/linux-event-codes.h>
8#include <dt-bindings/regulator/dlg,da9211-regulator.h>
9#include <dt-bindings/gpio/gpio.h>
10#include "mt8173.dtsi"
11
12/ {
13	memory@40000000 {
14		device_type = "memory";
15		reg = <0 0x40000000 0 0x80000000>;
16	};
17
18	backlight: backlight {
19		compatible = "pwm-backlight";
20		pwms = <&pwm0 0 1000000>;
21		power-supply = <&bl_fixed_reg>;
22		enable-gpios = <&pio 95 GPIO_ACTIVE_HIGH>;
23
24		pinctrl-names = "default";
25		pinctrl-0 = <&disp_pwm0_pins>;
26		status = "okay";
27	};
28
29	bl_fixed_reg: fixedregulator2 {
30		compatible = "regulator-fixed";
31		regulator-name = "bl_fixed";
32		regulator-min-microvolt = <1800000>;
33		regulator-max-microvolt = <1800000>;
34		startup-delay-us = <1000>;
35		enable-active-high;
36		gpio = <&pio 32 GPIO_ACTIVE_HIGH>;
37		pinctrl-names = "default";
38		pinctrl-0 = <&bl_fixed_pins>;
39	};
40
41	chosen {
42		stdout-path = "serial0:115200n8";
43	};
44
45	gpio_keys: gpio-keys {
46		compatible = "gpio-keys";
47		pinctrl-names = "default";
48		pinctrl-0 = <&gpio_keys_pins>;
49
50		lid {
51			label = "Lid";
52			gpios = <&pio 69 GPIO_ACTIVE_LOW>;
53			linux,code = <SW_LID>;
54			linux,input-type = <EV_SW>;
55			gpio-key,wakeup;
56		};
57
58		power {
59			label = "Power";
60			gpios = <&pio 14 GPIO_ACTIVE_HIGH>;
61			linux,code = <KEY_POWER>;
62			debounce-interval = <30>;
63			gpio-key,wakeup;
64		};
65
66		tablet_mode {
67			label = "Tablet_mode";
68			gpios = <&pio 121 GPIO_ACTIVE_HIGH>;
69			linux,code = <SW_TABLET_MODE>;
70			linux,input-type = <EV_SW>;
71			gpio-key,wakeup;
72		};
73
74		volume_down {
75			label = "Volume_down";
76			gpios = <&pio 123 GPIO_ACTIVE_LOW>;
77			linux,code = <KEY_VOLUMEDOWN>;
78		};
79
80		volume_up {
81			label = "Volume_up";
82			gpios = <&pio 124 GPIO_ACTIVE_LOW>;
83			linux,code = <KEY_VOLUMEUP>;
84		};
85	};
86
87	panel: panel {
88		compatible = "lg,lp120up1";
89		power-supply = <&panel_fixed_3v3>;
90		ddc-i2c-bus = <&i2c0>;
91		backlight = <&backlight>;
92
93		port {
94			panel_in: endpoint {
95				remote-endpoint = <&ps8640_out>;
96			};
97		};
98	};
99
100	panel_fixed_3v3: regulator1 {
101		compatible = "regulator-fixed";
102		regulator-name = "PANEL_3V3";
103		regulator-min-microvolt = <3300000>;
104		regulator-max-microvolt = <3300000>;
105		enable-active-high;
106		gpio = <&pio 41 GPIO_ACTIVE_HIGH>;
107		pinctrl-names = "default";
108		pinctrl-0 = <&panel_fixed_pins>;
109	};
110
111	ps8640_fixed_1v2: regulator2 {
112		compatible = "regulator-fixed";
113		regulator-name = "PS8640_1V2";
114		regulator-min-microvolt = <1200000>;
115		regulator-max-microvolt = <1200000>;
116		regulator-enable-ramp-delay = <2000>;
117		enable-active-high;
118		regulator-boot-on;
119		gpio = <&pio 30 GPIO_ACTIVE_HIGH>;
120		pinctrl-names = "default";
121		pinctrl-0 = <&ps8640_fixed_pins>;
122	};
123
124	sdio_fixed_3v3: fixedregulator0 {
125		compatible = "regulator-fixed";
126		regulator-name = "3V3";
127		regulator-min-microvolt = <3300000>;
128		regulator-max-microvolt = <3300000>;
129		gpio = <&pio 85 GPIO_ACTIVE_HIGH>;
130		pinctrl-names = "default";
131		pinctrl-0 = <&sdio_fixed_3v3_pins>;
132	};
133
134	sound: sound {
135		compatible = "mediatek,mt8173-rt5650";
136		mediatek,audio-codec = <&rt5650 &hdmi0>;
137		mediatek,platform = <&afe>;
138		pinctrl-names = "default";
139		pinctrl-0 = <&aud_i2s2>;
140
141		mediatek,mclk = <1>;
142		codec-capture {
143			sound-dai = <&rt5650 1>;
144		};
145	};
146
147	hdmicon: connector {
148		compatible = "hdmi-connector";
149		label = "hdmi";
150		type = "a";
151		ddc-i2c-bus = <&hdmiddc0>;
152
153		port {
154			hdmi_connector_in: endpoint {
155				remote-endpoint = <&hdmi0_out>;
156			};
157		};
158	};
159};
160
161&cec {
162	status = "okay";
163};
164
165&cpu0 {
166	proc-supply = <&mt6397_vpca15_reg>;
167};
168
169&cpu1 {
170	proc-supply = <&mt6397_vpca15_reg>;
171};
172
173&cpu2 {
174	proc-supply = <&da9211_vcpu_reg>;
175	sram-supply = <&mt6397_vsramca7_reg>;
176};
177
178&cpu3 {
179	proc-supply = <&da9211_vcpu_reg>;
180	sram-supply = <&mt6397_vsramca7_reg>;
181};
182
183&cpu_thermal {
184	sustainable-power = <4500>; /* milliwatts */
185	trips {
186		threshold: trip-point0 {
187			temperature = <60000>;
188		};
189
190		target: trip-point1 {
191			temperature = <65000>;
192		};
193	};
194};
195
196&dsi0 {
197	status = "okay";
198	ports {
199		port {
200			dsi0_out: endpoint {
201				remote-endpoint = <&ps8640_in>;
202			};
203		};
204	};
205};
206
207&dpi0 {
208	status = "okay";
209};
210
211&hdmi0 {
212	status = "okay";
213	ports {
214		port@1 {
215			reg = <1>;
216
217			hdmi0_out: endpoint {
218				remote-endpoint = <&hdmi_connector_in>;
219			};
220		};
221	};
222};
223
224&hdmi_phy {
225	status = "okay";
226	mediatek,ibias = <0xc>;
227};
228
229&i2c0 {
230	status = "okay";
231
232	rt5650: audio-codec@1a {
233		compatible = "realtek,rt5650";
234		reg = <0x1a>;
235		avdd-supply = <&mt6397_vgp1_reg>;
236		cpvdd-supply = <&mt6397_vcama_reg>;
237		interrupt-parent = <&pio>;
238		interrupts = <3 IRQ_TYPE_EDGE_BOTH>;
239		pinctrl-names = "default";
240		pinctrl-0 = <&rt5650_irq>;
241		#sound-dai-cells = <1>;
242		realtek,dmic1-data-pin = <2>;
243		realtek,jd-mode = <2>;
244	};
245
246	ps8640: edp-bridge@8 {
247		compatible = "parade,ps8640";
248		reg = <0x8>;
249		powerdown-gpios = <&pio 127 GPIO_ACTIVE_LOW>;
250		reset-gpios = <&pio 115 GPIO_ACTIVE_LOW>;
251		pinctrl-names = "default";
252		pinctrl-0 = <&ps8640_pins>;
253		vdd12-supply = <&ps8640_fixed_1v2>;
254		vdd33-supply = <&mt6397_vgp2_reg>;
255
256		ports {
257			#address-cells = <1>;
258			#size-cells = <0>;
259
260			port@0 {
261				reg = <0>;
262
263				ps8640_in: endpoint {
264					remote-endpoint = <&dsi0_out>;
265				};
266			};
267
268			port@1 {
269				reg = <1>;
270
271				ps8640_out: endpoint {
272					remote-endpoint = <&panel_in>;
273				};
274			};
275		};
276	};
277};
278
279&i2c1 {
280	clock-frequency = <1500000>;
281	status = "okay";
282
283	da9211: da9211@68 {
284		compatible = "dlg,da9211";
285		reg = <0x68>;
286		interrupt-parent = <&pio>;
287		interrupts = <15 IRQ_TYPE_LEVEL_LOW>;
288
289		regulators {
290			da9211_vcpu_reg: BUCKA {
291				regulator-name = "VBUCKA";
292				regulator-min-microvolt = < 700000>;
293				regulator-max-microvolt = <1310000>;
294				regulator-min-microamp  = <2000000>;
295				regulator-max-microamp  = <4400000>;
296				regulator-ramp-delay = <10000>;
297				regulator-always-on;
298				regulator-allowed-modes = <DA9211_BUCK_MODE_SYNC
299							   DA9211_BUCK_MODE_AUTO>;
300			};
301
302			da9211_vgpu_reg: BUCKB {
303				regulator-name = "VBUCKB";
304				regulator-min-microvolt = < 700000>;
305				regulator-max-microvolt = <1310000>;
306				regulator-min-microamp  = <2000000>;
307				regulator-max-microamp  = <3000000>;
308				regulator-ramp-delay = <10000>;
309			};
310		};
311	};
312};
313
314&i2c2 {
315	status = "okay";
316
317	tpm: tpm@20 {
318		compatible = "infineon,slb9645tt";
319		reg = <0x20>;
320		powered-while-suspended;
321	};
322};
323
324&i2c3 {
325	clock-frequency = <400000>;
326	status = "okay";
327
328	touchscreen: touchscreen@10 {
329		compatible = "elan,ekth3500";
330		reg = <0x10>;
331		interrupt-parent = <&pio>;
332		interrupts = <88 IRQ_TYPE_LEVEL_LOW>;
333	};
334};
335
336&i2c4 {
337	clock-frequency = <400000>;
338	status = "okay";
339	pinctrl-names = "default";
340	pinctrl-0 = <&trackpad_irq>;
341
342	trackpad: trackpad@15 {
343		compatible = "elan,ekth3000";
344		interrupt-parent = <&pio>;
345		interrupts = <117 IRQ_TYPE_LEVEL_LOW>;
346		reg = <0x15>;
347		vcc-supply = <&mt6397_vgp6_reg>;
348		wakeup-source;
349	};
350};
351
352&mipi_tx0 {
353	status = "okay";
354};
355
356&mmc0 {
357	status = "okay";
358	pinctrl-names = "default", "state_uhs";
359	pinctrl-0 = <&mmc0_pins_default>;
360	pinctrl-1 = <&mmc0_pins_uhs>;
361	bus-width = <8>;
362	max-frequency = <200000000>;
363	cap-mmc-highspeed;
364	mmc-hs200-1_8v;
365	mmc-hs400-1_8v;
366	cap-mmc-hw-reset;
367	hs400-ds-delay = <0x14015>;
368	mediatek,hs200-cmd-int-delay=<30>;
369	mediatek,hs400-cmd-int-delay=<14>;
370	mediatek,hs400-cmd-resp-sel-rising;
371	vmmc-supply = <&mt6397_vemc_3v3_reg>;
372	vqmmc-supply = <&mt6397_vio18_reg>;
373	assigned-clocks = <&topckgen CLK_TOP_MSDC50_0_SEL>;
374	assigned-clock-parents = <&topckgen CLK_TOP_MSDCPLL_D2>;
375	non-removable;
376};
377
378&mmc1 {
379	status = "okay";
380	pinctrl-names = "default", "state_uhs";
381	pinctrl-0 = <&mmc1_pins_default>;
382	pinctrl-1 = <&mmc1_pins_uhs>;
383	bus-width = <4>;
384	max-frequency = <200000000>;
385	cap-sd-highspeed;
386	sd-uhs-sdr50;
387	sd-uhs-sdr104;
388	cd-gpios = <&pio 1 GPIO_ACTIVE_LOW>;
389	vmmc-supply = <&mt6397_vmch_reg>;
390	vqmmc-supply = <&mt6397_vmc_reg>;
391};
392
393&mmc3 {
394	status = "okay";
395	pinctrl-names = "default", "state_uhs";
396	pinctrl-0 = <&mmc3_pins_default>;
397	pinctrl-1 = <&mmc3_pins_uhs>;
398	bus-width = <4>;
399	max-frequency = <200000000>;
400	cap-sd-highspeed;
401	sd-uhs-sdr50;
402	sd-uhs-sdr104;
403	keep-power-in-suspend;
404	enable-sdio-wakeup;
405	cap-sdio-irq;
406	vmmc-supply = <&sdio_fixed_3v3>;
407	vqmmc-supply = <&mt6397_vgp3_reg>;
408	non-removable;
409	cap-power-off-card;
410
411	#address-cells = <1>;
412	#size-cells = <0>;
413
414	btmrvl: btmrvl@2 {
415		compatible = "marvell,sd8897-bt";
416		reg = <2>;
417		interrupt-parent = <&pio>;
418		interrupts = <119 IRQ_TYPE_LEVEL_LOW>;
419		marvell,wakeup-pin = /bits/ 16 <0x0d>;
420		marvell,wakeup-gap-ms = /bits/ 16 <0x64>;
421	};
422
423	mwifiex: mwifiex@1 {
424		compatible = "marvell,sd8897";
425		reg = <1>;
426		interrupt-parent = <&pio>;
427		interrupts = <38 IRQ_TYPE_LEVEL_LOW>;
428		marvell,wakeup-pin = <3>;
429	};
430};
431
432&nor_flash {
433	status = "okay";
434	pinctrl-names = "default";
435	pinctrl-0 = <&nor_gpio1_pins>;
436
437	flash@0 {
438		compatible = "jedec,spi-nor";
439		reg = <0>;
440		spi-max-frequency = <50000000>;
441	};
442};
443
444&pio {
445	gpio-line-names = "EC_INT_1V8",
446			  "SD_CD_L",
447			  "ALC5514_IRQ",
448			  "ALC5650_IRQ",
449			  /*
450			   * AP_FLASH_WP_L is crossystem ABI. Schematics
451			   * call it SFWP_B.
452			   */
453			  "AP_FLASH_WP_L",
454			  "SFIN",
455			  "SFCS0",
456			  "SFHOLD",
457			  "SFOUT",
458			  "SFCK",
459			  "WRAP_EVENT_S_EINT10",
460			  "PMU_INT",
461			  "I2S2_WS_ALC5650",
462			  "I2S2_BCK_ALC5650",
463			  "PWR_BTN_1V8",
464			  "DA9212_IRQ",
465			  "IDDIG",
466			  "WATCHDOG",
467			  "CEC",
468			  "HDMISCK",
469			  "HDMISD",
470			  "HTPLG",
471			  "MSDC3_DAT0",
472			  "MSDC3_DAT1",
473			  "MSDC3_DAT2",
474			  "MSDC3_DAT3",
475			  "MSDC3_CLK",
476			  "MSDC3_CMD",
477			  "USB_C0_OC_FLAGB",
478			  "USBA_OC1_L",
479			  "PS8640_1V2_ENABLE",
480			  "THERM_ALERT_N",
481			  "PANEL_LCD_POWER_EN",
482			  "ANX7688_CHIP_PD_C",
483			  "EC_IN_RW_1V8",
484			  "ANX7688_1V_EN_C",
485			  "USB_DP_HPD_C",
486			  "TPM_DAVINT_N",
487			  "MARVELL8897_IRQ",
488			  "EN_USB_A0_PWR",
489			  "USBA_A0_OC_L",
490			  "EN_PP3300_DX_EDP",
491			  "",
492			  "SOC_I2C2_1V8_SDA_400K",
493			  "SOC_I2C2_1V8_SCL_400K",
494			  "SOC_I2C0_1V8_SDA_400K",
495			  "SOC_I2C0_1V8_SCL_400K",
496			  "EMMC_ID1",
497			  "EMMC_ID0",
498			  "MEM_CONFIG3",
499			  "EMMC_ID2",
500			  "MEM_CONFIG1",
501			  "MEM_CONFIG2",
502			  "BRD_ID2",
503			  "MEM_CONFIG0",
504			  "BRD_ID0",
505			  "BRD_ID1",
506			  "EMMC_DAT0",
507			  "EMMC_DAT1",
508			  "EMMC_DAT2",
509			  "EMMC_DAT3",
510			  "EMMC_DAT4",
511			  "EMMC_DAT5",
512			  "EMMC_DAT6",
513			  "EMMC_DAT7",
514			  "EMMC_CLK",
515			  "EMMC_CMD",
516			  "EMMC_RCLK",
517			  "PLT_RST_L",
518			  "LID_OPEN_1V8_L",
519			  "AUDIO_SPI_MISO_R",
520			  "",
521			  "AC_OK_1V8",
522			  "SD_DATA0",
523			  "SD_DATA1",
524			  "SD_DATA2",
525			  "SD_DATA3",
526			  "SD_CLK",
527			  "SD_CMD",
528			  "PWRAP_SPI0_MI",
529			  "PWRAP_SPI0_MO",
530			  "PWRAP_SPI0_CK",
531			  "PWRAP_SPI0_CSN",
532			  "",
533			  "",
534			  "WIFI_PDN",
535			  "RTC32K_1V8",
536			  "DISP_PWM0",
537			  "TOUCHSCREEN_INT_L",
538			  "",
539			  "SRCLKENA0",
540			  "SRCLKENA1",
541			  "PS8640_MODE_CONF",
542			  "TOUCHSCREEN_RESET_R",
543			  "PLATFORM_PROCHOT_L",
544			  "PANEL_POWER_EN",
545			  "REC_MODE_L",
546			  "EC_FW_UPDATE_L",
547			  "ACCEL2_INT_L",
548			  "HDMI_DP_INT",
549			  "ACCELGYRO3_INT_L",
550			  "ACCELGYRO4_INT_L",
551			  "SPI_EC_CLK",
552			  "SPI_EC_MI",
553			  "SPI_EC_MO",
554			  "SPI_EC_CSN",
555			  "SOC_I2C3_1V8_SDA_400K",
556			  "SOC_I2C3_1V8_SCL_400K",
557			  "",
558			  "",
559			  "",
560			  "",
561			  "",
562			  "",
563			  "",
564			  "PS8640_SYSRSTN_1V8",
565			  "APIN_MAX98090_DOUT2",
566			  "TP_INT_1V8_L_R",
567			  "RST_USB_HUB_R",
568			  "BT_WAKE_L",
569			  "ACCEL1_INT_L",
570			  "TABLET_MODE_L",
571			  "",
572			  "V_UP_IN_L_R",
573			  "V_DOWN_IN_L_R",
574			  "SOC_I2C1_1V8_SDA_1M",
575			  "SOC_I2C1_1V8_SCL_1M",
576			  "PS8640_PDN_1V8",
577			  "MAX98090_LRCLK",
578			  "MAX98090_BCLK",
579			  "MAX98090_MCLK",
580			  "APOUT_MAX98090_DIN",
581			  "APIN_MAX98090_DOUT",
582			  "SOC_I2C4_1V8_SDA_400K",
583			  "SOC_I2C4_1V8_SCL_400K";
584
585	aud_i2s2: aud_i2s2 {
586		pins1 {
587			pinmux = <MT8173_PIN_128_I2S0_LRCK__FUNC_I2S1_WS>,
588				 <MT8173_PIN_129_I2S0_BCK__FUNC_I2S1_BCK>,
589				 <MT8173_PIN_130_I2S0_MCK__FUNC_I2S1_MCK>,
590				 <MT8173_PIN_131_I2S0_DATA0__FUNC_I2S1_DO_1>,
591				 <MT8173_PIN_12_EINT12__FUNC_I2S2_WS>,
592				 <MT8173_PIN_13_EINT13__FUNC_I2S2_BCK>,
593				 <MT8173_PIN_132_I2S0_DATA1__FUNC_I2S2_DI_2>;
594			bias-pull-down;
595		};
596	};
597
598	bl_fixed_pins: bl_fixed_pins {
599		pins1 {
600			pinmux = <MT8173_PIN_32_UTXD2__FUNC_GPIO32>;
601			output-low;
602		};
603	};
604
605	bt_wake_pins: bt_wake_pins {
606		pins1 {
607			pinmux = <MT8173_PIN_119_KPROW0__FUNC_GPIO119>;
608			bias-pull-up;
609		};
610	};
611
612	disp_pwm0_pins: disp_pwm0_pins {
613		pins1 {
614			pinmux = <MT8173_PIN_87_DISP_PWM0__FUNC_DISP_PWM0>;
615			output-low;
616		};
617	};
618
619	gpio_keys_pins: gpio_keys_pins {
620		volume_pins {
621			pinmux = <MT8173_PIN_123_KPCOL1__FUNC_GPIO123>,
622				 <MT8173_PIN_124_KPCOL2__FUNC_GPIO124>;
623			bias-pull-up;
624		};
625
626		tablet_mode_pins {
627			pinmux = <MT8173_PIN_121_KPROW2__FUNC_GPIO121>;
628			bias-pull-up;
629		};
630	};
631
632	hdmi_mux_pins: hdmi_mux_pins {
633		pins1 {
634			pinmux = <MT8173_PIN_36_DAISYNC__FUNC_GPIO36>;
635		};
636	};
637
638	i2c1_pins_a: i2c1 {
639		da9211_pins {
640			pinmux = <MT8173_PIN_15_EINT15__FUNC_GPIO15>;
641			bias-pull-up;
642		};
643	};
644
645	mmc0_pins_default: mmc0default {
646		pins_cmd_dat {
647			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
648				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
649				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
650				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
651				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
652				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
653				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
654				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
655				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
656			bias-pull-up;
657		};
658
659		pins_clk {
660			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
661			bias-pull-down;
662		};
663
664		pins_rst {
665			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
666			bias-pull-up;
667		};
668	};
669
670	mmc1_pins_default: mmc1default {
671		pins_cmd_dat {
672			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
673				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
674				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
675				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
676				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
677			input-enable;
678			drive-strength = <MTK_DRIVE_4mA>;
679			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
680		};
681
682		pins_clk {
683			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
684			bias-pull-down;
685			drive-strength = <MTK_DRIVE_4mA>;
686		};
687
688		pins_insert {
689			pinmux = <MT8173_PIN_1_EINT1__FUNC_GPIO1>;
690			bias-pull-up;
691		};
692	};
693
694	mmc3_pins_default: mmc3default {
695		pins_dat {
696			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
697				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
698				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
699				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
700			input-enable;
701			drive-strength = <MTK_DRIVE_8mA>;
702			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
703		};
704
705		pins_cmd {
706			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
707			input-enable;
708			drive-strength = <MTK_DRIVE_8mA>;
709			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
710		};
711
712		pins_clk {
713			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
714			bias-pull-down;
715			drive-strength = <MTK_DRIVE_8mA>;
716		};
717	};
718
719	mmc0_pins_uhs: mmc0 {
720		pins_cmd_dat {
721			pinmux = <MT8173_PIN_57_MSDC0_DAT0__FUNC_MSDC0_DAT0>,
722				 <MT8173_PIN_58_MSDC0_DAT1__FUNC_MSDC0_DAT1>,
723				 <MT8173_PIN_59_MSDC0_DAT2__FUNC_MSDC0_DAT2>,
724				 <MT8173_PIN_60_MSDC0_DAT3__FUNC_MSDC0_DAT3>,
725				 <MT8173_PIN_61_MSDC0_DAT4__FUNC_MSDC0_DAT4>,
726				 <MT8173_PIN_62_MSDC0_DAT5__FUNC_MSDC0_DAT5>,
727				 <MT8173_PIN_63_MSDC0_DAT6__FUNC_MSDC0_DAT6>,
728				 <MT8173_PIN_64_MSDC0_DAT7__FUNC_MSDC0_DAT7>,
729				 <MT8173_PIN_66_MSDC0_CMD__FUNC_MSDC0_CMD>;
730			input-enable;
731			drive-strength = <MTK_DRIVE_6mA>;
732			bias-pull-up = <MTK_PUPD_SET_R1R0_01>;
733		};
734
735		pins_clk {
736			pinmux = <MT8173_PIN_65_MSDC0_CLK__FUNC_MSDC0_CLK>;
737			drive-strength = <MTK_DRIVE_6mA>;
738			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
739		};
740
741		pins_ds {
742			pinmux = <MT8173_PIN_67_MSDC0_DSL__FUNC_MSDC0_DSL>;
743			drive-strength = <MTK_DRIVE_10mA>;
744			bias-pull-down = <MTK_PUPD_SET_R1R0_01>;
745		};
746
747		pins_rst {
748			pinmux = <MT8173_PIN_68_MSDC0_RST___FUNC_MSDC0_RSTB>;
749			bias-pull-up;
750		};
751	};
752
753	mmc1_pins_uhs: mmc1 {
754		pins_cmd_dat {
755			pinmux = <MT8173_PIN_73_MSDC1_DAT0__FUNC_MSDC1_DAT0>,
756				 <MT8173_PIN_74_MSDC1_DAT1__FUNC_MSDC1_DAT1>,
757				 <MT8173_PIN_75_MSDC1_DAT2__FUNC_MSDC1_DAT2>,
758				 <MT8173_PIN_76_MSDC1_DAT3__FUNC_MSDC1_DAT3>,
759				 <MT8173_PIN_78_MSDC1_CMD__FUNC_MSDC1_CMD>;
760			input-enable;
761			drive-strength = <MTK_DRIVE_6mA>;
762			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
763		};
764
765		pins_clk {
766			pinmux = <MT8173_PIN_77_MSDC1_CLK__FUNC_MSDC1_CLK>;
767			drive-strength = <MTK_DRIVE_8mA>;
768			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
769		};
770	};
771
772	mmc3_pins_uhs: mmc3 {
773		pins_dat {
774			pinmux = <MT8173_PIN_22_MSDC3_DAT0__FUNC_MSDC3_DAT0>,
775				 <MT8173_PIN_23_MSDC3_DAT1__FUNC_MSDC3_DAT1>,
776				 <MT8173_PIN_24_MSDC3_DAT2__FUNC_MSDC3_DAT2>,
777				 <MT8173_PIN_25_MSDC3_DAT3__FUNC_MSDC3_DAT3>;
778			input-enable;
779			drive-strength = <MTK_DRIVE_8mA>;
780			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
781		};
782
783		pins_cmd {
784			pinmux = <MT8173_PIN_27_MSDC3_CMD__FUNC_MSDC3_CMD>;
785			input-enable;
786			drive-strength = <MTK_DRIVE_8mA>;
787			bias-pull-up = <MTK_PUPD_SET_R1R0_10>;
788		};
789
790		pins_clk {
791			pinmux = <MT8173_PIN_26_MSDC3_CLK__FUNC_MSDC3_CLK>;
792			drive-strength = <MTK_DRIVE_8mA>;
793			bias-pull-down = <MTK_PUPD_SET_R1R0_10>;
794		};
795	};
796
797	nor_gpio1_pins: nor {
798		pins1 {
799			pinmux = <MT8173_PIN_6_EINT6__FUNC_SFCS0>,
800				 <MT8173_PIN_7_EINT7__FUNC_SFHOLD>,
801				 <MT8173_PIN_8_EINT8__FUNC_SFIN>;
802			input-enable;
803			drive-strength = <MTK_DRIVE_4mA>;
804			bias-pull-up;
805		};
806
807		pins2 {
808			pinmux = <MT8173_PIN_5_EINT5__FUNC_SFOUT>;
809			drive-strength = <MTK_DRIVE_4mA>;
810			bias-pull-up;
811		};
812
813		pins_clk {
814			pinmux = <MT8173_PIN_9_EINT9__FUNC_SFCK>;
815			input-enable;
816			drive-strength = <MTK_DRIVE_4mA>;
817			bias-pull-up;
818		};
819	};
820
821	panel_fixed_pins: panel_fixed_pins {
822		pins1 {
823			pinmux = <MT8173_PIN_41_CMMCLK__FUNC_GPIO41>;
824		};
825	};
826
827	ps8640_pins: ps8640_pins {
828		pins1 {
829			pinmux = <MT8173_PIN_92_PCM_CLK__FUNC_GPIO92>,
830				 <MT8173_PIN_115_URTS0__FUNC_GPIO115>,
831				 <MT8173_PIN_127_LCM_RST__FUNC_GPIO127>;
832		};
833	};
834
835	ps8640_fixed_pins: ps8640_fixed_pins {
836		pins1 {
837			pinmux = <MT8173_PIN_30_URTS2__FUNC_GPIO30>;
838		};
839	};
840
841	rt5650_irq: rt5650_irq {
842		pins1 {
843			pinmux = <MT8173_PIN_3_EINT3__FUNC_GPIO3>;
844			bias-pull-down;
845		};
846	};
847
848	sdio_fixed_3v3_pins: sdio_fixed_3v3_pins {
849		pins1 {
850			pinmux = <MT8173_PIN_85_AUD_DAT_MOSI__FUNC_GPIO85>;
851			output-low;
852		};
853	};
854
855	spi_pins_a: spi1 {
856		pins1 {
857			pinmux = <MT8173_PIN_0_EINT0__FUNC_GPIO0>;
858			bias-pull-up;
859		};
860
861		pins_spi {
862			pinmux = <MT8173_PIN_102_MSDC2_DAT2__FUNC_SPI_CK_1_>,
863				 <MT8173_PIN_103_MSDC2_DAT3__FUNC_SPI_MI_1_>,
864				 <MT8173_PIN_104_MSDC2_CLK__FUNC_SPI_MO_1_>,
865				 <MT8173_PIN_105_MSDC2_CMD__FUNC_SPI_CS_1_>;
866			bias-disable;
867		};
868	};
869
870	trackpad_irq: trackpad_irq {
871		pins1 {
872			pinmux = <MT8173_PIN_117_URXD3__FUNC_GPIO117>;
873			input-enable;
874			bias-pull-up;
875		};
876	};
877
878	usb_pins: usb {
879		pins1 {
880			pinmux = <MT8173_PIN_101_MSDC2_DAT1__FUNC_GPIO101>;
881			output-high;
882			bias-disable;
883		};
884	};
885
886	wifi_wake_pins: wifi_wake_pins {
887		pins1 {
888			pinmux = <MT8173_PIN_38_CONN_RST__FUNC_GPIO38>;
889			bias-pull-up;
890		};
891	};
892};
893
894&pwm0 {
895	status = "okay";
896};
897
898&pwrap {
899	pmic: mt6397 {
900		compatible = "mediatek,mt6397";
901		#address-cells = <1>;
902		#size-cells = <1>;
903		interrupt-parent = <&pio>;
904		interrupts = <11 IRQ_TYPE_LEVEL_HIGH>;
905		interrupt-controller;
906		#interrupt-cells = <2>;
907
908		clock: mt6397clock {
909			compatible = "mediatek,mt6397-clk";
910			#clock-cells = <1>;
911		};
912
913		pio6397: pinctrl {
914			compatible = "mediatek,mt6397-pinctrl";
915			pins-are-numbered;
916			gpio-controller;
917			#gpio-cells = <2>;
918		};
919
920		regulator: mt6397regulator {
921			compatible = "mediatek,mt6397-regulator";
922
923			mt6397_vpca15_reg: buck_vpca15 {
924				regulator-compatible = "buck_vpca15";
925				regulator-name = "vpca15";
926				regulator-min-microvolt = < 700000>;
927				regulator-max-microvolt = <1350000>;
928				regulator-ramp-delay = <12500>;
929				regulator-always-on;
930				regulator-allowed-modes = <0 1>;
931			};
932
933			mt6397_vpca7_reg: buck_vpca7 {
934				regulator-compatible = "buck_vpca7";
935				regulator-name = "vpca7";
936				regulator-min-microvolt = < 700000>;
937				regulator-max-microvolt = <1350000>;
938				regulator-ramp-delay = <12500>;
939				regulator-enable-ramp-delay = <115>;
940				regulator-always-on;
941			};
942
943			mt6397_vsramca15_reg: buck_vsramca15 {
944				regulator-compatible = "buck_vsramca15";
945				regulator-name = "vsramca15";
946				regulator-min-microvolt = < 700000>;
947				regulator-max-microvolt = <1350000>;
948				regulator-ramp-delay = <12500>;
949				regulator-always-on;
950			};
951
952			mt6397_vsramca7_reg: buck_vsramca7 {
953				regulator-compatible = "buck_vsramca7";
954				regulator-name = "vsramca7";
955				regulator-min-microvolt = < 700000>;
956				regulator-max-microvolt = <1350000>;
957				regulator-ramp-delay = <12500>;
958				regulator-always-on;
959			};
960
961			mt6397_vcore_reg: buck_vcore {
962				regulator-compatible = "buck_vcore";
963				regulator-name = "vcore";
964				regulator-min-microvolt = < 700000>;
965				regulator-max-microvolt = <1350000>;
966				regulator-ramp-delay = <12500>;
967				regulator-always-on;
968			};
969
970			mt6397_vgpu_reg: buck_vgpu {
971				regulator-compatible = "buck_vgpu";
972				regulator-name = "vgpu";
973				regulator-min-microvolt = < 700000>;
974				regulator-max-microvolt = <1350000>;
975				regulator-ramp-delay = <12500>;
976				regulator-enable-ramp-delay = <115>;
977			};
978
979			mt6397_vdrm_reg: buck_vdrm {
980				regulator-compatible = "buck_vdrm";
981				regulator-name = "vdrm";
982				regulator-min-microvolt = <1200000>;
983				regulator-max-microvolt = <1400000>;
984				regulator-ramp-delay = <12500>;
985				regulator-always-on;
986			};
987
988			mt6397_vio18_reg: buck_vio18 {
989				regulator-compatible = "buck_vio18";
990				regulator-name = "vio18";
991				regulator-min-microvolt = <1620000>;
992				regulator-max-microvolt = <1980000>;
993				regulator-ramp-delay = <12500>;
994				regulator-always-on;
995			};
996
997			mt6397_vtcxo_reg: ldo_vtcxo {
998				regulator-compatible = "ldo_vtcxo";
999				regulator-name = "vtcxo";
1000				regulator-always-on;
1001			};
1002
1003			mt6397_va28_reg: ldo_va28 {
1004				regulator-compatible = "ldo_va28";
1005				regulator-name = "va28";
1006			};
1007
1008			mt6397_vcama_reg: ldo_vcama {
1009				regulator-compatible = "ldo_vcama";
1010				regulator-name = "vcama";
1011				regulator-min-microvolt = <1800000>;
1012				regulator-max-microvolt = <1800000>;
1013				regulator-enable-ramp-delay = <218>;
1014			};
1015
1016			mt6397_vio28_reg: ldo_vio28 {
1017				regulator-compatible = "ldo_vio28";
1018				regulator-name = "vio28";
1019				regulator-always-on;
1020			};
1021
1022			mt6397_vusb_reg: ldo_vusb {
1023				regulator-compatible = "ldo_vusb";
1024				regulator-name = "vusb";
1025			};
1026
1027			mt6397_vmc_reg: ldo_vmc {
1028				regulator-compatible = "ldo_vmc";
1029				regulator-name = "vmc";
1030				regulator-min-microvolt = <1800000>;
1031				regulator-max-microvolt = <3300000>;
1032				regulator-enable-ramp-delay = <218>;
1033			};
1034
1035			mt6397_vmch_reg: ldo_vmch {
1036				regulator-compatible = "ldo_vmch";
1037				regulator-name = "vmch";
1038				regulator-min-microvolt = <3000000>;
1039				regulator-max-microvolt = <3300000>;
1040				regulator-enable-ramp-delay = <218>;
1041			};
1042
1043			mt6397_vemc_3v3_reg: ldo_vemc3v3 {
1044				regulator-compatible = "ldo_vemc3v3";
1045				regulator-name = "vemc_3v3";
1046				regulator-min-microvolt = <3000000>;
1047				regulator-max-microvolt = <3300000>;
1048				regulator-enable-ramp-delay = <218>;
1049			};
1050
1051			mt6397_vgp1_reg: ldo_vgp1 {
1052				regulator-compatible = "ldo_vgp1";
1053				regulator-name = "vcamd";
1054				regulator-min-microvolt = <1800000>;
1055				regulator-max-microvolt = <1800000>;
1056				regulator-enable-ramp-delay = <240>;
1057			};
1058
1059			mt6397_vgp2_reg: ldo_vgp2 {
1060				regulator-compatible = "ldo_vgp2";
1061				regulator-name = "vcamio";
1062				regulator-min-microvolt = <3300000>;
1063				regulator-max-microvolt = <3300000>;
1064				regulator-enable-ramp-delay = <218>;
1065			};
1066
1067			mt6397_vgp3_reg: ldo_vgp3 {
1068				regulator-compatible = "ldo_vgp3";
1069				regulator-name = "vcamaf";
1070				regulator-min-microvolt = <1800000>;
1071				regulator-max-microvolt = <1800000>;
1072				regulator-enable-ramp-delay = <218>;
1073			};
1074
1075			mt6397_vgp4_reg: ldo_vgp4 {
1076				regulator-compatible = "ldo_vgp4";
1077				regulator-name = "vgp4";
1078				regulator-min-microvolt = <1200000>;
1079				regulator-max-microvolt = <3300000>;
1080				regulator-enable-ramp-delay = <218>;
1081			};
1082
1083			mt6397_vgp5_reg: ldo_vgp5 {
1084				regulator-compatible = "ldo_vgp5";
1085				regulator-name = "vgp5";
1086				regulator-min-microvolt = <1200000>;
1087				regulator-max-microvolt = <3000000>;
1088				regulator-enable-ramp-delay = <218>;
1089			};
1090
1091			mt6397_vgp6_reg: ldo_vgp6 {
1092				regulator-compatible = "ldo_vgp6";
1093				regulator-name = "vgp6";
1094				regulator-min-microvolt = <3300000>;
1095				regulator-max-microvolt = <3300000>;
1096				regulator-enable-ramp-delay = <218>;
1097				regulator-always-on;
1098			};
1099
1100			mt6397_vibr_reg: ldo_vibr {
1101				regulator-compatible = "ldo_vibr";
1102				regulator-name = "vibr";
1103				regulator-min-microvolt = <1300000>;
1104				regulator-max-microvolt = <3300000>;
1105				regulator-enable-ramp-delay = <218>;
1106			};
1107		};
1108
1109		rtc: mt6397rtc {
1110			compatible = "mediatek,mt6397-rtc";
1111		};
1112
1113		syscfg_pctl_pmic: syscfg_pctl_pmic@c000 {
1114			compatible = "mediatek,mt6397-pctl-pmic-syscfg",
1115				     "syscon";
1116			reg = <0 0x0000c000 0 0x0108>;
1117		};
1118	};
1119};
1120
1121&spi {
1122	pinctrl-names = "default";
1123	pinctrl-0 = <&spi_pins_a>;
1124	mediatek,pad-select = <1>;
1125	status = "okay";
1126	/* clients */
1127	cros_ec: ec@0 {
1128		compatible = "google,cros-ec-spi";
1129		reg = <0x0>;
1130		spi-max-frequency = <12000000>;
1131		interrupt-parent = <&pio>;
1132		interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
1133		google,cros-ec-spi-msg-delay = <500>;
1134
1135		i2c_tunnel: i2c-tunnel0 {
1136			compatible = "google,cros-ec-i2c-tunnel";
1137			google,remote-bus = <0>;
1138			#address-cells = <1>;
1139			#size-cells = <0>;
1140
1141			battery: sbs-battery@b {
1142				compatible = "sbs,sbs-battery";
1143				reg = <0xb>;
1144				sbs,i2c-retry-count = <2>;
1145				sbs,poll-retry-count = <1>;
1146			};
1147		};
1148	};
1149};
1150
1151&ssusb {
1152	dr_mode = "host";
1153	wakeup-source;
1154	vusb33-supply = <&mt6397_vusb_reg>;
1155	status = "okay";
1156};
1157
1158&thermal {
1159	bank0-supply = <&mt6397_vpca15_reg>;
1160	bank1-supply = <&da9211_vcpu_reg>;
1161};
1162
1163&uart0 {
1164	status = "okay";
1165};
1166
1167&usb_host {
1168	pinctrl-names = "default";
1169	pinctrl-0 = <&usb_pins>;
1170	vusb33-supply = <&mt6397_vusb_reg>;
1171	status = "okay";
1172};
1173
1174#include <arm/cros-ec-keyboard.dtsi>
1175