xref: /freebsd/sys/contrib/device-tree/src/arm64/mediatek/mt7986a-rfb.dts (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7) 
1// SPDX-License-Identifier: (GPL-2.0 OR MIT)
2/*
3 * Copyright (C) 2021 MediaTek Inc.
4 * Author: Sam.Shih <sam.shih@mediatek.com>
5 */
6
7/dts-v1/;
8#include <dt-bindings/pinctrl/mt65xx.h>
9
10#include "mt7986a.dtsi"
11
12/ {
13	model = "MediaTek MT7986a RFB";
14	compatible = "mediatek,mt7986a-rfb", "mediatek,mt7986a";
15
16	aliases {
17		serial0 = &uart0;
18	};
19
20	chosen {
21		stdout-path = "serial0:115200n8";
22	};
23
24	memory@40000000 {
25		device_type = "memory";
26		reg = <0 0x40000000 0 0x40000000>;
27	};
28
29	reg_1p8v: regulator-1p8v {
30		compatible = "regulator-fixed";
31		regulator-name = "fixed-1.8V";
32		regulator-min-microvolt = <1800000>;
33		regulator-max-microvolt = <1800000>;
34		regulator-boot-on;
35		regulator-always-on;
36	};
37
38	reg_3p3v: regulator-3p3v {
39		compatible = "regulator-fixed";
40		regulator-name = "fixed-3.3V";
41		regulator-min-microvolt = <3300000>;
42		regulator-max-microvolt = <3300000>;
43		regulator-boot-on;
44		regulator-always-on;
45	};
46};
47
48&crypto {
49	status = "okay";
50};
51
52&eth {
53	status = "okay";
54
55	gmac0: mac@0 {
56		compatible = "mediatek,eth-mac";
57		reg = <0>;
58		phy-mode = "2500base-x";
59
60		fixed-link {
61			speed = <2500>;
62			full-duplex;
63			pause;
64		};
65	};
66
67	mdio: mdio-bus {
68		#address-cells = <1>;
69		#size-cells = <0>;
70	};
71};
72
73&mdio {
74	switch: switch@0 {
75		compatible = "mediatek,mt7531";
76		reg = <31>;
77		reset-gpios = <&pio 5 0>;
78	};
79};
80
81&mmc0 {
82	pinctrl-names = "default", "state_uhs";
83	pinctrl-0 = <&mmc0_pins_default>;
84	pinctrl-1 = <&mmc0_pins_uhs>;
85	bus-width = <8>;
86	max-frequency = <200000000>;
87	cap-mmc-highspeed;
88	mmc-hs200-1_8v;
89	mmc-hs400-1_8v;
90	hs400-ds-delay = <0x14014>;
91	vmmc-supply = <&reg_3p3v>;
92	vqmmc-supply = <&reg_1p8v>;
93	non-removable;
94	no-sd;
95	no-sdio;
96};
97
98&pcie {
99	pinctrl-names = "default";
100	pinctrl-0 = <&pcie_pins>;
101	status = "okay";
102};
103
104&pcie_phy {
105	status = "okay";
106};
107
108&pio {
109	mmc0_pins_default: mmc0-pins {
110		mux {
111			function = "emmc";
112			groups = "emmc_51";
113		};
114		conf-cmd-dat {
115			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
116			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
117			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
118			input-enable;
119			drive-strength = <4>;
120			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
121		};
122		conf-clk {
123			pins = "EMMC_CK";
124			drive-strength = <6>;
125			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
126		};
127		conf-ds {
128			pins = "EMMC_DSL";
129			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
130		};
131		conf-rst {
132			pins = "EMMC_RSTB";
133			drive-strength = <4>;
134			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
135		};
136	};
137
138	mmc0_pins_uhs: mmc0-uhs-pins {
139		mux {
140			function = "emmc";
141			groups = "emmc_51";
142		};
143		conf-cmd-dat {
144			pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
145			       "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
146			       "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
147			input-enable;
148			drive-strength = <4>;
149			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
150		};
151		conf-clk {
152			pins = "EMMC_CK";
153			drive-strength = <6>;
154			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
155		};
156		conf-ds {
157			pins = "EMMC_DSL";
158			bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
159		};
160		conf-rst {
161			pins = "EMMC_RSTB";
162			drive-strength = <4>;
163			bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
164		};
165	};
166
167	pcie_pins: pcie-pins {
168		mux {
169			function = "pcie";
170			groups = "pcie_clk", "pcie_wake", "pcie_pereset";
171		};
172	};
173
174	spi_flash_pins: spi-flash-pins {
175		mux {
176			function = "spi";
177			groups = "spi0", "spi0_wp_hold";
178		};
179	};
180
181	spic_pins: spic-pins {
182		mux {
183			function = "spi";
184			groups = "spi1_2";
185		};
186	};
187
188	uart1_pins: uart1-pins {
189		mux {
190			function = "uart";
191			groups = "uart1";
192		};
193	};
194
195	uart2_pins: uart2-pins {
196		mux {
197			function = "uart";
198			groups = "uart2";
199		};
200	};
201
202	wf_2g_5g_pins: wf-2g-5g-pins {
203		mux {
204			function = "wifi";
205			groups = "wf_2g", "wf_5g";
206		};
207		conf {
208			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
209			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
210			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
211			       "WF0_TOP_CLK", "WF0_TOP_DATA", "WF1_HB1",
212			       "WF1_HB2", "WF1_HB3", "WF1_HB4", "WF1_HB0",
213			       "WF1_HB5", "WF1_HB6", "WF1_HB7", "WF1_HB8",
214			       "WF1_TOP_CLK", "WF1_TOP_DATA";
215			drive-strength = <4>;
216		};
217	};
218
219	wf_dbdc_pins: wf-dbdc-pins {
220		mux {
221			function = "wifi";
222			groups = "wf_dbdc";
223		};
224		conf {
225			pins = "WF0_HB1", "WF0_HB2", "WF0_HB3", "WF0_HB4",
226			       "WF0_HB0", "WF0_HB0_B", "WF0_HB5", "WF0_HB6",
227			       "WF0_HB7", "WF0_HB8", "WF0_HB9", "WF0_HB10",
228			       "WF0_TOP_CLK", "WF0_TOP_DATA";
229			drive-strength = <4>;
230		};
231	};
232};
233
234&spi0 {
235	pinctrl-names = "default";
236	pinctrl-0 = <&spi_flash_pins>;
237	cs-gpios = <0>, <0>;
238	status = "okay";
239	spi_nand: spi_nand@0 {
240		compatible = "spi-nand";
241		reg = <0>;
242		spi-max-frequency = <10000000>;
243		spi-tx-buswidth = <4>;
244		spi-rx-buswidth = <4>;
245	};
246};
247
248&spi1 {
249	pinctrl-names = "default";
250	pinctrl-0 = <&spic_pins>;
251	cs-gpios = <0>, <0>;
252	status = "okay";
253};
254
255&ssusb {
256	status = "okay";
257};
258
259&switch {
260	ports {
261		#address-cells = <1>;
262		#size-cells = <0>;
263
264		port@0 {
265			reg = <0>;
266			label = "lan0";
267		};
268
269		port@1 {
270			reg = <1>;
271			label = "lan1";
272		};
273
274		port@2 {
275			reg = <2>;
276			label = "lan2";
277		};
278
279		port@3 {
280			reg = <3>;
281			label = "lan3";
282		};
283
284		port@4 {
285			reg = <4>;
286			label = "lan4";
287		};
288
289		port@6 {
290			reg = <6>;
291			label = "cpu";
292			ethernet = <&gmac0>;
293			phy-mode = "2500base-x";
294
295			fixed-link {
296				speed = <2500>;
297				full-duplex;
298				pause;
299			};
300		};
301	};
302};
303
304&uart0 {
305	status = "okay";
306};
307
308&uart1 {
309	pinctrl-names = "default";
310	pinctrl-0 = <&uart1_pins>;
311	status = "okay";
312};
313
314&uart2 {
315	pinctrl-names = "default";
316	pinctrl-0 = <&uart2_pins>;
317	status = "okay";
318};
319
320&usb_phy {
321	status = "okay";
322};
323
324&wifi {
325	status = "okay";
326	pinctrl-names = "default", "dbdc";
327	pinctrl-0 = <&wf_2g_5g_pins>;
328	pinctrl-1 = <&wf_dbdc_pins>;
329};
330