1/* 2 * Copyright (c) 2017 MediaTek Inc. 3 * Author: YT Shen <yt.shen@mediatek.com> 4 * 5 * SPDX-License-Identifier: (GPL-2.0 OR MIT) 6 */ 7 8/dts-v1/; 9#include <dt-bindings/gpio/gpio.h> 10#include "mt2712e.dtsi" 11 12/ { 13 model = "MediaTek MT2712 evaluation board"; 14 chassis-type = "embedded"; 15 compatible = "mediatek,mt2712-evb", "mediatek,mt2712"; 16 17 aliases { 18 serial0 = &uart0; 19 }; 20 21 memory@40000000 { 22 device_type = "memory"; 23 reg = <0 0x40000000 0 0x80000000>; 24 }; 25 26 chosen { 27 stdout-path = "serial0:921600n8"; 28 }; 29 30 cpus_fixed_vproc0: regulator-vproc-buck0 { 31 compatible = "regulator-fixed"; 32 regulator-name = "vproc_buck0"; 33 regulator-min-microvolt = <1000000>; 34 regulator-max-microvolt = <1000000>; 35 }; 36 37 cpus_fixed_vproc1: regulator-vproc-buck1 { 38 compatible = "regulator-fixed"; 39 regulator-name = "vproc_buck1"; 40 regulator-min-microvolt = <1000000>; 41 regulator-max-microvolt = <1000000>; 42 }; 43 44 extcon_usb: extcon_iddig { 45 compatible = "linux,extcon-usb-gpio"; 46 id-gpio = <&pio 12 GPIO_ACTIVE_HIGH>; 47 }; 48 49 extcon_usb1: extcon_iddig1 { 50 compatible = "linux,extcon-usb-gpio"; 51 id-gpio = <&pio 14 GPIO_ACTIVE_HIGH>; 52 }; 53 54 usb_p0_vbus: regulator-usb-p0-vbus { 55 compatible = "regulator-fixed"; 56 regulator-name = "p0_vbus"; 57 regulator-min-microvolt = <5000000>; 58 regulator-max-microvolt = <5000000>; 59 gpio = <&pio 13 GPIO_ACTIVE_HIGH>; 60 enable-active-high; 61 }; 62 63 usb_p1_vbus: regulator-usb-p1-vbus { 64 compatible = "regulator-fixed"; 65 regulator-name = "p1_vbus"; 66 regulator-min-microvolt = <5000000>; 67 regulator-max-microvolt = <5000000>; 68 gpio = <&pio 15 GPIO_ACTIVE_HIGH>; 69 enable-active-high; 70 }; 71 72 usb_p2_vbus: regulator-usb-p2-vbus { 73 compatible = "regulator-fixed"; 74 regulator-name = "p2_vbus"; 75 regulator-min-microvolt = <5000000>; 76 regulator-max-microvolt = <5000000>; 77 gpio = <&pio 16 GPIO_ACTIVE_HIGH>; 78 enable-active-high; 79 }; 80 81 usb_p3_vbus: regulator-usb-p3-vbus { 82 compatible = "regulator-fixed"; 83 regulator-name = "p3_vbus"; 84 regulator-min-microvolt = <5000000>; 85 regulator-max-microvolt = <5000000>; 86 gpio = <&pio 17 GPIO_ACTIVE_HIGH>; 87 enable-active-high; 88 regulator-always-on; 89 }; 90 91}; 92 93&auxadc { 94 status = "okay"; 95}; 96 97&cpu0 { 98 proc-supply = <&cpus_fixed_vproc0>; 99}; 100 101&cpu1 { 102 proc-supply = <&cpus_fixed_vproc0>; 103}; 104 105&cpu2 { 106 proc-supply = <&cpus_fixed_vproc1>; 107}; 108 109ð { 110 phy-mode = "rgmii-rxid"; 111 phy-handle = <ðernet_phy0>; 112 mediatek,tx-delay-ps = <1530>; 113 snps,reset-gpio = <&pio 87 GPIO_ACTIVE_LOW>; 114 snps,reset-delays-us = <0 10000 10000>; 115 pinctrl-names = "default", "sleep"; 116 pinctrl-0 = <ð_default>; 117 pinctrl-1 = <ð_sleep>; 118 status = "okay"; 119 120 mdio { 121 compatible = "snps,dwmac-mdio"; 122 #address-cells = <1>; 123 #size-cells = <0>; 124 ethernet_phy0: ethernet-phy@5 { 125 compatible = "ethernet-phy-id0243.0d90"; 126 reg = <0x5>; 127 }; 128 }; 129}; 130 131&pio { 132 eth_default: eth_default { 133 tx_pins { 134 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GBE_TXD3>, 135 <MT2712_PIN_72_GBE_TXD2__FUNC_GBE_TXD2>, 136 <MT2712_PIN_73_GBE_TXD1__FUNC_GBE_TXD1>, 137 <MT2712_PIN_74_GBE_TXD0__FUNC_GBE_TXD0>, 138 <MT2712_PIN_75_GBE_TXC__FUNC_GBE_TXC>, 139 <MT2712_PIN_76_GBE_TXEN__FUNC_GBE_TXEN>; 140 drive-strength = <MTK_DRIVE_8mA>; 141 }; 142 rx_pins { 143 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GBE_RXD3>, 144 <MT2712_PIN_79_GBE_RXD2__FUNC_GBE_RXD2>, 145 <MT2712_PIN_80_GBE_RXD1__FUNC_GBE_RXD1>, 146 <MT2712_PIN_81_GBE_RXD0__FUNC_GBE_RXD0>, 147 <MT2712_PIN_82_GBE_RXDV__FUNC_GBE_RXDV>, 148 <MT2712_PIN_84_GBE_RXC__FUNC_GBE_RXC>; 149 input-enable; 150 }; 151 mdio_pins { 152 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GBE_MDC>, 153 <MT2712_PIN_86_GBE_MDIO__FUNC_GBE_MDIO>; 154 drive-strength = <MTK_DRIVE_8mA>; 155 input-enable; 156 }; 157 }; 158 159 eth_sleep: eth_sleep { 160 tx_pins { 161 pinmux = <MT2712_PIN_71_GBE_TXD3__FUNC_GPIO71>, 162 <MT2712_PIN_72_GBE_TXD2__FUNC_GPIO72>, 163 <MT2712_PIN_73_GBE_TXD1__FUNC_GPIO73>, 164 <MT2712_PIN_74_GBE_TXD0__FUNC_GPIO74>, 165 <MT2712_PIN_75_GBE_TXC__FUNC_GPIO75>, 166 <MT2712_PIN_76_GBE_TXEN__FUNC_GPIO76>; 167 }; 168 rx_pins { 169 pinmux = <MT2712_PIN_78_GBE_RXD3__FUNC_GPIO78>, 170 <MT2712_PIN_79_GBE_RXD2__FUNC_GPIO79>, 171 <MT2712_PIN_80_GBE_RXD1__FUNC_GPIO80>, 172 <MT2712_PIN_81_GBE_RXD0__FUNC_GPIO81>, 173 <MT2712_PIN_82_GBE_RXDV__FUNC_GPIO82>, 174 <MT2712_PIN_84_GBE_RXC__FUNC_GPIO84>; 175 input-disable; 176 }; 177 mdio_pins { 178 pinmux = <MT2712_PIN_85_GBE_MDC__FUNC_GPIO85>, 179 <MT2712_PIN_86_GBE_MDIO__FUNC_GPIO86>; 180 input-disable; 181 bias-disable; 182 }; 183 }; 184 185 usb0_id_pins_float: usb0_iddig { 186 pins_iddig { 187 pinmux = <MT2712_PIN_12_IDDIG_P0__FUNC_IDDIG_A>; 188 bias-pull-up; 189 }; 190 }; 191 192 usb1_id_pins_float: usb1_iddig { 193 pins_iddig { 194 pinmux = <MT2712_PIN_14_IDDIG_P1__FUNC_IDDIG_B>; 195 bias-pull-up; 196 }; 197 }; 198}; 199 200&ssusb { 201 vbus-supply = <&usb_p0_vbus>; 202 extcon = <&extcon_usb>; 203 dr_mode = "otg"; 204 wakeup-source; 205 mediatek,u3p-dis-msk = <0x1>; 206 //enable-manual-drd; 207 //maximum-speed = "full-speed"; 208 pinctrl-names = "default"; 209 pinctrl-0 = <&usb0_id_pins_float>; 210 status = "okay"; 211}; 212 213&ssusb1 { 214 vbus-supply = <&usb_p1_vbus>; 215 extcon = <&extcon_usb1>; 216 dr_mode = "otg"; 217 //mediatek,u3p-dis-msk = <0x1>; 218 enable-manual-drd; 219 wakeup-source; 220 //maximum-speed = "full-speed"; 221 pinctrl-names = "default"; 222 pinctrl-0 = <&usb1_id_pins_float>; 223 status = "okay"; 224}; 225 226&uart0 { 227 status = "okay"; 228}; 229 230&usb_host0 { 231 vbus-supply = <&usb_p2_vbus>; 232 status = "okay"; 233}; 234 235&usb_host1 { 236 status = "okay"; 237}; 238