1*833e5d42SEmmanuel Vadot// SPDX-License-Identifier: GPL-2.0-only 2*833e5d42SEmmanuel Vadot/dts-v1/; 3*833e5d42SEmmanuel Vadot 4*833e5d42SEmmanuel Vadot#include <dt-bindings/interrupt-controller/arm-gic.h> 5*833e5d42SEmmanuel Vadot#include <dt-bindings/clock/marvell,pxa1908.h> 6*833e5d42SEmmanuel Vadot 7*833e5d42SEmmanuel Vadot/ { 8*833e5d42SEmmanuel Vadot model = "Marvell Armada PXA1908"; 9*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908"; 10*833e5d42SEmmanuel Vadot #address-cells = <2>; 11*833e5d42SEmmanuel Vadot #size-cells = <2>; 12*833e5d42SEmmanuel Vadot interrupt-parent = <&gic>; 13*833e5d42SEmmanuel Vadot 14*833e5d42SEmmanuel Vadot cpus { 15*833e5d42SEmmanuel Vadot #address-cells = <2>; 16*833e5d42SEmmanuel Vadot #size-cells = <0>; 17*833e5d42SEmmanuel Vadot 18*833e5d42SEmmanuel Vadot cpu0: cpu@0 { 19*833e5d42SEmmanuel Vadot device_type = "cpu"; 20*833e5d42SEmmanuel Vadot compatible = "arm,cortex-a53"; 21*833e5d42SEmmanuel Vadot reg = <0 0>; 22*833e5d42SEmmanuel Vadot enable-method = "psci"; 23*833e5d42SEmmanuel Vadot }; 24*833e5d42SEmmanuel Vadot 25*833e5d42SEmmanuel Vadot cpu1: cpu@1 { 26*833e5d42SEmmanuel Vadot device_type = "cpu"; 27*833e5d42SEmmanuel Vadot compatible = "arm,cortex-a53"; 28*833e5d42SEmmanuel Vadot reg = <0 1>; 29*833e5d42SEmmanuel Vadot enable-method = "psci"; 30*833e5d42SEmmanuel Vadot }; 31*833e5d42SEmmanuel Vadot 32*833e5d42SEmmanuel Vadot cpu2: cpu@2 { 33*833e5d42SEmmanuel Vadot device_type = "cpu"; 34*833e5d42SEmmanuel Vadot compatible = "arm,cortex-a53"; 35*833e5d42SEmmanuel Vadot reg = <0 2>; 36*833e5d42SEmmanuel Vadot enable-method = "psci"; 37*833e5d42SEmmanuel Vadot }; 38*833e5d42SEmmanuel Vadot 39*833e5d42SEmmanuel Vadot cpu3: cpu@3 { 40*833e5d42SEmmanuel Vadot device_type = "cpu"; 41*833e5d42SEmmanuel Vadot compatible = "arm,cortex-a53"; 42*833e5d42SEmmanuel Vadot reg = <0 3>; 43*833e5d42SEmmanuel Vadot enable-method = "psci"; 44*833e5d42SEmmanuel Vadot }; 45*833e5d42SEmmanuel Vadot }; 46*833e5d42SEmmanuel Vadot 47*833e5d42SEmmanuel Vadot pmu { 48*833e5d42SEmmanuel Vadot compatible = "arm,cortex-a53-pmu"; 49*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>, 50*833e5d42SEmmanuel Vadot <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>, 51*833e5d42SEmmanuel Vadot <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>, 52*833e5d42SEmmanuel Vadot <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>; 53*833e5d42SEmmanuel Vadot interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>; 54*833e5d42SEmmanuel Vadot }; 55*833e5d42SEmmanuel Vadot 56*833e5d42SEmmanuel Vadot psci { 57*833e5d42SEmmanuel Vadot compatible = "arm,psci-0.2"; 58*833e5d42SEmmanuel Vadot method = "smc"; 59*833e5d42SEmmanuel Vadot }; 60*833e5d42SEmmanuel Vadot 61*833e5d42SEmmanuel Vadot timer { 62*833e5d42SEmmanuel Vadot compatible = "arm,armv8-timer"; 63*833e5d42SEmmanuel Vadot interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 64*833e5d42SEmmanuel Vadot <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 65*833e5d42SEmmanuel Vadot <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>, 66*833e5d42SEmmanuel Vadot <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 67*833e5d42SEmmanuel Vadot }; 68*833e5d42SEmmanuel Vadot 69*833e5d42SEmmanuel Vadot soc { 70*833e5d42SEmmanuel Vadot compatible = "simple-bus"; 71*833e5d42SEmmanuel Vadot #address-cells = <2>; 72*833e5d42SEmmanuel Vadot #size-cells = <2>; 73*833e5d42SEmmanuel Vadot ranges; 74*833e5d42SEmmanuel Vadot 75*833e5d42SEmmanuel Vadot smmu: iommu@c0010000 { 76*833e5d42SEmmanuel Vadot compatible = "arm,mmu-400"; 77*833e5d42SEmmanuel Vadot reg = <0 0xc0010000 0 0x10000>; 78*833e5d42SEmmanuel Vadot #global-interrupts = <1>; 79*833e5d42SEmmanuel Vadot #iommu-cells = <1>; 80*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>, 81*833e5d42SEmmanuel Vadot <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>; 82*833e5d42SEmmanuel Vadot status = "disabled"; 83*833e5d42SEmmanuel Vadot }; 84*833e5d42SEmmanuel Vadot 85*833e5d42SEmmanuel Vadot gic: interrupt-controller@d1df9000 { 86*833e5d42SEmmanuel Vadot compatible = "arm,gic-400"; 87*833e5d42SEmmanuel Vadot reg = <0 0xd1df9000 0 0x1000>, 88*833e5d42SEmmanuel Vadot <0 0xd1dfa000 0 0x2000>, 89*833e5d42SEmmanuel Vadot /* The subsequent registers are guesses. */ 90*833e5d42SEmmanuel Vadot <0 0xd1dfc000 0 0x2000>, 91*833e5d42SEmmanuel Vadot <0 0xd1dfe000 0 0x2000>; 92*833e5d42SEmmanuel Vadot interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; 93*833e5d42SEmmanuel Vadot interrupt-controller; 94*833e5d42SEmmanuel Vadot #interrupt-cells = <3>; 95*833e5d42SEmmanuel Vadot }; 96*833e5d42SEmmanuel Vadot 97*833e5d42SEmmanuel Vadot apb@d4000000 { 98*833e5d42SEmmanuel Vadot compatible = "simple-bus"; 99*833e5d42SEmmanuel Vadot reg = <0 0xd4000000 0 0x200000>; 100*833e5d42SEmmanuel Vadot #address-cells = <1>; 101*833e5d42SEmmanuel Vadot #size-cells = <1>; 102*833e5d42SEmmanuel Vadot ranges = <0 0 0xd4000000 0x200000>; 103*833e5d42SEmmanuel Vadot 104*833e5d42SEmmanuel Vadot pdma: dma-controller@0 { 105*833e5d42SEmmanuel Vadot compatible = "marvell,pdma-1.0"; 106*833e5d42SEmmanuel Vadot reg = <0 0x10000>; 107*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>; 108*833e5d42SEmmanuel Vadot dma-channels = <30>; 109*833e5d42SEmmanuel Vadot #dma-cells = <2>; 110*833e5d42SEmmanuel Vadot }; 111*833e5d42SEmmanuel Vadot 112*833e5d42SEmmanuel Vadot twsi1: i2c@10800 { 113*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-twsi"; 114*833e5d42SEmmanuel Vadot #address-cells = <1>; 115*833e5d42SEmmanuel Vadot #size-cells = <0>; 116*833e5d42SEmmanuel Vadot reg = <0x10800 0x64>; 117*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>; 118*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_TWSI1>; 119*833e5d42SEmmanuel Vadot mrvl,i2c-fast-mode; 120*833e5d42SEmmanuel Vadot status = "disabled"; 121*833e5d42SEmmanuel Vadot }; 122*833e5d42SEmmanuel Vadot 123*833e5d42SEmmanuel Vadot twsi0: i2c@11000 { 124*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-twsi"; 125*833e5d42SEmmanuel Vadot #address-cells = <1>; 126*833e5d42SEmmanuel Vadot #size-cells = <0>; 127*833e5d42SEmmanuel Vadot reg = <0x11000 0x64>; 128*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; 129*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_TWSI0>; 130*833e5d42SEmmanuel Vadot mrvl,i2c-fast-mode; 131*833e5d42SEmmanuel Vadot status = "disabled"; 132*833e5d42SEmmanuel Vadot }; 133*833e5d42SEmmanuel Vadot 134*833e5d42SEmmanuel Vadot twsi3: i2c@13800 { 135*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-twsi"; 136*833e5d42SEmmanuel Vadot #address-cells = <1>; 137*833e5d42SEmmanuel Vadot #size-cells = <0>; 138*833e5d42SEmmanuel Vadot reg = <0x13800 0x64>; 139*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>; 140*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_TWSI3>; 141*833e5d42SEmmanuel Vadot mrvl,i2c-fast-mode; 142*833e5d42SEmmanuel Vadot status = "disabled"; 143*833e5d42SEmmanuel Vadot }; 144*833e5d42SEmmanuel Vadot 145*833e5d42SEmmanuel Vadot apbc: clock-controller@15000 { 146*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908-apbc"; 147*833e5d42SEmmanuel Vadot reg = <0x15000 0x1000>; 148*833e5d42SEmmanuel Vadot #clock-cells = <1>; 149*833e5d42SEmmanuel Vadot }; 150*833e5d42SEmmanuel Vadot 151*833e5d42SEmmanuel Vadot uart0: serial@17000 { 152*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 153*833e5d42SEmmanuel Vadot reg = <0x17000 0x1000>; 154*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>; 155*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_UART0>; 156*833e5d42SEmmanuel Vadot reg-shift = <2>; 157*833e5d42SEmmanuel Vadot }; 158*833e5d42SEmmanuel Vadot 159*833e5d42SEmmanuel Vadot uart1: serial@18000 { 160*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 161*833e5d42SEmmanuel Vadot reg = <0x18000 0x1000>; 162*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>; 163*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_UART1>; 164*833e5d42SEmmanuel Vadot reg-shift = <2>; 165*833e5d42SEmmanuel Vadot }; 166*833e5d42SEmmanuel Vadot 167*833e5d42SEmmanuel Vadot gpio: gpio@19000 { 168*833e5d42SEmmanuel Vadot compatible = "marvell,mmp-gpio"; 169*833e5d42SEmmanuel Vadot reg = <0x19000 0x800>; 170*833e5d42SEmmanuel Vadot #address-cells = <1>; 171*833e5d42SEmmanuel Vadot #size-cells = <1>; 172*833e5d42SEmmanuel Vadot gpio-controller; 173*833e5d42SEmmanuel Vadot #gpio-cells = <2>; 174*833e5d42SEmmanuel Vadot clocks = <&apbc PXA1908_CLK_GPIO>; 175*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>; 176*833e5d42SEmmanuel Vadot interrupt-names = "gpio_mux"; 177*833e5d42SEmmanuel Vadot interrupt-controller; 178*833e5d42SEmmanuel Vadot #interrupt-cells = <2>; 179*833e5d42SEmmanuel Vadot ranges = <0 0x19000 0x800>; 180*833e5d42SEmmanuel Vadot 181*833e5d42SEmmanuel Vadot gpio@0 { 182*833e5d42SEmmanuel Vadot reg = <0x0 0x4>; 183*833e5d42SEmmanuel Vadot }; 184*833e5d42SEmmanuel Vadot 185*833e5d42SEmmanuel Vadot gpio@4 { 186*833e5d42SEmmanuel Vadot reg = <0x4 0x4>; 187*833e5d42SEmmanuel Vadot }; 188*833e5d42SEmmanuel Vadot 189*833e5d42SEmmanuel Vadot gpio@8 { 190*833e5d42SEmmanuel Vadot reg = <0x8 0x4>; 191*833e5d42SEmmanuel Vadot }; 192*833e5d42SEmmanuel Vadot 193*833e5d42SEmmanuel Vadot gpio@100 { 194*833e5d42SEmmanuel Vadot reg = <0x100 0x4>; 195*833e5d42SEmmanuel Vadot }; 196*833e5d42SEmmanuel Vadot }; 197*833e5d42SEmmanuel Vadot 198*833e5d42SEmmanuel Vadot pmx: pinmux@1e000 { 199*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908-padconf", "pinconf-single"; 200*833e5d42SEmmanuel Vadot reg = <0x1e000 0x330>; 201*833e5d42SEmmanuel Vadot 202*833e5d42SEmmanuel Vadot #pinctrl-cells = <1>; 203*833e5d42SEmmanuel Vadot pinctrl-single,register-width = <32>; 204*833e5d42SEmmanuel Vadot pinctrl-single,function-mask = <7>; 205*833e5d42SEmmanuel Vadot 206*833e5d42SEmmanuel Vadot range: gpio-range { 207*833e5d42SEmmanuel Vadot #pinctrl-single,gpio-range-cells = <3>; 208*833e5d42SEmmanuel Vadot }; 209*833e5d42SEmmanuel Vadot }; 210*833e5d42SEmmanuel Vadot 211*833e5d42SEmmanuel Vadot uart2: serial@36000 { 212*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-uart", "intel,xscale-uart"; 213*833e5d42SEmmanuel Vadot reg = <0x36000 0x1000>; 214*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; 215*833e5d42SEmmanuel Vadot clocks = <&apbcp PXA1908_CLK_UART2>; 216*833e5d42SEmmanuel Vadot reg-shift = <2>; 217*833e5d42SEmmanuel Vadot }; 218*833e5d42SEmmanuel Vadot 219*833e5d42SEmmanuel Vadot twsi2: i2c@37000 { 220*833e5d42SEmmanuel Vadot compatible = "mrvl,mmp-twsi"; 221*833e5d42SEmmanuel Vadot #address-cells = <1>; 222*833e5d42SEmmanuel Vadot #size-cells = <0>; 223*833e5d42SEmmanuel Vadot reg = <0x37000 0x64>; 224*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>; 225*833e5d42SEmmanuel Vadot clocks = <&apbcp PXA1908_CLK_TWSI2>; 226*833e5d42SEmmanuel Vadot mrvl,i2c-fast-mode; 227*833e5d42SEmmanuel Vadot status = "disabled"; 228*833e5d42SEmmanuel Vadot }; 229*833e5d42SEmmanuel Vadot 230*833e5d42SEmmanuel Vadot apbcp: clock-controller@3b000 { 231*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908-apbcp"; 232*833e5d42SEmmanuel Vadot reg = <0x3b000 0x1000>; 233*833e5d42SEmmanuel Vadot #clock-cells = <1>; 234*833e5d42SEmmanuel Vadot }; 235*833e5d42SEmmanuel Vadot 236*833e5d42SEmmanuel Vadot mpmu: clock-controller@50000 { 237*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908-mpmu"; 238*833e5d42SEmmanuel Vadot reg = <0x50000 0x1000>; 239*833e5d42SEmmanuel Vadot #clock-cells = <1>; 240*833e5d42SEmmanuel Vadot }; 241*833e5d42SEmmanuel Vadot }; 242*833e5d42SEmmanuel Vadot 243*833e5d42SEmmanuel Vadot axi@d4200000 { 244*833e5d42SEmmanuel Vadot compatible = "simple-bus"; 245*833e5d42SEmmanuel Vadot reg = <0 0xd4200000 0 0x200000>; 246*833e5d42SEmmanuel Vadot #address-cells = <1>; 247*833e5d42SEmmanuel Vadot #size-cells = <1>; 248*833e5d42SEmmanuel Vadot ranges = <0 0 0xd4200000 0x200000>; 249*833e5d42SEmmanuel Vadot 250*833e5d42SEmmanuel Vadot usbphy: phy@7000 { 251*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1928-usb-phy"; 252*833e5d42SEmmanuel Vadot reg = <0x7000 0x200>; 253*833e5d42SEmmanuel Vadot clocks = <&apmu PXA1908_CLK_USB>; 254*833e5d42SEmmanuel Vadot #phy-cells = <0>; 255*833e5d42SEmmanuel Vadot }; 256*833e5d42SEmmanuel Vadot 257*833e5d42SEmmanuel Vadot usb: usb@8000 { 258*833e5d42SEmmanuel Vadot compatible = "chipidea,usb2"; 259*833e5d42SEmmanuel Vadot reg = <0x8000 0x200>; 260*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 261*833e5d42SEmmanuel Vadot clocks = <&apmu PXA1908_CLK_USB>; 262*833e5d42SEmmanuel Vadot phys = <&usbphy>; 263*833e5d42SEmmanuel Vadot phy-names = "usb-phy"; 264*833e5d42SEmmanuel Vadot }; 265*833e5d42SEmmanuel Vadot 266*833e5d42SEmmanuel Vadot sdh0: mmc@80000 { 267*833e5d42SEmmanuel Vadot compatible = "mrvl,pxav3-mmc"; 268*833e5d42SEmmanuel Vadot reg = <0x80000 0x120>; 269*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 270*833e5d42SEmmanuel Vadot clocks = <&apmu PXA1908_CLK_SDH0>; 271*833e5d42SEmmanuel Vadot clock-names = "io"; 272*833e5d42SEmmanuel Vadot mrvl,clk-delay-cycles = <31>; 273*833e5d42SEmmanuel Vadot }; 274*833e5d42SEmmanuel Vadot 275*833e5d42SEmmanuel Vadot sdh1: mmc@80800 { 276*833e5d42SEmmanuel Vadot compatible = "mrvl,pxav3-mmc"; 277*833e5d42SEmmanuel Vadot reg = <0x80800 0x120>; 278*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 279*833e5d42SEmmanuel Vadot clocks = <&apmu PXA1908_CLK_SDH1>; 280*833e5d42SEmmanuel Vadot clock-names = "io"; 281*833e5d42SEmmanuel Vadot mrvl,clk-delay-cycles = <31>; 282*833e5d42SEmmanuel Vadot }; 283*833e5d42SEmmanuel Vadot 284*833e5d42SEmmanuel Vadot sdh2: mmc@81000 { 285*833e5d42SEmmanuel Vadot compatible = "mrvl,pxav3-mmc"; 286*833e5d42SEmmanuel Vadot reg = <0x81000 0x120>; 287*833e5d42SEmmanuel Vadot interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; 288*833e5d42SEmmanuel Vadot clocks = <&apmu PXA1908_CLK_SDH2>; 289*833e5d42SEmmanuel Vadot clock-names = "io"; 290*833e5d42SEmmanuel Vadot mrvl,clk-delay-cycles = <31>; 291*833e5d42SEmmanuel Vadot }; 292*833e5d42SEmmanuel Vadot 293*833e5d42SEmmanuel Vadot apmu: clock-controller@82800 { 294*833e5d42SEmmanuel Vadot compatible = "marvell,pxa1908-apmu"; 295*833e5d42SEmmanuel Vadot reg = <0x82800 0x400>; 296*833e5d42SEmmanuel Vadot #clock-cells = <1>; 297*833e5d42SEmmanuel Vadot }; 298*833e5d42SEmmanuel Vadot }; 299*833e5d42SEmmanuel Vadot }; 300*833e5d42SEmmanuel Vadot}; 301