1*354d7675SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*354d7675SEmmanuel Vadot/* 3*354d7675SEmmanuel Vadot * Copyright (C) 2020 Marvell International Ltd. 4*354d7675SEmmanuel Vadot * 5*354d7675SEmmanuel Vadot * Device tree for the CN9131-DB board (setup "B"). 6*354d7675SEmmanuel Vadot */ 7*354d7675SEmmanuel Vadot 8*354d7675SEmmanuel Vadot#include "cn9131-db.dtsi" 9*354d7675SEmmanuel Vadot 10*354d7675SEmmanuel Vadot/ { 11*354d7675SEmmanuel Vadot model = "Marvell Armada CN9131-DB setup B"; 12*354d7675SEmmanuel Vadot}; 13*354d7675SEmmanuel Vadot 14*354d7675SEmmanuel Vadot/* Setup B has NAND flash as a boot device, while regular setup uses SPI flash. 15*354d7675SEmmanuel Vadot * Since CP0 SPI1 and CP0 NAND are sharing some pins, they cannot be activated 16*354d7675SEmmanuel Vadot * simultaneously. When NAND controller is enabled, SPI1 should be disabled. 17*354d7675SEmmanuel Vadot */ 18*354d7675SEmmanuel Vadot 19*354d7675SEmmanuel Vadot&cp0_nand_controller { 20*354d7675SEmmanuel Vadot status = "okay"; 21*354d7675SEmmanuel Vadot}; 22*354d7675SEmmanuel Vadot 23