1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright (C) 2016 Marvell Technology Group Ltd. 4 * 5 * Device Tree file for the Armada 8040 SoC, made of an AP806 Quad and 6 * two CP110. 7 */ 8 9#include "armada-ap806-quad.dtsi" 10#include "armada-80x0.dtsi" 11 12/ { 13 model = "Marvell Armada 8040"; 14 compatible = "marvell,armada8040", "marvell,armada-ap806-quad", 15 "marvell,armada-ap806"; 16}; 17 18&smmu { 19 status = "okay"; 20}; 21 22&cp0_pcie0 { 23 iommu-map = 24 <0x0 &smmu 0x480 0x20>, 25 <0x100 &smmu 0x4a0 0x20>, 26 <0x200 &smmu 0x4c0 0x20>; 27 iommu-map-mask = <0x031f>; 28}; 29 30/* The RTC requires external oscillator. But on Aramda 80x0, the RTC clock 31 * in CP master is not connected (by package) to the oscillator. So 32 * disable it. However, the RTC clock in CP slave is connected to the 33 * oscillator so this one is let enabled. 34 */ 35&cp0_rtc { 36 status = "disabled"; 37}; 38 39&cp0_sata0 { 40 iommus = <&smmu 0x444>; 41}; 42 43&cp0_sdhci0 { 44 iommus = <&smmu 0x445>; 45}; 46 47&cp0_usb3_0 { 48 iommus = <&smmu 0x440>; 49}; 50 51&cp0_usb3_1 { 52 iommus = <&smmu 0x441>; 53}; 54 55&cp1_sata0 { 56 iommus = <&smmu 0x454>; 57}; 58 59&cp1_usb3_0 { 60 iommus = <&smmu 0x450>; 61}; 62 63&cp1_usb3_1 { 64 iommus = <&smmu 0x451>; 65}; 66