1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for CZ.NIC Turris Mox Board 4 * 2019 by Marek Behún <kabel@kernel.org> 5 */ 6 7/dts-v1/; 8 9#include <dt-bindings/bus/moxtet.h> 10#include <dt-bindings/gpio/gpio.h> 11#include <dt-bindings/input/input.h> 12#include "armada-372x.dtsi" 13 14/ { 15 model = "CZ.NIC Turris Mox Board"; 16 compatible = "cznic,turris-mox", "marvell,armada3720", 17 "marvell,armada3700"; 18 19 aliases { 20 spi0 = &spi0; 21 ethernet0 = ð0; 22 ethernet1 = ð1; 23 mmc0 = &sdhci0; 24 mmc1 = &sdhci1; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 memory@0 { 32 device_type = "memory"; 33 reg = <0x00000000 0x00000000 0x00000000 0x20000000>; 34 }; 35 36 leds { 37 compatible = "gpio-leds"; 38 led { 39 label = "mox:red:activity"; 40 gpios = <&gpiosb 21 GPIO_ACTIVE_LOW>; 41 linux,default-trigger = "default-on"; 42 }; 43 }; 44 45 gpio-keys { 46 compatible = "gpio-keys"; 47 48 key-reset { 49 label = "reset"; 50 linux,code = <KEY_RESTART>; 51 gpios = <&gpiosb 20 GPIO_ACTIVE_LOW>; 52 debounce-interval = <60>; 53 }; 54 }; 55 56 exp_usb3_vbus: usb3-vbus { 57 compatible = "regulator-fixed"; 58 regulator-name = "usb3-vbus"; 59 regulator-min-microvolt = <5000000>; 60 regulator-max-microvolt = <5000000>; 61 enable-active-high; 62 regulator-always-on; 63 gpio = <&gpiosb 0 GPIO_ACTIVE_HIGH>; 64 }; 65 66 vsdc_reg: vsdc-reg { 67 compatible = "regulator-gpio"; 68 regulator-name = "vsdc"; 69 regulator-min-microvolt = <1800000>; 70 regulator-max-microvolt = <3300000>; 71 regulator-boot-on; 72 73 gpios = <&gpiosb 23 GPIO_ACTIVE_HIGH>; 74 gpios-states = <0>; 75 states = <1800000 0x1 76 3300000 0x0>; 77 enable-active-high; 78 }; 79 80 vsdio_reg: vsdio-reg { 81 compatible = "regulator-gpio"; 82 regulator-name = "vsdio"; 83 regulator-min-microvolt = <1800000>; 84 regulator-max-microvolt = <3300000>; 85 regulator-boot-on; 86 87 gpios = <&gpiosb 22 GPIO_ACTIVE_HIGH>; 88 gpios-states = <0>; 89 states = <1800000 0x1 90 3300000 0x0>; 91 enable-active-high; 92 }; 93 94 sdhci1_pwrseq: sdhci1-pwrseq { 95 compatible = "mmc-pwrseq-simple"; 96 reset-gpios = <&gpionb 19 GPIO_ACTIVE_HIGH>; 97 status = "okay"; 98 }; 99 100 sfp: sfp { 101 compatible = "sff,sfp"; 102 i2c-bus = <&i2c0>; 103 los-gpios = <&moxtet_sfp 0 GPIO_ACTIVE_HIGH>; 104 tx-fault-gpios = <&moxtet_sfp 1 GPIO_ACTIVE_HIGH>; 105 mod-def0-gpios = <&moxtet_sfp 2 GPIO_ACTIVE_LOW>; 106 tx-disable-gpios = <&moxtet_sfp 4 GPIO_ACTIVE_HIGH>; 107 rate-select0-gpios = <&moxtet_sfp 5 GPIO_ACTIVE_HIGH>; 108 maximum-power-milliwatt = <3000>; 109 110 /* enabled by U-Boot if SFP module is present */ 111 status = "disabled"; 112 }; 113 114 firmware { 115 armada-3700-rwtm { 116 compatible = "marvell,armada-3700-rwtm-firmware", "cznic,turris-mox-rwtm"; 117 }; 118 }; 119}; 120 121&i2c0 { 122 pinctrl-names = "default"; 123 pinctrl-0 = <&i2c1_pins>; 124 clock-frequency = <100000>; 125 /delete-property/ mrvl,i2c-fast-mode; 126 status = "okay"; 127 128 /* MCP7940MT-I/MNY RTC */ 129 rtc@6f { 130 compatible = "microchip,mcp7940x"; 131 reg = <0x6f>; 132 interrupt-parent = <&gpiosb>; 133 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; /* GPIO2_5 */ 134 }; 135}; 136 137&pcie0 { 138 pinctrl-names = "default"; 139 pinctrl-0 = <&pcie_reset_pins &pcie_clkreq_pins>; 140 status = "okay"; 141 reset-gpios = <&gpiosb 3 GPIO_ACTIVE_LOW>; 142 slot-power-limit-milliwatt = <10000>; 143 /* 144 * U-Boot port for Turris Mox has a bug which always expects that "ranges" DT property 145 * contains exactly 2 ranges with 3 (child) address cells, 2 (parent) address cells and 146 * 2 size cells and also expects that the second range starts at 16 MB offset. Also it 147 * expects that first range uses same address for PCI (child) and CPU (parent) cells (so 148 * no remapping) and that this address is the lowest from all specified ranges. If these 149 * conditions are not met then U-Boot crashes during loading kernel DTB file. PCIe address 150 * space is 128 MB long, so the best split between MEM and IO is to use fixed 16 MB window 151 * for IO and the rest 112 MB (64+32+16) for MEM, despite that maximal IO size is just 64 kB. 152 * This bug is not present in U-Boot ports for other Armada 3700 devices and is fixed in 153 * U-Boot version 2021.07. See relevant U-Boot commits (the last one contains fix): 154 * https://source.denx.de/u-boot/u-boot/-/commit/cb2ddb291ee6fcbddd6d8f4ff49089dfe580f5d7 155 * https://source.denx.de/u-boot/u-boot/-/commit/c64ac3b3185aeb3846297ad7391fc6df8ecd73bf 156 * https://source.denx.de/u-boot/u-boot/-/commit/4a82fca8e330157081fc132a591ebd99ba02ee33 157 * Bug related to requirement of same child and parent addresses for first range is fixed 158 * in U-Boot version 2022.04 by following commit: 159 * https://source.denx.de/u-boot/u-boot/-/commit/1fd54253bca7d43d046bba4853fe5fafd034bc17 160 */ 161 #address-cells = <3>; 162 #size-cells = <2>; 163 ranges = <0x81000000 0 0xe8000000 0 0xe8000000 0 0x01000000 /* Port 0 IO */ 164 0x82000000 0 0xe9000000 0 0xe9000000 0 0x07000000>; /* Port 0 MEM */ 165 166 /* enabled by U-Boot if PCIe module is present */ 167 status = "disabled"; 168}; 169 170&uart0 { 171 status = "okay"; 172}; 173 174ð0 { 175 pinctrl-names = "default"; 176 pinctrl-0 = <&rgmii_pins>; 177 phy-mode = "rgmii-id"; 178 phy-handle = <&phy1>; 179 status = "okay"; 180}; 181 182ð1 { 183 phy-mode = "2500base-x"; 184 managed = "in-band-status"; 185 phys = <&comphy0 1>; 186}; 187 188&sdhci0 { 189 wp-inverted; 190 bus-width = <4>; 191 cd-gpios = <&gpionb 10 GPIO_ACTIVE_HIGH>; 192 vqmmc-supply = <&vsdc_reg>; 193 marvell,pad-type = "sd"; 194 status = "okay"; 195}; 196 197&sdhci1 { 198 pinctrl-names = "default"; 199 pinctrl-0 = <&sdio_pins>; 200 non-removable; 201 bus-width = <4>; 202 marvell,pad-type = "sd"; 203 vqmmc-supply = <&vsdio_reg>; 204 mmc-pwrseq = <&sdhci1_pwrseq>; 205 /* forbid SDR104 for FCC purposes */ 206 sdhci-caps-mask = <0x2 0x0>; 207 status = "okay"; 208}; 209 210&spi0 { 211 status = "okay"; 212 pinctrl-names = "default"; 213 pinctrl-0 = <&spi_quad_pins &spi_cs1_pins>; 214 assigned-clocks = <&nb_periph_clk 7>; 215 assigned-clock-parents = <&tbg 1>; 216 assigned-clock-rates = <20000000>; 217 218 flash@0 { 219 #address-cells = <1>; 220 #size-cells = <1>; 221 compatible = "jedec,spi-nor"; 222 reg = <0>; 223 spi-max-frequency = <20000000>; 224 225 partitions { 226 compatible = "fixed-partitions"; 227 #address-cells = <1>; 228 #size-cells = <1>; 229 230 partition@0 { 231 label = "secure-firmware"; 232 reg = <0x0 0x20000>; 233 }; 234 235 partition@20000 { 236 label = "a53-firmware"; 237 reg = <0x20000 0x160000>; 238 }; 239 240 partition@180000 { 241 label = "u-boot-env"; 242 reg = <0x180000 0x10000>; 243 }; 244 245 partition@190000 { 246 label = "Rescue system"; 247 reg = <0x190000 0x660000>; 248 }; 249 250 partition@7f0000 { 251 label = "dtb"; 252 reg = <0x7f0000 0x10000>; 253 }; 254 }; 255 }; 256 257 moxtet: moxtet@1 { 258 #address-cells = <1>; 259 #size-cells = <0>; 260 compatible = "cznic,moxtet"; 261 reg = <1>; 262 reset-gpios = <&gpiosb 2 GPIO_ACTIVE_LOW>; 263 spi-max-frequency = <10000000>; 264 spi-cpol; 265 spi-cpha; 266 interrupt-controller; 267 #interrupt-cells = <1>; 268 interrupt-parent = <&gpiosb>; 269 interrupts = <5 IRQ_TYPE_EDGE_FALLING>; 270 status = "okay"; 271 272 moxtet_sfp: gpio@0 { 273 compatible = "cznic,moxtet-gpio"; 274 gpio-controller; 275 #gpio-cells = <2>; 276 reg = <0>; 277 status = "disabled"; 278 }; 279 }; 280}; 281 282&usb2 { 283 status = "okay"; 284}; 285 286&comphy2 { 287 connector { 288 compatible = "usb-a-connector"; 289 phy-supply = <&exp_usb3_vbus>; 290 }; 291}; 292 293&usb3 { 294 status = "okay"; 295 phys = <&comphy2 0>; 296}; 297 298&mdio { 299 pinctrl-names = "default"; 300 pinctrl-0 = <&smi_pins>; 301 status = "okay"; 302 303 phy1: ethernet-phy@1 { 304 reg = <1>; 305 }; 306 307 /* 308 * NOTE: switch nodes are enabled by U-Boot if modules are present 309 * DO NOT change this node name (switch0@10) even if it is not following 310 * conventions! Deployed U-Boot binaries are explicitly looking for 311 * this node in order to augment the device tree! 312 * Also do not touch the "ports" or "port@n" nodes. These are also ABI. 313 */ 314 switch0@10 { 315 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; 316 reg = <0x10>; 317 dsa,member = <0 0>; 318 interrupt-parent = <&moxtet>; 319 interrupts = <MOXTET_IRQ_PERIDOT(0)>; 320 status = "disabled"; 321 322 mdio { 323 #address-cells = <1>; 324 #size-cells = <0>; 325 326 switch0phy1: ethernet-phy@1 { 327 reg = <0x1>; 328 }; 329 330 switch0phy2: ethernet-phy@2 { 331 reg = <0x2>; 332 }; 333 334 switch0phy3: ethernet-phy@3 { 335 reg = <0x3>; 336 }; 337 338 switch0phy4: ethernet-phy@4 { 339 reg = <0x4>; 340 }; 341 342 switch0phy5: ethernet-phy@5 { 343 reg = <0x5>; 344 }; 345 346 switch0phy6: ethernet-phy@6 { 347 reg = <0x6>; 348 }; 349 350 switch0phy7: ethernet-phy@7 { 351 reg = <0x7>; 352 }; 353 354 switch0phy8: ethernet-phy@8 { 355 reg = <0x8>; 356 }; 357 }; 358 359 ports { 360 #address-cells = <1>; 361 #size-cells = <0>; 362 363 port@1 { 364 reg = <0x1>; 365 label = "lan1"; 366 phy-handle = <&switch0phy1>; 367 }; 368 369 port@2 { 370 reg = <0x2>; 371 label = "lan2"; 372 phy-handle = <&switch0phy2>; 373 }; 374 375 port@3 { 376 reg = <0x3>; 377 label = "lan3"; 378 phy-handle = <&switch0phy3>; 379 }; 380 381 port@4 { 382 reg = <0x4>; 383 label = "lan4"; 384 phy-handle = <&switch0phy4>; 385 }; 386 387 port@5 { 388 reg = <0x5>; 389 label = "lan5"; 390 phy-handle = <&switch0phy5>; 391 }; 392 393 port@6 { 394 reg = <0x6>; 395 label = "lan6"; 396 phy-handle = <&switch0phy6>; 397 }; 398 399 port@7 { 400 reg = <0x7>; 401 label = "lan7"; 402 phy-handle = <&switch0phy7>; 403 }; 404 405 port@8 { 406 reg = <0x8>; 407 label = "lan8"; 408 phy-handle = <&switch0phy8>; 409 }; 410 411 port@9 { 412 reg = <0x9>; 413 label = "cpu"; 414 ethernet = <ð1>; 415 phy-mode = "2500base-x"; 416 managed = "in-band-status"; 417 }; 418 419 switch0port10: port@a { 420 reg = <0xa>; 421 label = "dsa"; 422 phy-mode = "2500base-x"; 423 managed = "in-band-status"; 424 link = <&switch1port9 &switch2port9>; 425 status = "disabled"; 426 }; 427 428 port-sfp@a { 429 reg = <0xa>; 430 label = "sfp"; 431 sfp = <&sfp>; 432 phy-mode = "sgmii"; 433 managed = "in-band-status"; 434 status = "disabled"; 435 }; 436 }; 437 }; 438 439 /* NOTE: this node name is ABI, don't change it! */ 440 switch0@2 { 441 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; 442 reg = <0x2>; 443 dsa,member = <0 0>; 444 interrupt-parent = <&moxtet>; 445 interrupts = <MOXTET_IRQ_TOPAZ>; 446 status = "disabled"; 447 448 mdio { 449 #address-cells = <1>; 450 #size-cells = <0>; 451 452 switch0phy1_topaz: ethernet-phy@11 { 453 reg = <0x11>; 454 }; 455 456 switch0phy2_topaz: ethernet-phy@12 { 457 reg = <0x12>; 458 }; 459 460 switch0phy3_topaz: ethernet-phy@13 { 461 reg = <0x13>; 462 }; 463 464 switch0phy4_topaz: ethernet-phy@14 { 465 reg = <0x14>; 466 }; 467 }; 468 469 ports { 470 #address-cells = <1>; 471 #size-cells = <0>; 472 473 port@1 { 474 reg = <0x1>; 475 label = "lan1"; 476 phy-handle = <&switch0phy1_topaz>; 477 }; 478 479 port@2 { 480 reg = <0x2>; 481 label = "lan2"; 482 phy-handle = <&switch0phy2_topaz>; 483 }; 484 485 port@3 { 486 reg = <0x3>; 487 label = "lan3"; 488 phy-handle = <&switch0phy3_topaz>; 489 }; 490 491 port@4 { 492 reg = <0x4>; 493 label = "lan4"; 494 phy-handle = <&switch0phy4_topaz>; 495 }; 496 497 port@5 { 498 reg = <0x5>; 499 label = "cpu"; 500 phy-mode = "2500base-x"; 501 managed = "in-band-status"; 502 ethernet = <ð1>; 503 }; 504 }; 505 }; 506 507 /* NOTE: this node name is ABI, don't change it! */ 508 switch1@11 { 509 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; 510 reg = <0x11>; 511 dsa,member = <0 1>; 512 interrupt-parent = <&moxtet>; 513 interrupts = <MOXTET_IRQ_PERIDOT(1)>; 514 status = "disabled"; 515 516 mdio { 517 #address-cells = <1>; 518 #size-cells = <0>; 519 520 switch1phy1: ethernet-phy@1 { 521 reg = <0x1>; 522 }; 523 524 switch1phy2: ethernet-phy@2 { 525 reg = <0x2>; 526 }; 527 528 switch1phy3: ethernet-phy@3 { 529 reg = <0x3>; 530 }; 531 532 switch1phy4: ethernet-phy@4 { 533 reg = <0x4>; 534 }; 535 536 switch1phy5: ethernet-phy@5 { 537 reg = <0x5>; 538 }; 539 540 switch1phy6: ethernet-phy@6 { 541 reg = <0x6>; 542 }; 543 544 switch1phy7: ethernet-phy@7 { 545 reg = <0x7>; 546 }; 547 548 switch1phy8: ethernet-phy@8 { 549 reg = <0x8>; 550 }; 551 }; 552 553 ports { 554 #address-cells = <1>; 555 #size-cells = <0>; 556 557 port@1 { 558 reg = <0x1>; 559 label = "lan9"; 560 phy-handle = <&switch1phy1>; 561 }; 562 563 port@2 { 564 reg = <0x2>; 565 label = "lan10"; 566 phy-handle = <&switch1phy2>; 567 }; 568 569 port@3 { 570 reg = <0x3>; 571 label = "lan11"; 572 phy-handle = <&switch1phy3>; 573 }; 574 575 port@4 { 576 reg = <0x4>; 577 label = "lan12"; 578 phy-handle = <&switch1phy4>; 579 }; 580 581 port@5 { 582 reg = <0x5>; 583 label = "lan13"; 584 phy-handle = <&switch1phy5>; 585 }; 586 587 port@6 { 588 reg = <0x6>; 589 label = "lan14"; 590 phy-handle = <&switch1phy6>; 591 }; 592 593 port@7 { 594 reg = <0x7>; 595 label = "lan15"; 596 phy-handle = <&switch1phy7>; 597 }; 598 599 port@8 { 600 reg = <0x8>; 601 label = "lan16"; 602 phy-handle = <&switch1phy8>; 603 }; 604 605 switch1port9: port@9 { 606 reg = <0x9>; 607 label = "dsa"; 608 phy-mode = "2500base-x"; 609 managed = "in-band-status"; 610 link = <&switch0port10>; 611 }; 612 613 switch1port10: port@a { 614 reg = <0xa>; 615 label = "dsa"; 616 phy-mode = "2500base-x"; 617 managed = "in-band-status"; 618 link = <&switch2port9>; 619 status = "disabled"; 620 }; 621 622 port-sfp@a { 623 reg = <0xa>; 624 label = "sfp"; 625 sfp = <&sfp>; 626 phy-mode = "sgmii"; 627 managed = "in-band-status"; 628 status = "disabled"; 629 }; 630 }; 631 }; 632 633 /* NOTE: this node name is ABI, don't change it! */ 634 switch1@2 { 635 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; 636 reg = <0x2>; 637 dsa,member = <0 1>; 638 interrupt-parent = <&moxtet>; 639 interrupts = <MOXTET_IRQ_TOPAZ>; 640 status = "disabled"; 641 642 mdio { 643 #address-cells = <1>; 644 #size-cells = <0>; 645 646 switch1phy1_topaz: ethernet-phy@11 { 647 reg = <0x11>; 648 }; 649 650 switch1phy2_topaz: ethernet-phy@12 { 651 reg = <0x12>; 652 }; 653 654 switch1phy3_topaz: ethernet-phy@13 { 655 reg = <0x13>; 656 }; 657 658 switch1phy4_topaz: ethernet-phy@14 { 659 reg = <0x14>; 660 }; 661 }; 662 663 ports { 664 #address-cells = <1>; 665 #size-cells = <0>; 666 667 port@1 { 668 reg = <0x1>; 669 label = "lan9"; 670 phy-handle = <&switch1phy1_topaz>; 671 }; 672 673 port@2 { 674 reg = <0x2>; 675 label = "lan10"; 676 phy-handle = <&switch1phy2_topaz>; 677 }; 678 679 port@3 { 680 reg = <0x3>; 681 label = "lan11"; 682 phy-handle = <&switch1phy3_topaz>; 683 }; 684 685 port@4 { 686 reg = <0x4>; 687 label = "lan12"; 688 phy-handle = <&switch1phy4_topaz>; 689 }; 690 691 port@5 { 692 reg = <0x5>; 693 label = "dsa"; 694 phy-mode = "2500base-x"; 695 managed = "in-band-status"; 696 link = <&switch0port10>; 697 }; 698 }; 699 }; 700 701 /* NOTE: this node name is ABI, don't change it! */ 702 switch2@12 { 703 compatible = "marvell,turris-mox-mv88e6190", "marvell,mv88e6190"; 704 reg = <0x12>; 705 dsa,member = <0 2>; 706 interrupt-parent = <&moxtet>; 707 interrupts = <MOXTET_IRQ_PERIDOT(2)>; 708 status = "disabled"; 709 710 mdio { 711 #address-cells = <1>; 712 #size-cells = <0>; 713 714 switch2phy1: ethernet-phy@1 { 715 reg = <0x1>; 716 }; 717 718 switch2phy2: ethernet-phy@2 { 719 reg = <0x2>; 720 }; 721 722 switch2phy3: ethernet-phy@3 { 723 reg = <0x3>; 724 }; 725 726 switch2phy4: ethernet-phy@4 { 727 reg = <0x4>; 728 }; 729 730 switch2phy5: ethernet-phy@5 { 731 reg = <0x5>; 732 }; 733 734 switch2phy6: ethernet-phy@6 { 735 reg = <0x6>; 736 }; 737 738 switch2phy7: ethernet-phy@7 { 739 reg = <0x7>; 740 }; 741 742 switch2phy8: ethernet-phy@8 { 743 reg = <0x8>; 744 }; 745 }; 746 747 ports { 748 #address-cells = <1>; 749 #size-cells = <0>; 750 751 port@1 { 752 reg = <0x1>; 753 label = "lan17"; 754 phy-handle = <&switch2phy1>; 755 }; 756 757 port@2 { 758 reg = <0x2>; 759 label = "lan18"; 760 phy-handle = <&switch2phy2>; 761 }; 762 763 port@3 { 764 reg = <0x3>; 765 label = "lan19"; 766 phy-handle = <&switch2phy3>; 767 }; 768 769 port@4 { 770 reg = <0x4>; 771 label = "lan20"; 772 phy-handle = <&switch2phy4>; 773 }; 774 775 port@5 { 776 reg = <0x5>; 777 label = "lan21"; 778 phy-handle = <&switch2phy5>; 779 }; 780 781 port@6 { 782 reg = <0x6>; 783 label = "lan22"; 784 phy-handle = <&switch2phy6>; 785 }; 786 787 port@7 { 788 reg = <0x7>; 789 label = "lan23"; 790 phy-handle = <&switch2phy7>; 791 }; 792 793 port@8 { 794 reg = <0x8>; 795 label = "lan24"; 796 phy-handle = <&switch2phy8>; 797 }; 798 799 switch2port9: port@9 { 800 reg = <0x9>; 801 label = "dsa"; 802 phy-mode = "2500base-x"; 803 managed = "in-band-status"; 804 link = <&switch1port10 &switch0port10>; 805 }; 806 807 port-sfp@a { 808 reg = <0xa>; 809 label = "sfp"; 810 sfp = <&sfp>; 811 phy-mode = "sgmii"; 812 managed = "in-band-status"; 813 status = "disabled"; 814 }; 815 }; 816 }; 817 818 /* NOTE: this node name is ABI, don't change it! */ 819 switch2@2 { 820 compatible = "marvell,turris-mox-mv88e6085", "marvell,mv88e6085"; 821 reg = <0x2>; 822 dsa,member = <0 2>; 823 interrupt-parent = <&moxtet>; 824 interrupts = <MOXTET_IRQ_TOPAZ>; 825 status = "disabled"; 826 827 mdio { 828 #address-cells = <1>; 829 #size-cells = <0>; 830 831 switch2phy1_topaz: ethernet-phy@11 { 832 reg = <0x11>; 833 }; 834 835 switch2phy2_topaz: ethernet-phy@12 { 836 reg = <0x12>; 837 }; 838 839 switch2phy3_topaz: ethernet-phy@13 { 840 reg = <0x13>; 841 }; 842 843 switch2phy4_topaz: ethernet-phy@14 { 844 reg = <0x14>; 845 }; 846 }; 847 848 ports { 849 #address-cells = <1>; 850 #size-cells = <0>; 851 852 port@1 { 853 reg = <0x1>; 854 label = "lan17"; 855 phy-handle = <&switch2phy1_topaz>; 856 }; 857 858 port@2 { 859 reg = <0x2>; 860 label = "lan18"; 861 phy-handle = <&switch2phy2_topaz>; 862 }; 863 864 port@3 { 865 reg = <0x3>; 866 label = "lan19"; 867 phy-handle = <&switch2phy3_topaz>; 868 }; 869 870 port@4 { 871 reg = <0x4>; 872 label = "lan20"; 873 phy-handle = <&switch2phy4_topaz>; 874 }; 875 876 port@5 { 877 reg = <0x5>; 878 label = "dsa"; 879 phy-mode = "2500base-x"; 880 managed = "in-band-status"; 881 link = <&switch1port10 &switch0port10>; 882 }; 883 }; 884 }; 885}; 886