1*e67e8565SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*e67e8565SEmmanuel Vadot/* 3*e67e8565SEmmanuel Vadot * Copyright 2021 NXP 4*e67e8565SEmmanuel Vadot */ 5*e67e8565SEmmanuel Vadot 6*e67e8565SEmmanuel Vadot/dts-v1/; 7*e67e8565SEmmanuel Vadot 8*e67e8565SEmmanuel Vadot#include "imx8ulp.dtsi" 9*e67e8565SEmmanuel Vadot 10*e67e8565SEmmanuel Vadot/ { 11*e67e8565SEmmanuel Vadot model = "NXP i.MX8ULP EVK"; 12*e67e8565SEmmanuel Vadot compatible = "fsl,imx8ulp-evk", "fsl,imx8ulp"; 13*e67e8565SEmmanuel Vadot 14*e67e8565SEmmanuel Vadot chosen { 15*e67e8565SEmmanuel Vadot stdout-path = &lpuart5; 16*e67e8565SEmmanuel Vadot }; 17*e67e8565SEmmanuel Vadot 18*e67e8565SEmmanuel Vadot memory@80000000 { 19*e67e8565SEmmanuel Vadot device_type = "memory"; 20*e67e8565SEmmanuel Vadot reg = <0x0 0x80000000 0 0x80000000>; 21*e67e8565SEmmanuel Vadot }; 22*e67e8565SEmmanuel Vadot}; 23*e67e8565SEmmanuel Vadot 24*e67e8565SEmmanuel Vadot&lpuart5 { 25*e67e8565SEmmanuel Vadot /* console */ 26*e67e8565SEmmanuel Vadot pinctrl-names = "default", "sleep"; 27*e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_lpuart5>; 28*e67e8565SEmmanuel Vadot pinctrl-1 = <&pinctrl_lpuart5>; 29*e67e8565SEmmanuel Vadot status = "okay"; 30*e67e8565SEmmanuel Vadot}; 31*e67e8565SEmmanuel Vadot 32*e67e8565SEmmanuel Vadot&usdhc0 { 33*e67e8565SEmmanuel Vadot pinctrl-names = "default", "sleep"; 34*e67e8565SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc0>; 35*e67e8565SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc0>; 36*e67e8565SEmmanuel Vadot non-removable; 37*e67e8565SEmmanuel Vadot bus-width = <8>; 38*e67e8565SEmmanuel Vadot status = "okay"; 39*e67e8565SEmmanuel Vadot}; 40*e67e8565SEmmanuel Vadot 41*e67e8565SEmmanuel Vadot&iomuxc1 { 42*e67e8565SEmmanuel Vadot pinctrl_lpuart5: lpuart5grp { 43*e67e8565SEmmanuel Vadot fsl,pins = < 44*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTF14__LPUART5_TX 0x3 45*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTF15__LPUART5_RX 0x3 46*e67e8565SEmmanuel Vadot >; 47*e67e8565SEmmanuel Vadot }; 48*e67e8565SEmmanuel Vadot 49*e67e8565SEmmanuel Vadot pinctrl_usdhc0: usdhc0grp { 50*e67e8565SEmmanuel Vadot fsl,pins = < 51*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD1__SDHC0_CMD 0x43 52*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD2__SDHC0_CLK 0x10042 53*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD10__SDHC0_D0 0x43 54*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD9__SDHC0_D1 0x43 55*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD8__SDHC0_D2 0x43 56*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD7__SDHC0_D3 0x43 57*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD6__SDHC0_D4 0x43 58*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD5__SDHC0_D5 0x43 59*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD4__SDHC0_D6 0x43 60*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD3__SDHC0_D7 0x43 61*e67e8565SEmmanuel Vadot MX8ULP_PAD_PTD11__SDHC0_DQS 0x10042 62*e67e8565SEmmanuel Vadot >; 63*e67e8565SEmmanuel Vadot }; 64*e67e8565SEmmanuel Vadot}; 65