xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8qm-apalis.dtsi (revision 5f4c09dd85bff675e0ca63c55ea3c517e0fddfcc) 
1// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
2/*
3 * Copyright 2022 Toradex
4 */
5
6#include "imx8qm-apalis-v1.1.dtsi"
7
8/ {
9	model = "Toradex Apalis iMX8QM";
10	compatible = "toradex,apalis-imx8",
11		     "fsl,imx8qm";
12};
13
14&ethphy0 {
15	interrupts = <5 IRQ_TYPE_LEVEL_LOW>;
16};
17
18/*
19 * Apalis iMX8QM V1.0 has PHY KSZ9031. the Micrel PHY driver
20 * doesn't support setting internal PHY delay for TXC line for
21 * this PHY model. Use delay on MAC side instead.
22 */
23&fec1 {
24	fsl,rgmii_txc_dly;
25	phy-mode = "rgmii-rxid";
26};
27
28/* TODO: Apalis HDMI1 */
29
30/* Apalis I2C2 (DDC) */
31&i2c0 {
32	pinctrl-names = "default";
33	pinctrl-0 = <&pinctrl_lpi2c0>;
34	#address-cells = <1>;
35	#size-cells = <0>;
36	clock-frequency = <100000>;
37};
38
39&lsio_gpio0 {
40	gpio-line-names = "MXM3_279",
41			  "MXM3_277",
42			  "MXM3_135",
43			  "MXM3_203",
44			  "MXM3_201",
45			  "MXM3_275",
46			  "MXM3_110",
47			  "MXM3_120",
48			  "MXM3_1/GPIO1",
49			  "MXM3_3/GPIO2",
50			  "MXM3_124",
51			  "MXM3_122",
52			  "MXM3_5/GPIO3",
53			  "MXM3_7/GPIO4",
54			  "",
55			  "",
56			  "MXM3_4",
57			  "MXM3_211",
58			  "MXM3_209",
59			  "MXM3_2",
60			  "MXM3_136",
61			  "MXM3_134",
62			  "MXM3_6",
63			  "MXM3_8",
64			  "MXM3_112",
65			  "MXM3_118",
66			  "MXM3_114",
67			  "MXM3_116";
68};
69
70&lsio_gpio1 {
71	gpio-line-names = "",
72			  "",
73			  "",
74			  "",
75			  "MXM3_286",
76			  "",
77			  "MXM3_87",
78			  "MXM3_99",
79			  "MXM3_138",
80			  "MXM3_140",
81			  "MXM3_239",
82			  "",
83			  "MXM3_281",
84			  "MXM3_283",
85			  "MXM3_126",
86			  "MXM3_132",
87			  "",
88			  "",
89			  "",
90			  "",
91			  "MXM3_173",
92			  "MXM3_175",
93			  "MXM3_123";
94};
95
96&lsio_gpio2 {
97	gpio-line-names = "",
98			  "",
99			  "",
100			  "",
101			  "",
102			  "",
103			  "",
104			  "MXM3_198",
105			  "MXM3_35",
106			  "MXM3_164",
107			  "",
108			  "",
109			  "",
110			  "",
111			  "MXM3_217",
112			  "MXM3_215",
113			  "",
114			  "",
115			  "MXM3_193",
116			  "MXM3_194",
117			  "MXM3_37",
118			  "",
119			  "MXM3_271",
120			  "MXM3_273",
121			  "MXM3_195",
122			  "MXM3_197",
123			  "MXM3_177",
124			  "MXM3_179",
125			  "MXM3_181",
126			  "MXM3_183",
127			  "MXM3_185",
128			  "MXM3_187";
129};
130
131&lsio_gpio3 {
132	gpio-line-names = "MXM3_191",
133			  "",
134			  "MXM3_221",
135			  "MXM3_225",
136			  "MXM3_223",
137			  "MXM3_227",
138			  "MXM3_200",
139			  "MXM3_235",
140			  "MXM3_231",
141			  "MXM3_229",
142			  "MXM3_233",
143			  "MXM3_204",
144			  "MXM3_196",
145			  "",
146			  "MXM3_202",
147			  "",
148			  "",
149			  "",
150			  "MXM3_305",
151			  "MXM3_307",
152			  "MXM3_309",
153			  "MXM3_311",
154			  "MXM3_315",
155			  "MXM3_317",
156			  "MXM3_319",
157			  "MXM3_321",
158			  "MXM3_15/GPIO7",
159			  "MXM3_63",
160			  "MXM3_17/GPIO8",
161			  "MXM3_12",
162			  "MXM3_14",
163			  "MXM3_16";
164};
165
166&lsio_gpio4 {
167	gpio-line-names = "MXM3_18",
168			  "MXM3_11/GPIO5",
169			  "MXM3_13/GPIO6",
170			  "MXM3_274",
171			  "MXM3_84",
172			  "MXM3_262",
173			  "MXM3_96",
174			  "",
175			  "",
176			  "",
177			  "",
178			  "",
179			  "MXM3_190",
180			  "",
181			  "",
182			  "",
183			  "MXM3_269",
184			  "MXM3_251",
185			  "MXM3_253",
186			  "MXM3_295",
187			  "MXM3_299",
188			  "MXM3_301",
189			  "MXM3_297",
190			  "MXM3_293",
191			  "MXM3_291",
192			  "MXM3_289",
193			  "MXM3_287";
194
195	/* Enable pcie root / sata ref clock unconditionally */
196	pcie-sata-hog {
197		gpios = <27 GPIO_ACTIVE_HIGH>;
198	};
199
200};
201
202&lsio_gpio5 {
203	gpio-line-names = "",
204			  "",
205			  "",
206			  "",
207			  "",
208			  "",
209			  "",
210			  "",
211			  "",
212			  "",
213			  "",
214			  "",
215			  "",
216			  "",
217			  "MXM3_150",
218			  "MXM3_160",
219			  "MXM3_162",
220			  "MXM3_144",
221			  "MXM3_146",
222			  "MXM3_148",
223			  "MXM3_152",
224			  "MXM3_156",
225			  "MXM3_158",
226			  "MXM3_159",
227			  "MXM3_184",
228			  "MXM3_180",
229			  "MXM3_186",
230			  "MXM3_188",
231			  "MXM3_176",
232			  "MXM3_178";
233};
234
235&lsio_gpio6 {
236	gpio-line-names = "",
237			  "",
238			  "",
239			  "",
240			  "",
241			  "",
242			  "",
243			  "",
244			  "",
245			  "",
246			  "MXM3_261",
247			  "MXM3_263",
248			  "MXM3_259",
249			  "MXM3_257",
250			  "MXM3_255",
251			  "MXM3_128",
252			  "MXM3_130",
253			  "MXM3_265",
254			  "MXM3_249",
255			  "MXM3_247",
256			  "MXM3_245",
257			  "MXM3_243";
258};
259
260&pinctrl_fec1 {
261	fsl,pins =
262		/* Use pads in 1.8V mode */
263		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
264		<IMX8QM_ENET0_MDC_CONN_ENET0_MDC				0x06000020>,
265		<IMX8QM_ENET0_MDIO_CONN_ENET0_MDIO				0x06000020>,
266		<IMX8QM_ENET0_RGMII_TX_CTL_CONN_ENET0_RGMII_TX_CTL		0x06000020>,
267		<IMX8QM_ENET0_RGMII_TXC_CONN_ENET0_RGMII_TXC			0x06000020>,
268		<IMX8QM_ENET0_RGMII_TXD0_CONN_ENET0_RGMII_TXD0			0x06000020>,
269		<IMX8QM_ENET0_RGMII_TXD1_CONN_ENET0_RGMII_TXD1			0x06000020>,
270		<IMX8QM_ENET0_RGMII_TXD2_CONN_ENET0_RGMII_TXD2			0x06000020>,
271		<IMX8QM_ENET0_RGMII_TXD3_CONN_ENET0_RGMII_TXD3			0x06000020>,
272		<IMX8QM_ENET0_RGMII_RXC_CONN_ENET0_RGMII_RXC			0x06000020>,
273		<IMX8QM_ENET0_RGMII_RX_CTL_CONN_ENET0_RGMII_RX_CTL		0x06000020>,
274		<IMX8QM_ENET0_RGMII_RXD0_CONN_ENET0_RGMII_RXD0			0x06000020>,
275		<IMX8QM_ENET0_RGMII_RXD1_CONN_ENET0_RGMII_RXD1			0x06000020>,
276		<IMX8QM_ENET0_RGMII_RXD2_CONN_ENET0_RGMII_RXD2			0x06000020>,
277		<IMX8QM_ENET0_RGMII_RXD3_CONN_ENET0_RGMII_RXD3			0x06000020>,
278		<IMX8QM_ENET0_REFCLK_125M_25M_CONN_ENET0_REFCLK_125M_25M	0x06000020>,
279		/* On-module ETH_RESET# */
280		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x06000020>,
281		/* On-module ETH_INT# */
282		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000060>;
283};
284
285&pinctrl_fec1_sleep {
286	fsl,pins =
287		<IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB_PAD			0x000014a0>,
288		<IMX8QM_ENET0_MDC_LSIO_GPIO4_IO14				0x04000040>,
289		<IMX8QM_ENET0_MDIO_LSIO_GPIO4_IO13				0x04000040>,
290		<IMX8QM_ENET0_RGMII_TX_CTL_LSIO_GPIO5_IO31			0x04000040>,
291		<IMX8QM_ENET0_RGMII_TXC_LSIO_GPIO5_IO30				0x04000040>,
292		<IMX8QM_ENET0_RGMII_TXD0_LSIO_GPIO6_IO00			0x04000040>,
293		<IMX8QM_ENET0_RGMII_TXD1_LSIO_GPIO6_IO01			0x04000040>,
294		<IMX8QM_ENET0_RGMII_TXD2_LSIO_GPIO6_IO02			0x04000040>,
295		<IMX8QM_ENET0_RGMII_TXD3_LSIO_GPIO6_IO03			0x04000040>,
296		<IMX8QM_ENET0_RGMII_RXC_LSIO_GPIO6_IO04				0x04000040>,
297		<IMX8QM_ENET0_RGMII_RX_CTL_LSIO_GPIO6_IO05			0x04000040>,
298		<IMX8QM_ENET0_RGMII_RXD0_LSIO_GPIO6_IO06			0x04000040>,
299		<IMX8QM_ENET0_RGMII_RXD1_LSIO_GPIO6_IO07			0x04000040>,
300		<IMX8QM_ENET0_RGMII_RXD2_LSIO_GPIO6_IO08			0x04000040>,
301		<IMX8QM_ENET0_RGMII_RXD3_LSIO_GPIO6_IO09			0x04000040>,
302		<IMX8QM_ENET0_REFCLK_125M_25M_LSIO_GPIO4_IO15			0x04000040>,
303		<IMX8QM_LVDS1_GPIO01_LSIO_GPIO1_IO11				0x04000040>,
304		<IMX8QM_LVDS0_GPIO01_LSIO_GPIO1_IO05				0x04000040>;
305};
306
307&iomuxc {
308	/* Apalis I2C2 (DDC) */
309	pinctrl_lpi2c0: lpi2c0grp {
310		fsl,pins =
311			<IMX8QM_HDMI_TX0_TS_SCL_DMA_I2C0_SCL			0x04000022>,
312			<IMX8QM_HDMI_TX0_TS_SDA_DMA_I2C0_SDA			0x04000022>;
313	};
314};
315
316/* On-module PCIe_CTRL0_CLKREQ */
317&pinctrl_pcie_sata_refclk {
318	fsl,pins =
319		<IMX8QM_PCIE_CTRL0_CLKREQ_B_LSIO_GPIO4_IO27			0x00000021>;
320};
321
322/* TODO: On-module Wi-Fi */
323
324/* Apalis MMC1 */
325&usdhc2 {
326	/*
327	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
328	 * issues with certain SD cards, disable 1.8V signaling for now.
329	 */
330	no-1-8-v;
331};
332
333/* Apalis SD1 */
334&usdhc3 {
335	/*
336	 * The PMIC on V1.0A HW generates 1.6V instead of 1.8V which creates
337	 * issues with certain SD cards, disable 1.8V signaling for now.
338	 */
339	no-1-8-v;
340};
341