xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8mq-librem5.dtsi (revision f81cdf24ba5436367377f7c8e8f51f6df2a75ca7)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/leds/common.h>
11#include "dt-bindings/pwm/pwm.h"
12#include "dt-bindings/usb/pd.h"
13#include "imx8mq.dtsi"
14
15/ {
16	model = "Purism Librem 5";
17	compatible = "purism,librem5", "fsl,imx8mq";
18	chassis-type = "handset";
19
20	backlight_dsi: backlight-dsi {
21		compatible = "led-backlight";
22		leds = <&led_backlight>;
23		brightness-levels = <255>;
24		default-brightness-level = <190>;
25	};
26
27	pmic_osc: clock-pmic {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency = <32768>;
31		clock-output-names = "pmic_osc";
32	};
33
34	chosen {
35		stdout-path = &uart1;
36	};
37
38	gpio-keys {
39		compatible = "gpio-keys";
40		pinctrl-names = "default";
41		pinctrl-0 = <&pinctrl_keys>;
42
43		key-vol-down {
44			label = "VOL_DOWN";
45			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
46			linux,code = <KEY_VOLUMEDOWN>;
47			debounce-interval = <50>;
48			wakeup-source;
49		};
50
51		key-vol-up {
52			label = "VOL_UP";
53			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
54			linux,code = <KEY_VOLUMEUP>;
55			debounce-interval = <50>;
56			wakeup-source;
57		};
58	};
59
60	led-controller {
61		compatible = "pwm-leds-multicolor";
62
63		multi-led {
64			color = <LED_COLOR_ID_RGB>;
65			function = LED_FUNCTION_STATUS;
66			max-brightness = <248>;
67
68			led-0 {
69				color = <LED_COLOR_ID_BLUE>;
70				pwms = <&pwm2 0 50000 0>;
71			};
72
73			led-1 {
74				color = <LED_COLOR_ID_GREEN>;
75				pwms = <&pwm4 0 50000 0>;
76			};
77
78			led-2 {
79				color = <LED_COLOR_ID_RED>;
80				pwms = <&pwm3 0 50000 0>;
81			};
82		};
83	};
84
85	reg_aud_1v8: regulator-audio-1v8 {
86		compatible = "regulator-fixed";
87		pinctrl-names = "default";
88		pinctrl-0 = <&pinctrl_audiopwr>;
89		regulator-name = "AUD_1V8";
90		regulator-min-microvolt = <1800000>;
91		regulator-max-microvolt = <1800000>;
92		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
93		enable-active-high;
94	};
95
96	reg_mic_2v4: regulator-mic-2v4 {
97		compatible = "regulator-fixed";
98		regulator-name = "MIC_2V4";
99		regulator-min-microvolt = <2400000>;
100		regulator-max-microvolt = <2400000>;
101		vin-supply = <&reg_aud_1v8>;
102	};
103
104	/*
105	 * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
106	 * since we can't have it twice in the 2 different regulator nodes.
107	 */
108	reg_csi_1v8: regulator-csi-1v8 {
109		compatible = "regulator-fixed";
110		regulator-name = "CAMERA_VDDIO_1V8";
111		regulator-min-microvolt = <1800000>;
112		regulator-max-microvolt = <1800000>;
113		vin-supply = <&reg_vdd_3v3>;
114		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
115		enable-active-high;
116	};
117
118	/* controlled by the CAMERA_POWER_KEY HKS */
119	reg_vcam_1v2: regulator-vcam-1v2 {
120		compatible = "regulator-fixed";
121		regulator-name = "CAMERA_VDDD_1V2";
122		regulator-min-microvolt = <1200000>;
123		regulator-max-microvolt = <1200000>;
124		vin-supply = <&reg_vdd_1v8>;
125		enable-active-high;
126	};
127
128	reg_vcam_2v8: regulator-vcam-2v8 {
129		compatible = "regulator-fixed";
130		regulator-name = "CAMERA_VDDA_2V8";
131		regulator-min-microvolt = <2800000>;
132		regulator-max-microvolt = <2800000>;
133		vin-supply = <&reg_vdd_3v3>;
134		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
135		enable-active-high;
136	};
137
138	reg_gnss: regulator-gnss {
139		compatible = "regulator-fixed";
140		pinctrl-names = "default";
141		pinctrl-0 = <&pinctrl_gnsspwr>;
142		regulator-name = "GNSS";
143		regulator-min-microvolt = <3300000>;
144		regulator-max-microvolt = <3300000>;
145		gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
146		enable-active-high;
147	};
148
149	reg_hub: regulator-hub {
150		compatible = "regulator-fixed";
151		pinctrl-names = "default";
152		pinctrl-0 = <&pinctrl_hub_pwr>;
153		regulator-name = "HUB";
154		regulator-min-microvolt = <3300000>;
155		regulator-max-microvolt = <3300000>;
156		gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
157		enable-active-high;
158	};
159
160	reg_lcd_1v8: regulator-lcd-1v8 {
161		compatible = "regulator-fixed";
162		pinctrl-names = "default";
163		pinctrl-0 = <&pinctrl_dsien>;
164		regulator-name = "LCD_1V8";
165		regulator-min-microvolt = <1800000>;
166		regulator-max-microvolt = <1800000>;
167		vin-supply = <&reg_vdd_1v8>;
168		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
169		enable-active-high;
170		/* Otherwise i2c3 is not functional */
171		regulator-always-on;
172	};
173
174	reg_lcd_3v4: regulator-lcd-3v4 {
175		compatible = "regulator-fixed";
176		regulator-name = "LCD_3V4";
177		pinctrl-names = "default";
178		pinctrl-0 = <&pinctrl_dsibiasen>;
179		vin-supply = <&reg_vsys_3v4>;
180		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
181		enable-active-high;
182	};
183
184	reg_vdd_sen: regulator-vdd-sen {
185		compatible = "regulator-fixed";
186		regulator-name = "VDD_SEN";
187		regulator-min-microvolt = <3300000>;
188		regulator-max-microvolt = <3300000>;
189	};
190
191	reg_vdd_1v8: regulator-vdd-1v8 {
192		compatible = "regulator-fixed";
193		regulator-name = "VDD_1V8";
194		regulator-min-microvolt = <1800000>;
195		regulator-max-microvolt = <1800000>;
196		vin-supply = <&buck7_reg>;
197	};
198
199	reg_vdd_3v3: regulator-vdd-3v3 {
200		compatible = "regulator-fixed";
201		regulator-name = "VDD_3V3";
202		regulator-min-microvolt = <3300000>;
203		regulator-max-microvolt = <3300000>;
204	};
205
206	reg_vsys_3v4: regulator-vsys-3v4 {
207		compatible = "regulator-fixed";
208		regulator-name = "VSYS_3V4";
209		regulator-min-microvolt = <3400000>;
210		regulator-max-microvolt = <3400000>;
211		regulator-always-on;
212	};
213
214	reg_wifi_3v3: regulator-wifi-3v3 {
215		compatible = "regulator-fixed";
216		pinctrl-names = "default";
217		pinctrl-0 = <&pinctrl_wifi_pwr>;
218		regulator-name = "3V3_WIFI";
219		regulator-min-microvolt = <3300000>;
220		regulator-max-microvolt = <3300000>;
221		gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
222		enable-active-high;
223		vin-supply = <&reg_vdd_3v3>;
224	};
225
226	sound {
227		compatible = "simple-audio-card";
228		pinctrl-names = "default";
229		pinctrl-0 = <&pinctrl_hp>;
230		simple-audio-card,name = "Librem 5";
231		simple-audio-card,format = "i2s";
232		simple-audio-card,widgets =
233			"Headphone", "Headphones",
234			"Microphone", "Headset Mic",
235			"Microphone", "Digital Mic",
236			"Speaker", "Speaker";
237		simple-audio-card,routing =
238			"Headphones", "HPOUTL",
239			"Headphones", "HPOUTR",
240			"Speaker", "SPKOUTL",
241			"Speaker", "SPKOUTR",
242			"Headset Mic", "MICBIAS",
243			"IN3R", "Headset Mic",
244			"DMICDAT", "Digital Mic";
245		simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
246
247		simple-audio-card,cpu {
248			sound-dai = <&sai2>;
249		};
250
251		simple-audio-card,codec {
252			sound-dai = <&codec>;
253			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
254			frame-master;
255			bitclock-master;
256		};
257	};
258
259	sound-wwan {
260		compatible = "simple-audio-card";
261		simple-audio-card,name = "Modem";
262		simple-audio-card,format = "i2s";
263
264		simple-audio-card,cpu {
265			sound-dai = <&sai6>;
266			frame-inversion;
267		};
268
269		simple-audio-card,codec {
270			sound-dai = <&bm818_codec>;
271			frame-master;
272			bitclock-master;
273		};
274	};
275
276	usdhc2_pwrseq: pwrseq {
277		pinctrl-names = "default";
278		pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
279		compatible = "mmc-pwrseq-simple";
280		reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
281			      <&gpio4 29 GPIO_ACTIVE_HIGH>;
282	};
283
284	bm818_codec: sound-wwan-codec {
285		compatible = "broadmobi,bm818", "option,gtm601";
286		#sound-dai-cells = <0>;
287	};
288
289	vibrator {
290		compatible = "pwm-vibrator";
291		pwms = <&pwm1 0 1000000000 0>;
292		pwm-names = "enable";
293		vcc-supply = <&reg_vdd_3v3>;
294	};
295};
296
297&A53_0 {
298	cpu-supply = <&buck2_reg>;
299};
300
301&A53_1 {
302	cpu-supply = <&buck2_reg>;
303};
304
305&A53_2 {
306	cpu-supply = <&buck2_reg>;
307};
308
309&A53_3 {
310	cpu-supply = <&buck2_reg>;
311};
312
313&csi1 {
314	status = "okay";
315};
316
317&ddrc {
318	operating-points-v2 = <&ddrc_opp_table>;
319	status = "okay";
320
321	ddrc_opp_table: opp-table {
322		compatible = "operating-points-v2";
323
324		opp-25000000 {
325			opp-hz = /bits/ 64 <25000000>;
326		};
327
328		opp-100000000 {
329			opp-hz = /bits/ 64 <100000000>;
330		};
331
332		opp-166000000 {
333			opp-hz = /bits/ 64 <166935483>;
334		};
335
336		opp-800000000 {
337			opp-hz = /bits/ 64 <800000000>;
338		};
339	};
340};
341
342&dphy {
343	status = "okay";
344};
345
346&ecspi1 {
347	pinctrl-names = "default";
348	pinctrl-0 = <&pinctrl_ecspi1>;
349	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
350	#address-cells = <1>;
351	#size-cells = <0>;
352	status = "okay";
353
354	nor_flash: flash@0 {
355		compatible = "jedec,spi-nor";
356		reg = <0>;
357		spi-max-frequency = <1000000>;
358		#address-cells = <1>;
359		#size-cells = <1>;
360
361		partition@0 {
362			label = "protected0";
363			reg = <0x0 0x30000>;
364			read-only;
365		};
366
367		partition@30000 {
368			label = "firmware";
369			reg = <0x30000 0x1d0000>;
370			read-only;
371		};
372	};
373};
374
375&gpio1 {
376	pinctrl-names = "default";
377	pinctrl-0 = <&pinctrl_pmic_5v>;
378
379	pmic-5v-hog {
380		gpio-hog;
381		gpios = <1 GPIO_ACTIVE_HIGH>;
382		input;
383		lane-mapping = "pmic-5v";
384	};
385};
386
387&iomuxc {
388	pinctrl-names = "default";
389	pinctrl-0 = <&pinctrl_hog>;
390
391	pinctrl_hog: hoggrp {
392		fsl,pins = <
393			/* CLKO2 for cameras on both CSI1 and CSI2 */
394			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
395		>;
396	};
397
398	pinctrl_audiopwr: audiopwrgrp {
399		fsl,pins = <
400			/* AUDIO_POWER_EN_3V3 */
401			MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x83
402		>;
403	};
404
405	pinctrl_bl: blgrp {
406		fsl,pins = <
407			/* BACKLINGE_EN */
408			MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14	0x83
409		>;
410	};
411
412	pinctrl_bt: btgrp {
413		fsl,pins = <
414			/* BT_REG_ON */
415			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x83
416		>;
417	};
418
419	pinctrl_camera_pwr: camerapwrgrp {
420		fsl,pins = <
421			/* CAMERA_PWR_EN_3V3 */
422			MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x83
423		>;
424	};
425
426	pinctrl_csi1: csi1grp {
427		fsl,pins = <
428			/* CSI1_NRST */
429			MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25	0x83
430		>;
431	};
432
433	pinctrl_charger_in: chargeringrp {
434		fsl,pins = <
435			/* CHRG_INT */
436			MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3	0x80
437		>;
438	};
439
440	pinctrl_dsibiasen: dsibiasengrp {
441		fsl,pins = <
442			/* DSI_BIAS_EN */
443			MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20	0x83
444		>;
445	};
446
447	pinctrl_dsien: dsiengrp {
448		fsl,pins = <
449			/* DSI_EN_3V3 */
450			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x83
451		>;
452	};
453
454	pinctrl_dsirst: dsirstgrp {
455		fsl,pins = <
456			/* DSI_RST */
457			MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29	0x83
458			/* DSI_TE */
459			MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28	0x83
460			/* TP_RST */
461			MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24	0x83
462		>;
463	};
464
465	pinctrl_ecspi1: ecspigrp {
466		fsl,pins = <
467			MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI	0x83
468			MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO	0x83
469			MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x19
470			MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK	0x83
471		>;
472	};
473
474	pinctrl_gauge: gaugegrp {
475		fsl,pins = <
476			/* BAT_LOW */
477			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x80
478		>;
479	};
480
481	pinctrl_gnsspwr: gnsspwrgrp {
482		fsl,pins = <
483			/* GPS3V3_EN */
484			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12	0x83
485		>;
486	};
487
488	pinctrl_haptic: hapticgrp {
489		fsl,pins = <
490			/* MOTO */
491			MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT	0x83
492		>;
493	};
494
495	pinctrl_hp: hpgrp {
496		fsl,pins = <
497			/* HEADPHONE_DET_1V8 */
498			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x180
499		>;
500	};
501
502	pinctrl_hub_pwr: hubpwrgrp {
503		fsl,pins = <
504			/* HUB_PWR_3V3_EN */
505			MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x83
506		>;
507	};
508
509	pinctrl_i2c1: i2c1grp {
510		fsl,pins = <
511			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x40000026
512			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x40000026
513		>;
514	};
515
516	pinctrl_i2c2: i2c2grp {
517		fsl,pins = <
518			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL		0x40000026
519			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA		0x40000026
520		>;
521	};
522
523	pinctrl_i2c3: i2c3grp {
524		fsl,pins = <
525			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x40000026
526			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x40000026
527		>;
528	};
529
530	pinctrl_i2c4: i2c4grp {
531		fsl,pins = <
532			MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL		0x40000026
533			MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA		0x40000026
534		>;
535	};
536
537	pinctrl_keys: keysgrp {
538		fsl,pins = <
539			/* VOL- */
540			MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17	0x01C0
541			/* VOL+ */
542			MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16	0x01C0
543		>;
544	};
545
546	pinctrl_led_b: ledbgrp {
547		fsl,pins = <
548			/* LED_B */
549			MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT	0x06
550		>;
551	};
552
553	pinctrl_led_g: ledggrp {
554		fsl,pins = <
555			/* LED_G */
556			MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT		0x06
557		>;
558	};
559
560	pinctrl_led_r: ledrgrp {
561		fsl,pins = <
562			/* LED_R */
563			MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT		0x06
564		>;
565	};
566
567	pinctrl_mag: maggrp {
568		fsl,pins = <
569			/* INT_MAG */
570			MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22	0x80
571		>;
572	};
573
574	pinctrl_pmic: pmicgrp {
575		fsl,pins = <
576			/* PMIC_NINT */
577			MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x80
578		>;
579	};
580
581	pinctrl_pmic_5v: pmic5vgrp {
582		fsl,pins = <
583			/* PMIC_5V */
584			MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x80
585		>;
586	};
587
588	pinctrl_prox: proxgrp {
589		fsl,pins = <
590			/* INT_LIGHT */
591			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x80
592		>;
593	};
594
595	pinctrl_rtc: rtcgrp {
596		fsl,pins = <
597			/* RTC_INT */
598			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x80
599		>;
600	};
601
602	pinctrl_sai2: sai2grp {
603		fsl,pins = <
604			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
605			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
606			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
607			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
608			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
609		>;
610	};
611
612	pinctrl_sai6: sai6grp {
613		fsl,pins = <
614			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
615			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
616			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK	0xd6
617			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
618		>;
619	};
620
621	pinctrl_tcpc: tcpcgrp {
622		fsl,pins = <
623			/* TCPC_INT */
624			MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x01C0
625		>;
626	};
627
628	pinctrl_touch: touchgrp {
629		fsl,pins = <
630			/* TP_INT */
631			MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27	0x80
632		>;
633	};
634
635	pinctrl_typec: typecgrp {
636		fsl,pins = <
637			/* TYPEC_MUX_EN */
638			MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11	0x83
639		>;
640	};
641
642	pinctrl_uart1: uart1grp {
643		fsl,pins = <
644			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX	0x49
645			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX	0x49
646		>;
647	};
648
649	pinctrl_uart2: uart2grp {
650		fsl,pins = <
651			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX	0x49
652			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX	0x49
653		>;
654	};
655
656	pinctrl_uart3: uart3grp {
657		fsl,pins = <
658			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX	0x49
659			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX	0x49
660		>;
661	};
662
663	pinctrl_uart4: uart4grp {
664		fsl,pins = <
665			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
666			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
667			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
668			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
669		>;
670	};
671
672	pinctrl_usdhc1: usdhc1grp {
673		fsl,pins = <
674			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
675			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
676			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
677			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
678			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
679			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
680			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
681			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
682			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
683			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
684			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
685			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
686		>;
687	};
688
689	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
690		fsl,pins = <
691			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
692			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
693			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
694			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
695			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
696			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
697			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
698			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
699			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
700			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
701			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
702			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
703		>;
704	};
705
706	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
707		fsl,pins = <
708			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
709			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
710			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
711			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
712			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
713			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
714			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
715			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
716			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
717			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
718			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
719			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
720		>;
721	};
722
723	pinctrl_usdhc2: usdhc2grp {
724		fsl,pins = <
725			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
726			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
727			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
728			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
729			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
730			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
731			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
732			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
733		>;
734	};
735
736	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
737		fsl,pins = <
738			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
739			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
740			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
741			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
742			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
743			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
744			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
745			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
746		>;
747	};
748
749	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
750		fsl,pins = <
751			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
752			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
753			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
754			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
755			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
756			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
757			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
758			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
759		>;
760	};
761
762	pinctrl_wifi_disable: wifidisablegrp {
763		fsl,pins = <
764			/* WIFI_REG_ON */
765			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x83
766		>;
767	};
768
769	pinctrl_wifi_pwr: wifipwrgrp {
770		fsl,pins = <
771			/* WIFI3V3_EN */
772			MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10	0x83
773		>;
774	};
775
776	pinctrl_wdog: wdoggrp {
777		fsl,pins = <
778			/* nWDOG */
779			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x1f
780		>;
781	};
782};
783
784&i2c1 {
785	clock-frequency = <384000>;
786	pinctrl-names = "default";
787	pinctrl-0 = <&pinctrl_i2c1>;
788	status = "okay";
789
790	typec_pd: usb-pd@3f {
791		compatible = "ti,tps6598x";
792		reg = <0x3f>;
793		pinctrl-names = "default";
794		pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
795		interrupt-parent = <&gpio1>;
796		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
797		interrupt-names = "irq";
798
799		connector {
800			compatible = "usb-c-connector";
801			label = "USB-C";
802			data-role = "dual";
803
804			ports {
805				#address-cells = <1>;
806				#size-cells = <0>;
807
808				port@0 {
809					reg = <0>;
810
811					usb_con_hs: endpoint {
812						remote-endpoint = <&typec_hs>;
813					};
814				};
815
816				port@1 {
817					reg = <1>;
818
819					usb_con_ss: endpoint {
820						remote-endpoint = <&typec_ss>;
821					};
822				};
823			};
824		};
825	};
826
827	pmic: pmic@4b {
828		compatible = "rohm,bd71837";
829		reg = <0x4b>;
830		pinctrl-names = "default";
831		pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
832		clocks = <&pmic_osc>;
833		#clock-cells = <0>;
834		clock-names = "osc";
835		clock-output-names = "pmic_clk";
836		interrupt-parent = <&gpio1>;
837		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
838		rohm,reset-snvs-powered;
839
840		regulators {
841			buck1_reg: BUCK1 {
842				regulator-name = "buck1";
843				regulator-min-microvolt = <700000>;
844				regulator-max-microvolt = <1300000>;
845				regulator-boot-on;
846				regulator-ramp-delay = <1250>;
847				rohm,dvs-run-voltage = <880000>;
848				rohm,dvs-idle-voltage = <820000>;
849				rohm,dvs-suspend-voltage = <810000>;
850				regulator-always-on;
851			};
852
853			buck2_reg: BUCK2 {
854				regulator-name = "buck2";
855				regulator-min-microvolt = <700000>;
856				regulator-max-microvolt = <1300000>;
857				regulator-boot-on;
858				regulator-ramp-delay = <1250>;
859				rohm,dvs-run-voltage = <950000>;
860				rohm,dvs-idle-voltage = <850000>;
861				regulator-always-on;
862			};
863
864			buck3_reg: BUCK3 {
865				regulator-name = "buck3";
866				regulator-min-microvolt = <700000>;
867				regulator-max-microvolt = <1300000>;
868				regulator-boot-on;
869				rohm,dvs-run-voltage = <850000>;
870			};
871
872			buck4_reg: BUCK4 {
873				regulator-name = "buck4";
874				regulator-min-microvolt = <700000>;
875				regulator-max-microvolt = <1300000>;
876				rohm,dvs-run-voltage = <930000>;
877			};
878
879			buck5_reg: BUCK5 {
880				regulator-name = "buck5";
881				regulator-min-microvolt = <700000>;
882				regulator-max-microvolt = <1350000>;
883				regulator-boot-on;
884				regulator-always-on;
885			};
886
887			buck6_reg: BUCK6 {
888				regulator-name = "buck6";
889				regulator-min-microvolt = <3000000>;
890				regulator-max-microvolt = <3300000>;
891				regulator-boot-on;
892				regulator-always-on;
893			};
894
895			buck7_reg: BUCK7 {
896				regulator-name = "buck7";
897				regulator-min-microvolt = <1605000>;
898				regulator-max-microvolt = <1995000>;
899				regulator-boot-on;
900				regulator-always-on;
901			};
902
903			buck8_reg: BUCK8 {
904				regulator-name = "buck8";
905				regulator-min-microvolt = <800000>;
906				regulator-max-microvolt = <1400000>;
907				regulator-boot-on;
908				regulator-always-on;
909			};
910
911			ldo1_reg: LDO1 {
912				regulator-name = "ldo1";
913				regulator-min-microvolt = <3000000>;
914				regulator-max-microvolt = <3300000>;
915				regulator-boot-on;
916				/* leave on for snvs power button */
917				regulator-always-on;
918			};
919
920			ldo2_reg: LDO2 {
921				regulator-name = "ldo2";
922				regulator-min-microvolt = <900000>;
923				regulator-max-microvolt = <900000>;
924				regulator-boot-on;
925				/* leave on for snvs power button */
926				regulator-always-on;
927			};
928
929			ldo3_reg: LDO3 {
930				regulator-name = "ldo3";
931				regulator-min-microvolt = <1800000>;
932				regulator-max-microvolt = <3300000>;
933				regulator-boot-on;
934				regulator-always-on;
935			};
936
937			ldo4_reg: LDO4 {
938				regulator-name = "ldo4";
939				regulator-min-microvolt = <900000>;
940				regulator-max-microvolt = <1800000>;
941				regulator-boot-on;
942				regulator-always-on;
943			};
944
945			ldo5_reg: LDO5 {
946				/* VDD_PHY_0V9 - MIPI and HDMI domains */
947				regulator-name = "ldo5";
948				regulator-min-microvolt = <1800000>;
949				regulator-max-microvolt = <3300000>;
950				regulator-always-on;
951			};
952
953			ldo6_reg: LDO6 {
954				/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
955				regulator-name = "ldo6";
956				regulator-min-microvolt = <900000>;
957				regulator-max-microvolt = <1800000>;
958				regulator-boot-on;
959				regulator-always-on;
960			};
961
962			ldo7_reg: LDO7 {
963				/* VDD_PHY_3V3 - USB domain */
964				regulator-name = "ldo7";
965				regulator-min-microvolt = <1800000>;
966				regulator-max-microvolt = <3300000>;
967				regulator-boot-on;
968				regulator-always-on;
969			};
970		};
971	};
972
973	rtc@68 {
974		compatible = "microcrystal,rv4162";
975		reg = <0x68>;
976		pinctrl-names = "default";
977		pinctrl-0 = <&pinctrl_rtc>;
978		interrupt-parent = <&gpio1>;
979		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
980	};
981};
982
983&i2c2 {
984	clock-frequency = <384000>;
985	pinctrl-names = "default";
986	pinctrl-0 = <&pinctrl_i2c2>;
987	status = "okay";
988
989	magnetometer: magnetometer@1e	{
990		compatible = "st,lsm9ds1-magn";
991		reg = <0x1e>;
992		pinctrl-names = "default";
993		pinctrl-0 = <&pinctrl_mag>;
994		interrupt-parent = <&gpio3>;
995		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
996		vdd-supply = <&reg_vdd_sen>;
997		vddio-supply = <&reg_vdd_1v8>;
998	};
999
1000	regulator@3e {
1001		compatible = "tps65132";
1002		reg = <0x3e>;
1003
1004		reg_lcd_avdd: outp {
1005			regulator-name = "LCD_AVDD";
1006			vin-supply = <&reg_lcd_3v4>;
1007		};
1008
1009		reg_lcd_avee: outn {
1010			regulator-name = "LCD_AVEE";
1011			vin-supply = <&reg_lcd_3v4>;
1012		};
1013	};
1014
1015	proximity: prox@60 {
1016		compatible = "vishay,vcnl4040";
1017		reg = <0x60>;
1018		pinctrl-names = "default";
1019		pinctrl-0 = <&pinctrl_prox>;
1020		interrupt-parent = <&gpio3>;
1021		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
1022	};
1023
1024	accel_gyro: accel-gyro@6a	{
1025		compatible = "st,lsm9ds1-imu";
1026		reg = <0x6a>;
1027		vdd-supply = <&reg_vdd_sen>;
1028		vddio-supply = <&reg_vdd_1v8>;
1029	};
1030};
1031
1032&i2c3 {
1033	clock-frequency = <384000>;
1034	pinctrl-names = "default";
1035	pinctrl-0 = <&pinctrl_i2c3>;
1036	status = "okay";
1037
1038	codec: audio-codec@1a {
1039		compatible = "wlf,wm8962";
1040		reg = <0x1a>;
1041		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
1042		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1043		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1044		assigned-clock-rates = <24576000>;
1045		#sound-dai-cells = <0>;
1046		mic-cfg = <0x200>;
1047		DCVDD-supply = <&reg_aud_1v8>;
1048		DBVDD-supply = <&reg_aud_1v8>;
1049		AVDD-supply = <&reg_aud_1v8>;
1050		CPVDD-supply = <&reg_aud_1v8>;
1051		MICVDD-supply = <&reg_mic_2v4>;
1052		PLLVDD-supply = <&reg_aud_1v8>;
1053		SPKVDD1-supply = <&reg_vsys_3v4>;
1054		SPKVDD2-supply = <&reg_vsys_3v4>;
1055		gpio-cfg = <
1056			0x0000 /* n/c */
1057			0x0001 /* gpio2, 1: default */
1058			0x0013 /* gpio3, 2: dmicclk */
1059			0x0000 /* n/c, 3: default */
1060			0x8014 /* gpio5, 4: dmic_dat */
1061			0x0000 /* gpio6, 5: default */
1062		>;
1063	};
1064
1065	camera_front: camera@20 {
1066		compatible = "hynix,hi846";
1067		reg = <0x20>;
1068		pinctrl-names = "default";
1069		pinctrl-0 = <&pinctrl_csi1>;
1070		clocks = <&clk IMX8MQ_CLK_CLKO2>;
1071		assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1072		assigned-clock-rates = <25000000>;
1073		reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1074		vdda-supply = <&reg_vcam_2v8>;
1075		vddd-supply = <&reg_vcam_1v2>;
1076		vddio-supply = <&reg_csi_1v8>;
1077		rotation = <90>;
1078		orientation = <0>;
1079
1080		port {
1081			camera1_ep: endpoint {
1082				data-lanes = <1 2>;
1083				link-frequencies = /bits/ 64
1084					<80000000 200000000 300000000>;
1085				remote-endpoint = <&mipi1_sensor_ep>;
1086			};
1087		};
1088	};
1089
1090	backlight@36 {
1091		compatible = "ti,lm36922";
1092		reg = <0x36>;
1093		pinctrl-names = "default";
1094		pinctrl-0 = <&pinctrl_bl>;
1095		#address-cells = <1>;
1096		#size-cells = <0>;
1097		enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1098		vled-supply = <&reg_vsys_3v4>;
1099		ti,ovp-microvolt = <25000000>;
1100
1101		led_backlight: led@0 {
1102			reg = <0>;
1103			label = ":backlight";
1104			linux,default-trigger = "backlight";
1105			led-max-microamp = <20000>;
1106		};
1107	};
1108
1109	touchscreen@38 {
1110		compatible = "edt,edt-ft5506";
1111		reg = <0x38>;
1112		pinctrl-names = "default";
1113		pinctrl-0 = <&pinctrl_touch>;
1114		interrupt-parent = <&gpio1>;
1115		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1116		touchscreen-size-x = <720>;
1117		touchscreen-size-y = <1440>;
1118		vcc-supply = <&reg_lcd_1v8>;
1119	};
1120};
1121
1122&i2c4 {
1123	clock-frequency = <384000>;
1124	pinctrl-names = "default";
1125	pinctrl-0 = <&pinctrl_i2c4>;
1126	status = "okay";
1127
1128	vcm@c {
1129		compatible = "dongwoon,dw9714";
1130		reg = <0x0c>;
1131		vcc-supply = <&reg_csi_1v8>;
1132	};
1133
1134	bat: fuel-gauge@36 {
1135		compatible = "maxim,max17055";
1136		reg = <0x36>;
1137		interrupt-parent = <&gpio3>;
1138		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1139		pinctrl-names = "default";
1140		pinctrl-0 = <&pinctrl_gauge>;
1141		power-supplies = <&bq25895>;
1142		maxim,over-heat-temp = <700>;
1143		maxim,over-volt = <4500>;
1144		maxim,rsns-microohm = <5000>;
1145	};
1146
1147	bq25895: charger@6a {
1148		compatible = "ti,bq25895", "ti,bq25890";
1149		reg = <0x6a>;
1150		pinctrl-names = "default";
1151		pinctrl-0 = <&pinctrl_charger_in>;
1152		interrupt-parent = <&gpio3>;
1153		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1154		phys = <&usb3_phy0>;
1155		ti,battery-regulation-voltage = <4208000>; /* uV */
1156		ti,termination-current = <128000>;  /* uA */
1157		ti,precharge-current = <128000>; /* uA */
1158		ti,minimum-sys-voltage = <3700000>; /* uV */
1159		ti,boost-voltage = <5000000>; /* uV */
1160		ti,boost-max-current = <1500000>; /* uA */
1161		ti,use-vinmin-threshold = <1>; /* enable VINDPM */
1162		ti,vinmin-threshold = <3900000>; /* uV */
1163		monitored-battery = <&bat>;
1164		power-supplies = <&typec_pd>;
1165	};
1166};
1167
1168&lcdif {
1169	status = "okay";
1170};
1171
1172&mipi_csi1 {
1173	assigned-clock-rates = <266000000>, <200000000>, <66000000>;
1174	status = "okay";
1175
1176	ports {
1177		port@0 {
1178			reg = <0>;
1179
1180			mipi1_sensor_ep: endpoint {
1181				remote-endpoint = <&camera1_ep>;
1182				data-lanes = <1 2>;
1183			};
1184		};
1185	};
1186};
1187
1188&mipi_dsi {
1189	#address-cells = <1>;
1190	#size-cells = <0>;
1191	status = "okay";
1192
1193	lcd_panel: panel@0 {
1194		compatible = "mantix,mlaf057we51-x";
1195		reg = <0>;
1196		pinctrl-names = "default";
1197		pinctrl-0 = <&pinctrl_dsirst>;
1198		avdd-supply = <&reg_lcd_avdd>;
1199		avee-supply = <&reg_lcd_avee>;
1200		vddi-supply = <&reg_lcd_1v8>;
1201		backlight = <&backlight_dsi>;
1202		reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1203		mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1204
1205		port {
1206			panel_in: endpoint {
1207				remote-endpoint = <&mipi_dsi_out>;
1208			};
1209		};
1210	};
1211
1212	ports {
1213		port@1 {
1214			reg = <1>;
1215
1216			mipi_dsi_out: endpoint {
1217				remote-endpoint = <&panel_in>;
1218			};
1219		};
1220	};
1221};
1222
1223&pgc_gpu {
1224	power-supply = <&buck3_reg>;
1225};
1226
1227&pgc_mipi {
1228	power-supply = <&ldo5_reg>;
1229};
1230
1231&pgc_vpu {
1232	power-supply = <&buck4_reg>;
1233};
1234
1235&pwm1 {
1236	pinctrl-names = "default";
1237	pinctrl-0 = <&pinctrl_haptic>;
1238	status = "okay";
1239};
1240
1241&pwm2 {
1242	pinctrl-names = "default";
1243	pinctrl-0 = <&pinctrl_led_b>;
1244	status = "okay";
1245};
1246
1247&pwm3 {
1248	pinctrl-names = "default";
1249	pinctrl-0 = <&pinctrl_led_r>;
1250	status = "okay";
1251};
1252
1253&pwm4 {
1254	pinctrl-names = "default";
1255	pinctrl-0 = <&pinctrl_led_g>;
1256	status = "okay";
1257};
1258
1259&sai2 {
1260	pinctrl-names = "default";
1261	pinctrl-0 = <&pinctrl_sai2>;
1262	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1263	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1264	assigned-clock-rates = <24576000>;
1265	status = "okay";
1266};
1267
1268&sai6 {
1269	pinctrl-names = "default";
1270	pinctrl-0 = <&pinctrl_sai6>;
1271	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1272	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1273	assigned-clock-rates = <24576000>;
1274	fsl,sai-synchronous-rx;
1275	status = "okay";
1276};
1277
1278&snvs_pwrkey {
1279	status = "okay";
1280};
1281
1282&snvs_rtc {
1283	status = "disabled";
1284};
1285
1286&uart1 { /* console */
1287	pinctrl-names = "default";
1288	pinctrl-0 = <&pinctrl_uart1>;
1289	status = "okay";
1290};
1291
1292&uart2 { /* TPS - GPS - DEBUG */
1293	pinctrl-names = "default";
1294	pinctrl-0 = <&pinctrl_uart2>;
1295	status = "okay";
1296
1297	gnss {
1298		compatible = "globaltop,pa6h";
1299		vcc-supply = <&reg_gnss>;
1300		current-speed = <9600>;
1301	};
1302};
1303
1304&uart3 { /* SMC */
1305	pinctrl-names = "default";
1306	pinctrl-0 = <&pinctrl_uart3>;
1307	status = "okay";
1308};
1309
1310&uart4 { /* BT */
1311	pinctrl-names = "default";
1312	pinctrl-0 = <&pinctrl_uart4>;
1313	uart-has-rtscts;
1314	status = "okay";
1315};
1316
1317&usb3_phy0 {
1318	status = "okay";
1319};
1320
1321&usb3_phy1 {
1322	vbus-supply = <&reg_hub>;
1323	status = "okay";
1324};
1325
1326&usb_dwc3_0 {
1327	#address-cells = <1>;
1328	#size-cells = <0>;
1329	dr_mode = "otg";
1330	usb-role-switch;
1331	status = "okay";
1332
1333	port@0 {
1334		reg = <0>;
1335
1336		typec_hs: endpoint {
1337			remote-endpoint = <&usb_con_hs>;
1338		};
1339	};
1340
1341	port@1 {
1342		reg = <1>;
1343
1344		typec_ss: endpoint {
1345			remote-endpoint = <&usb_con_ss>;
1346		};
1347	};
1348};
1349
1350&usb_dwc3_1 {
1351	dr_mode = "host";
1352	status = "okay";
1353	#address-cells = <1>;
1354	#size-cells = <0>;
1355
1356	/* Microchip USB2642 */
1357	hub@1 {
1358		compatible = "usb424,2640";
1359		reg = <1>;
1360		#address-cells = <1>;
1361		#size-cells = <0>;
1362
1363		mass-storage@1 {
1364			compatible = "usb424,4041";
1365			reg = <1>;
1366		};
1367	};
1368};
1369
1370&usdhc1 {
1371	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1372	assigned-clock-rates = <400000000>;
1373	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1374	pinctrl-0 = <&pinctrl_usdhc1>;
1375	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1376	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1377	bus-width = <8>;
1378	vmmc-supply = <&reg_vdd_3v3>;
1379	power-supply = <&reg_vdd_1v8>;
1380	non-removable;
1381	status = "okay";
1382};
1383
1384&usdhc2 {
1385	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1386	assigned-clock-rates = <200000000>;
1387	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1388	pinctrl-0 = <&pinctrl_usdhc2>;
1389	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1390	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1391	bus-width = <4>;
1392	vmmc-supply = <&reg_wifi_3v3>;
1393	mmc-pwrseq = <&usdhc2_pwrseq>;
1394	post-power-on-delay-ms = <1000>;
1395	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1396	max-frequency = <100000000>;
1397	disable-wp;
1398	cap-sdio-irq;
1399	keep-power-in-suspend;
1400	wakeup-source;
1401	status = "okay";
1402};
1403
1404&wdog1 {
1405	pinctrl-names = "default";
1406	pinctrl-0 = <&pinctrl_wdog>;
1407	fsl,ext-reset-output;
1408	status = "okay";
1409};
1410
1411&a53_opp_table {
1412	opp-1000000000 {
1413		opp-microvolt = <850000>;
1414	};
1415
1416	opp-1500000000 {
1417		opp-microvolt = <950000>;
1418	};
1419};
1420