xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8mq-librem5.dtsi (revision 7fdf597e96a02165cfe22ff357b857d5fa15ed8a)
1// SPDX-License-Identifier: GPL-2.0+
2/*
3 * Copyright 2018-2020 Purism SPC
4 */
5
6/dts-v1/;
7
8#include "dt-bindings/input/input.h"
9#include <dt-bindings/interrupt-controller/irq.h>
10#include <dt-bindings/leds/common.h>
11#include "dt-bindings/pwm/pwm.h"
12#include "dt-bindings/usb/pd.h"
13#include "imx8mq.dtsi"
14
15/ {
16	model = "Purism Librem 5";
17	compatible = "purism,librem5", "fsl,imx8mq";
18	chassis-type = "handset";
19
20	backlight_dsi: backlight-dsi {
21		compatible = "led-backlight";
22		leds = <&led_backlight>;
23		brightness-levels = <255>;
24		default-brightness-level = <190>;
25	};
26
27	pmic_osc: clock-pmic {
28		compatible = "fixed-clock";
29		#clock-cells = <0>;
30		clock-frequency = <32768>;
31		clock-output-names = "pmic_osc";
32	};
33
34	chosen {
35		stdout-path = &uart1;
36	};
37
38	gpio-keys {
39		compatible = "gpio-keys";
40		pinctrl-names = "default";
41		pinctrl-0 = <&pinctrl_keys>;
42
43		key-vol-down {
44			label = "VOL_DOWN";
45			gpios = <&gpio1 17 GPIO_ACTIVE_LOW>;
46			linux,code = <KEY_VOLUMEDOWN>;
47			debounce-interval = <50>;
48			wakeup-source;
49		};
50
51		key-vol-up {
52			label = "VOL_UP";
53			gpios = <&gpio1 16 GPIO_ACTIVE_LOW>;
54			linux,code = <KEY_VOLUMEUP>;
55			debounce-interval = <50>;
56			wakeup-source;
57		};
58	};
59
60	led-controller {
61		compatible = "pwm-leds-multicolor";
62
63		multi-led {
64			color = <LED_COLOR_ID_RGB>;
65			function = LED_FUNCTION_STATUS;
66			max-brightness = <248>;
67
68			led-0 {
69				color = <LED_COLOR_ID_BLUE>;
70				pwms = <&pwm2 0 50000 0>;
71			};
72
73			led-1 {
74				color = <LED_COLOR_ID_GREEN>;
75				pwms = <&pwm4 0 50000 0>;
76			};
77
78			led-2 {
79				color = <LED_COLOR_ID_RED>;
80				pwms = <&pwm3 0 50000 0>;
81			};
82		};
83	};
84
85	reg_aud_1v8: regulator-audio-1v8 {
86		compatible = "regulator-fixed";
87		pinctrl-names = "default";
88		pinctrl-0 = <&pinctrl_audiopwr>;
89		regulator-name = "AUD_1V8";
90		regulator-min-microvolt = <1800000>;
91		regulator-max-microvolt = <1800000>;
92		gpio = <&gpio1 4 GPIO_ACTIVE_HIGH>;
93		enable-active-high;
94		regulator-always-on;
95	};
96
97	reg_mic_2v4: regulator-mic-2v4 {
98		compatible = "regulator-fixed";
99		regulator-name = "MIC_2V4";
100		regulator-min-microvolt = <2400000>;
101		regulator-max-microvolt = <2400000>;
102		vin-supply = <&reg_aud_1v8>;
103	};
104
105	/*
106	 * the pinctrl for reg_csi_1v8 and reg_vcam_1v8 is added to the PMIC
107	 * since we can't have it twice in the 2 different regulator nodes.
108	 */
109	reg_csi_1v8: regulator-csi-1v8 {
110		compatible = "regulator-fixed";
111		regulator-name = "CAMERA_VDDIO_1V8";
112		regulator-min-microvolt = <1800000>;
113		regulator-max-microvolt = <1800000>;
114		vin-supply = <&reg_vdd_3v3>;
115		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
116		enable-active-high;
117	};
118
119	/* controlled by the CAMERA_POWER_KEY HKS */
120	reg_vcam_1v2: regulator-vcam-1v2 {
121		compatible = "regulator-fixed";
122		regulator-name = "CAMERA_VDDD_1V2";
123		regulator-min-microvolt = <1200000>;
124		regulator-max-microvolt = <1200000>;
125		vin-supply = <&reg_vdd_1v8>;
126		enable-active-high;
127	};
128
129	reg_vcam_2v8: regulator-vcam-2v8 {
130		compatible = "regulator-fixed";
131		regulator-name = "CAMERA_VDDA_2V8";
132		regulator-min-microvolt = <2800000>;
133		regulator-max-microvolt = <2800000>;
134		vin-supply = <&reg_vdd_3v3>;
135		gpio = <&gpio1 0 GPIO_ACTIVE_HIGH>;
136		enable-active-high;
137	};
138
139	reg_gnss: regulator-gnss {
140		compatible = "regulator-fixed";
141		pinctrl-names = "default";
142		pinctrl-0 = <&pinctrl_gnsspwr>;
143		regulator-name = "GNSS";
144		regulator-min-microvolt = <3300000>;
145		regulator-max-microvolt = <3300000>;
146		gpio = <&gpio3 12 GPIO_ACTIVE_HIGH>;
147		enable-active-high;
148	};
149
150	reg_hub: regulator-hub {
151		compatible = "regulator-fixed";
152		pinctrl-names = "default";
153		pinctrl-0 = <&pinctrl_hub_pwr>;
154		regulator-name = "HUB";
155		regulator-min-microvolt = <3300000>;
156		regulator-max-microvolt = <3300000>;
157		gpio = <&gpio1 14 GPIO_ACTIVE_HIGH>;
158		enable-active-high;
159	};
160
161	reg_lcd_1v8: regulator-lcd-1v8 {
162		compatible = "regulator-fixed";
163		pinctrl-names = "default";
164		pinctrl-0 = <&pinctrl_dsien>;
165		regulator-name = "LCD_1V8";
166		regulator-min-microvolt = <1800000>;
167		regulator-max-microvolt = <1800000>;
168		vin-supply = <&reg_vdd_1v8>;
169		gpio = <&gpio1 5 GPIO_ACTIVE_HIGH>;
170		enable-active-high;
171		/* Otherwise i2c3 is not functional */
172		regulator-always-on;
173	};
174
175	reg_lcd_3v4: regulator-lcd-3v4 {
176		compatible = "regulator-fixed";
177		regulator-name = "LCD_3V4";
178		pinctrl-names = "default";
179		pinctrl-0 = <&pinctrl_dsibiasen>;
180		vin-supply = <&reg_vsys_3v4>;
181		gpio = <&gpio1 20 GPIO_ACTIVE_HIGH>;
182		enable-active-high;
183	};
184
185	reg_vdd_sen: regulator-vdd-sen {
186		compatible = "regulator-fixed";
187		regulator-name = "VDD_SEN";
188		regulator-min-microvolt = <3300000>;
189		regulator-max-microvolt = <3300000>;
190	};
191
192	reg_vdd_1v8: regulator-vdd-1v8 {
193		compatible = "regulator-fixed";
194		regulator-name = "VDD_1V8";
195		regulator-min-microvolt = <1800000>;
196		regulator-max-microvolt = <1800000>;
197		vin-supply = <&buck7_reg>;
198	};
199
200	reg_vdd_3v3: regulator-vdd-3v3 {
201		compatible = "regulator-fixed";
202		regulator-name = "VDD_3V3";
203		regulator-min-microvolt = <3300000>;
204		regulator-max-microvolt = <3300000>;
205	};
206
207	reg_vsys_3v4: regulator-vsys-3v4 {
208		compatible = "regulator-fixed";
209		regulator-name = "VSYS_3V4";
210		regulator-min-microvolt = <3400000>;
211		regulator-max-microvolt = <3400000>;
212		regulator-always-on;
213	};
214
215	reg_wifi_3v3: regulator-wifi-3v3 {
216		compatible = "regulator-fixed";
217		pinctrl-names = "default";
218		pinctrl-0 = <&pinctrl_wifi_pwr>;
219		regulator-name = "3V3_WIFI";
220		regulator-min-microvolt = <3300000>;
221		regulator-max-microvolt = <3300000>;
222		gpio = <&gpio3 10 GPIO_ACTIVE_HIGH>;
223		enable-active-high;
224		vin-supply = <&reg_vdd_3v3>;
225	};
226
227	sound {
228		compatible = "simple-audio-card";
229		pinctrl-names = "default";
230		pinctrl-0 = <&pinctrl_hp>;
231		simple-audio-card,name = "Librem 5";
232		simple-audio-card,format = "i2s";
233		simple-audio-card,widgets =
234			"Headphone", "Headphones",
235			"Microphone", "Headset Mic",
236			"Microphone", "Digital Mic",
237			"Speaker", "Speaker";
238		simple-audio-card,routing =
239			"Headphones", "HPOUTL",
240			"Headphones", "HPOUTR",
241			"Speaker", "SPKOUTL",
242			"Speaker", "SPKOUTR",
243			"Headset Mic", "MICBIAS",
244			"IN3R", "Headset Mic",
245			"DMICDAT", "Digital Mic";
246		simple-audio-card,hp-det-gpio = <&gpio3 9 GPIO_ACTIVE_HIGH>;
247
248		simple-audio-card,cpu {
249			sound-dai = <&sai2>;
250		};
251
252		simple-audio-card,codec {
253			sound-dai = <&codec>;
254			clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
255			frame-master;
256			bitclock-master;
257		};
258	};
259
260	sound-wwan {
261		compatible = "simple-audio-card";
262		simple-audio-card,name = "Modem";
263		simple-audio-card,format = "i2s";
264
265		simple-audio-card,cpu {
266			sound-dai = <&sai6>;
267			frame-inversion;
268		};
269
270		simple-audio-card,codec {
271			sound-dai = <&bm818_codec>;
272			frame-master;
273			bitclock-master;
274		};
275	};
276
277	usdhc2_pwrseq: pwrseq {
278		pinctrl-names = "default";
279		pinctrl-0 = <&pinctrl_bt>, <&pinctrl_wifi_disable>;
280		compatible = "mmc-pwrseq-simple";
281		reset-gpios = <&gpio3 25 GPIO_ACTIVE_HIGH>,
282			      <&gpio4 29 GPIO_ACTIVE_HIGH>;
283	};
284
285	bm818_codec: sound-wwan-codec {
286		compatible = "broadmobi,bm818", "option,gtm601";
287		#sound-dai-cells = <0>;
288	};
289
290	vibrator {
291		compatible = "pwm-vibrator";
292		pwms = <&pwm1 0 1000000000 0>;
293		pwm-names = "enable";
294		vcc-supply = <&reg_vdd_3v3>;
295	};
296};
297
298&A53_0 {
299	cpu-supply = <&buck2_reg>;
300};
301
302&A53_1 {
303	cpu-supply = <&buck2_reg>;
304};
305
306&A53_2 {
307	cpu-supply = <&buck2_reg>;
308};
309
310&A53_3 {
311	cpu-supply = <&buck2_reg>;
312};
313
314&csi1 {
315	status = "okay";
316};
317
318&ddrc {
319	operating-points-v2 = <&ddrc_opp_table>;
320	status = "okay";
321
322	ddrc_opp_table: opp-table {
323		compatible = "operating-points-v2";
324
325		opp-25000000 {
326			opp-hz = /bits/ 64 <25000000>;
327		};
328
329		opp-100000000 {
330			opp-hz = /bits/ 64 <100000000>;
331		};
332
333		opp-166000000 {
334			opp-hz = /bits/ 64 <166935483>;
335		};
336
337		opp-800000000 {
338			opp-hz = /bits/ 64 <800000000>;
339		};
340	};
341};
342
343&dphy {
344	status = "okay";
345};
346
347&ecspi1 {
348	pinctrl-names = "default";
349	pinctrl-0 = <&pinctrl_ecspi1>;
350	cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
351	#address-cells = <1>;
352	#size-cells = <0>;
353	status = "okay";
354
355	nor_flash: flash@0 {
356		compatible = "jedec,spi-nor";
357		reg = <0>;
358		spi-max-frequency = <1000000>;
359		#address-cells = <1>;
360		#size-cells = <1>;
361
362		partition@0 {
363			label = "protected0";
364			reg = <0x0 0x30000>;
365			read-only;
366		};
367
368		partition@30000 {
369			label = "firmware";
370			reg = <0x30000 0x1d0000>;
371			read-only;
372		};
373	};
374};
375
376&gpio1 {
377	pinctrl-names = "default";
378	pinctrl-0 = <&pinctrl_pmic_5v>;
379
380	pmic-5v-hog {
381		gpio-hog;
382		gpios = <1 GPIO_ACTIVE_HIGH>;
383		input;
384		line-name = "pmic-5v";
385	};
386};
387
388&iomuxc {
389	pinctrl-names = "default";
390	pinctrl-0 = <&pinctrl_hog>;
391
392	pinctrl_hog: hoggrp {
393		fsl,pins = <
394			/* CLKO2 for cameras on both CSI1 and CSI2 */
395			MX8MQ_IOMUXC_GPIO1_IO15_CCMSRCGPCMIX_CLKO2      0x1f
396		>;
397	};
398
399	pinctrl_audiopwr: audiopwrgrp {
400		fsl,pins = <
401			/* AUDIO_POWER_EN_3V3 */
402			MX8MQ_IOMUXC_GPIO1_IO04_GPIO1_IO4	0x83
403		>;
404	};
405
406	pinctrl_bl: blgrp {
407		fsl,pins = <
408			/* BACKLINGE_EN */
409			MX8MQ_IOMUXC_NAND_DQS_GPIO3_IO14	0x83
410		>;
411	};
412
413	pinctrl_bt: btgrp {
414		fsl,pins = <
415			/* BT_REG_ON */
416			MX8MQ_IOMUXC_SAI5_MCLK_GPIO3_IO25	0x83
417		>;
418	};
419
420	pinctrl_camera_pwr: camerapwrgrp {
421		fsl,pins = <
422			/* CAMERA_PWR_EN_3V3 */
423			MX8MQ_IOMUXC_GPIO1_IO00_GPIO1_IO0	0x83
424		>;
425	};
426
427	pinctrl_csi1: csi1grp {
428		fsl,pins = <
429			/* CSI1_NRST */
430			MX8MQ_IOMUXC_ENET_RXC_GPIO1_IO25	0x83
431		>;
432	};
433
434	pinctrl_charger_in: chargeringrp {
435		fsl,pins = <
436			/* CHRG_INT */
437			MX8MQ_IOMUXC_NAND_CE2_B_GPIO3_IO3	0x80
438		>;
439	};
440
441	pinctrl_dsibiasen: dsibiasengrp {
442		fsl,pins = <
443			/* DSI_BIAS_EN */
444			MX8MQ_IOMUXC_ENET_TD1_GPIO1_IO20	0x83
445		>;
446	};
447
448	pinctrl_dsien: dsiengrp {
449		fsl,pins = <
450			/* DSI_EN_3V3 */
451			MX8MQ_IOMUXC_GPIO1_IO05_GPIO1_IO5	0x83
452		>;
453	};
454
455	pinctrl_dsirst: dsirstgrp {
456		fsl,pins = <
457			/* DSI_RST */
458			MX8MQ_IOMUXC_ENET_RD3_GPIO1_IO29	0x83
459			/* DSI_TE */
460			MX8MQ_IOMUXC_ENET_RD2_GPIO1_IO28	0x83
461			/* TP_RST */
462			MX8MQ_IOMUXC_ENET_RX_CTL_GPIO1_IO24	0x83
463		>;
464	};
465
466	pinctrl_ecspi1: ecspigrp {
467		fsl,pins = <
468			MX8MQ_IOMUXC_ECSPI1_MOSI_ECSPI1_MOSI	0x83
469			MX8MQ_IOMUXC_ECSPI1_MISO_ECSPI1_MISO	0x83
470			MX8MQ_IOMUXC_ECSPI1_SS0_GPIO5_IO9	0x19
471			MX8MQ_IOMUXC_ECSPI1_SCLK_ECSPI1_SCLK	0x83
472		>;
473	};
474
475	pinctrl_gauge: gaugegrp {
476		fsl,pins = <
477			/* BAT_LOW */
478			MX8MQ_IOMUXC_SAI5_RXC_GPIO3_IO20	0x80
479		>;
480	};
481
482	pinctrl_gnsspwr: gnsspwrgrp {
483		fsl,pins = <
484			/* GPS3V3_EN */
485			MX8MQ_IOMUXC_NAND_DATA06_GPIO3_IO12	0x83
486		>;
487	};
488
489	pinctrl_haptic: hapticgrp {
490		fsl,pins = <
491			/* MOTO */
492			MX8MQ_IOMUXC_SPDIF_EXT_CLK_PWM1_OUT	0x83
493		>;
494	};
495
496	pinctrl_hp: hpgrp {
497		fsl,pins = <
498			/* HEADPHONE_DET_1V8 */
499			MX8MQ_IOMUXC_NAND_DATA03_GPIO3_IO9	0x180
500		>;
501	};
502
503	pinctrl_hub_pwr: hubpwrgrp {
504		fsl,pins = <
505			/* HUB_PWR_3V3_EN */
506			MX8MQ_IOMUXC_GPIO1_IO14_GPIO1_IO14	0x83
507		>;
508	};
509
510	pinctrl_i2c1: i2c1grp {
511		fsl,pins = <
512			MX8MQ_IOMUXC_I2C1_SCL_I2C1_SCL		0x40000026
513			MX8MQ_IOMUXC_I2C1_SDA_I2C1_SDA		0x40000026
514		>;
515	};
516
517	pinctrl_i2c2: i2c2grp {
518		fsl,pins = <
519			MX8MQ_IOMUXC_I2C2_SCL_I2C2_SCL		0x40000026
520			MX8MQ_IOMUXC_I2C2_SDA_I2C2_SDA		0x40000026
521		>;
522	};
523
524	pinctrl_i2c3: i2c3grp {
525		fsl,pins = <
526			MX8MQ_IOMUXC_I2C3_SCL_I2C3_SCL		0x40000026
527			MX8MQ_IOMUXC_I2C3_SDA_I2C3_SDA		0x40000026
528		>;
529	};
530
531	pinctrl_i2c4: i2c4grp {
532		fsl,pins = <
533			MX8MQ_IOMUXC_I2C4_SCL_I2C4_SCL		0x40000026
534			MX8MQ_IOMUXC_I2C4_SDA_I2C4_SDA		0x40000026
535		>;
536	};
537
538	pinctrl_keys: keysgrp {
539		fsl,pins = <
540			/* VOL- */
541			MX8MQ_IOMUXC_ENET_MDIO_GPIO1_IO17	0x01C0
542			/* VOL+ */
543			MX8MQ_IOMUXC_ENET_MDC_GPIO1_IO16	0x01C0
544		>;
545	};
546
547	pinctrl_led_b: ledbgrp {
548		fsl,pins = <
549			/* LED_B */
550			MX8MQ_IOMUXC_GPIO1_IO13_PWM2_OUT	0x06
551		>;
552	};
553
554	pinctrl_led_g: ledggrp {
555		fsl,pins = <
556			/* LED_G */
557			MX8MQ_IOMUXC_SAI3_MCLK_PWM4_OUT		0x06
558		>;
559	};
560
561	pinctrl_led_r: ledrgrp {
562		fsl,pins = <
563			/* LED_R */
564			MX8MQ_IOMUXC_SPDIF_TX_PWM3_OUT		0x06
565		>;
566	};
567
568	pinctrl_mag: maggrp {
569		fsl,pins = <
570			/* INT_MAG */
571			MX8MQ_IOMUXC_SAI5_RXD1_GPIO3_IO22	0x80
572		>;
573	};
574
575	pinctrl_pmic: pmicgrp {
576		fsl,pins = <
577			/* PMIC_NINT */
578			MX8MQ_IOMUXC_GPIO1_IO07_GPIO1_IO7	0x80
579		>;
580	};
581
582	pinctrl_pmic_5v: pmic5vgrp {
583		fsl,pins = <
584			/* PMIC_5V */
585			MX8MQ_IOMUXC_GPIO1_IO01_GPIO1_IO1	0x80
586		>;
587	};
588
589	pinctrl_prox: proxgrp {
590		fsl,pins = <
591			/* INT_LIGHT */
592			MX8MQ_IOMUXC_NAND_DATA01_GPIO3_IO7	0x80
593		>;
594	};
595
596	pinctrl_rtc: rtcgrp {
597		fsl,pins = <
598			/* RTC_INT */
599			MX8MQ_IOMUXC_GPIO1_IO09_GPIO1_IO9	0x80
600		>;
601	};
602
603	pinctrl_sai2: sai2grp {
604		fsl,pins = <
605			MX8MQ_IOMUXC_SAI2_TXD0_SAI2_TX_DATA0	0xd6
606			MX8MQ_IOMUXC_SAI2_TXFS_SAI2_TX_SYNC	0xd6
607			MX8MQ_IOMUXC_SAI2_MCLK_SAI2_MCLK	0xd6
608			MX8MQ_IOMUXC_SAI2_RXD0_SAI2_RX_DATA0	0xd6
609			MX8MQ_IOMUXC_SAI2_TXC_SAI2_TX_BCLK	0xd6
610		>;
611	};
612
613	pinctrl_sai6: sai6grp {
614		fsl,pins = <
615			MX8MQ_IOMUXC_SAI1_RXD5_SAI6_RX_DATA0	0xd6
616			MX8MQ_IOMUXC_SAI1_RXD6_SAI6_RX_SYNC	0xd6
617			MX8MQ_IOMUXC_SAI1_TXD4_SAI6_RX_BCLK	0xd6
618			MX8MQ_IOMUXC_SAI1_TXD5_SAI6_TX_DATA0	0xd6
619		>;
620	};
621
622	pinctrl_tcpc: tcpcgrp {
623		fsl,pins = <
624			/* TCPC_INT */
625			MX8MQ_IOMUXC_GPIO1_IO10_GPIO1_IO10	0x01C0
626		>;
627	};
628
629	pinctrl_touch: touchgrp {
630		fsl,pins = <
631			/* TP_INT */
632			MX8MQ_IOMUXC_ENET_RD1_GPIO1_IO27	0x80
633		>;
634	};
635
636	pinctrl_typec: typecgrp {
637		fsl,pins = <
638			/* TYPEC_MUX_EN */
639			MX8MQ_IOMUXC_GPIO1_IO11_GPIO1_IO11	0x83
640		>;
641	};
642
643	pinctrl_uart1: uart1grp {
644		fsl,pins = <
645			MX8MQ_IOMUXC_UART1_RXD_UART1_DCE_RX	0x49
646			MX8MQ_IOMUXC_UART1_TXD_UART1_DCE_TX	0x49
647		>;
648	};
649
650	pinctrl_uart2: uart2grp {
651		fsl,pins = <
652			MX8MQ_IOMUXC_UART2_TXD_UART2_DCE_TX	0x49
653			MX8MQ_IOMUXC_UART2_RXD_UART2_DCE_RX	0x49
654		>;
655	};
656
657	pinctrl_uart3: uart3grp {
658		fsl,pins = <
659			MX8MQ_IOMUXC_UART3_RXD_UART3_DCE_RX	0x49
660			MX8MQ_IOMUXC_UART3_TXD_UART3_DCE_TX	0x49
661		>;
662	};
663
664	pinctrl_uart4: uart4grp {
665		fsl,pins = <
666			MX8MQ_IOMUXC_ECSPI2_SCLK_UART4_DCE_RX		0x49
667			MX8MQ_IOMUXC_ECSPI2_MOSI_UART4_DCE_TX		0x49
668			MX8MQ_IOMUXC_ECSPI2_MISO_UART4_DCE_CTS_B	0x49
669			MX8MQ_IOMUXC_ECSPI2_SS0_UART4_DCE_RTS_B		0x49
670		>;
671	};
672
673	pinctrl_usdhc1: usdhc1grp {
674		fsl,pins = <
675			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x83
676			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xc3
677			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xc3
678			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xc3
679			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xc3
680			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xc3
681			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xc3
682			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xc3
683			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xc3
684			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xc3
685			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x83
686			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
687		>;
688	};
689
690	pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp {
691		fsl,pins = <
692			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x8d
693			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xcd
694			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xcd
695			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xcd
696			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xcd
697			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xcd
698			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xcd
699			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xcd
700			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xcd
701			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xcd
702			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x8d
703			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
704		>;
705	};
706
707	pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp {
708		fsl,pins = <
709			MX8MQ_IOMUXC_SD1_CLK_USDHC1_CLK			0x9f
710			MX8MQ_IOMUXC_SD1_CMD_USDHC1_CMD			0xdf
711			MX8MQ_IOMUXC_SD1_DATA0_USDHC1_DATA0		0xdf
712			MX8MQ_IOMUXC_SD1_DATA1_USDHC1_DATA1		0xdf
713			MX8MQ_IOMUXC_SD1_DATA2_USDHC1_DATA2		0xdf
714			MX8MQ_IOMUXC_SD1_DATA3_USDHC1_DATA3		0xdf
715			MX8MQ_IOMUXC_SD1_DATA4_USDHC1_DATA4		0xdf
716			MX8MQ_IOMUXC_SD1_DATA5_USDHC1_DATA5		0xdf
717			MX8MQ_IOMUXC_SD1_DATA6_USDHC1_DATA6		0xdf
718			MX8MQ_IOMUXC_SD1_DATA7_USDHC1_DATA7		0xdf
719			MX8MQ_IOMUXC_SD1_STROBE_USDHC1_STROBE		0x9f
720			MX8MQ_IOMUXC_SD1_RESET_B_USDHC1_RESET_B		0xc1
721		>;
722	};
723
724	pinctrl_usdhc2: usdhc2grp {
725		fsl,pins = <
726			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
727			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x83
728			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xc3
729			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xc3
730			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xc3
731			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xc3
732			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xc3
733			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
734		>;
735	};
736
737	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
738		fsl,pins = <
739			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
740			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x8d
741			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcd
742			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcd
743			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcd
744			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcd
745			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcd
746			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
747		>;
748	};
749
750	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
751		fsl,pins = <
752			MX8MQ_IOMUXC_SD2_CD_B_GPIO2_IO12	0x80
753			MX8MQ_IOMUXC_SD2_CLK_USDHC2_CLK		0x9f
754			MX8MQ_IOMUXC_SD2_CMD_USDHC2_CMD		0xcf
755			MX8MQ_IOMUXC_SD2_DATA0_USDHC2_DATA0	0xcf
756			MX8MQ_IOMUXC_SD2_DATA1_USDHC2_DATA1	0xcf
757			MX8MQ_IOMUXC_SD2_DATA2_USDHC2_DATA2	0xcf
758			MX8MQ_IOMUXC_SD2_DATA3_USDHC2_DATA3	0xcf
759			MX8MQ_IOMUXC_SD2_RESET_B_USDHC2_RESET_B 0xc1
760		>;
761	};
762
763	pinctrl_wifi_disable: wifidisablegrp {
764		fsl,pins = <
765			/* WIFI_REG_ON */
766			MX8MQ_IOMUXC_SAI3_RXC_GPIO4_IO29	0x83
767		>;
768	};
769
770	pinctrl_wifi_pwr: wifipwrgrp {
771		fsl,pins = <
772			/* WIFI3V3_EN */
773			MX8MQ_IOMUXC_NAND_DATA04_GPIO3_IO10	0x83
774		>;
775	};
776
777	pinctrl_wdog: wdoggrp {
778		fsl,pins = <
779			/* nWDOG */
780			MX8MQ_IOMUXC_GPIO1_IO02_WDOG1_WDOG_B	0x1f
781		>;
782	};
783};
784
785&i2c1 {
786	clock-frequency = <384000>;
787	pinctrl-names = "default";
788	pinctrl-0 = <&pinctrl_i2c1>;
789	status = "okay";
790
791	typec_pd: usb-pd@3f {
792		compatible = "ti,tps6598x";
793		reg = <0x3f>;
794		pinctrl-names = "default";
795		pinctrl-0 = <&pinctrl_typec>, <&pinctrl_tcpc>;
796		interrupt-parent = <&gpio1>;
797		interrupts = <10 IRQ_TYPE_LEVEL_LOW>;
798		interrupt-names = "irq";
799		extcon = <&usb3_phy0>;
800		wakeup-source;
801
802		connector {
803			compatible = "usb-c-connector";
804			label = "USB-C";
805			data-role = "dual";
806
807			ports {
808				#address-cells = <1>;
809				#size-cells = <0>;
810
811				port@0 {
812					reg = <0>;
813
814					usb_con_hs: endpoint {
815						remote-endpoint = <&typec_hs>;
816					};
817				};
818
819				port@1 {
820					reg = <1>;
821
822					usb_con_ss: endpoint {
823						remote-endpoint = <&typec_ss>;
824					};
825				};
826			};
827		};
828	};
829
830	pmic: pmic@4b {
831		compatible = "rohm,bd71837";
832		reg = <0x4b>;
833		pinctrl-names = "default";
834		pinctrl-0 = <&pinctrl_pmic>, <&pinctrl_camera_pwr>;
835		clocks = <&pmic_osc>;
836		#clock-cells = <0>;
837		clock-names = "osc";
838		clock-output-names = "pmic_clk";
839		interrupt-parent = <&gpio1>;
840		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
841		rohm,reset-snvs-powered;
842
843		regulators {
844			buck1_reg: BUCK1 {
845				regulator-name = "buck1";
846				regulator-min-microvolt = <700000>;
847				regulator-max-microvolt = <1300000>;
848				regulator-boot-on;
849				regulator-ramp-delay = <1250>;
850				rohm,dvs-run-voltage = <880000>;
851				rohm,dvs-idle-voltage = <820000>;
852				rohm,dvs-suspend-voltage = <810000>;
853				regulator-always-on;
854			};
855
856			buck2_reg: BUCK2 {
857				regulator-name = "buck2";
858				regulator-min-microvolt = <700000>;
859				regulator-max-microvolt = <1300000>;
860				regulator-boot-on;
861				regulator-ramp-delay = <1250>;
862				rohm,dvs-run-voltage = <950000>;
863				rohm,dvs-idle-voltage = <850000>;
864				regulator-always-on;
865			};
866
867			buck3_reg: BUCK3 {
868				regulator-name = "buck3";
869				regulator-min-microvolt = <700000>;
870				regulator-max-microvolt = <1300000>;
871				regulator-boot-on;
872				rohm,dvs-run-voltage = <850000>;
873			};
874
875			buck4_reg: BUCK4 {
876				regulator-name = "buck4";
877				regulator-min-microvolt = <700000>;
878				regulator-max-microvolt = <1300000>;
879				rohm,dvs-run-voltage = <930000>;
880			};
881
882			buck5_reg: BUCK5 {
883				regulator-name = "buck5";
884				regulator-min-microvolt = <700000>;
885				regulator-max-microvolt = <1350000>;
886				regulator-boot-on;
887				regulator-always-on;
888			};
889
890			buck6_reg: BUCK6 {
891				regulator-name = "buck6";
892				regulator-min-microvolt = <3000000>;
893				regulator-max-microvolt = <3300000>;
894				regulator-boot-on;
895				regulator-always-on;
896			};
897
898			buck7_reg: BUCK7 {
899				regulator-name = "buck7";
900				regulator-min-microvolt = <1605000>;
901				regulator-max-microvolt = <1995000>;
902				regulator-boot-on;
903				regulator-always-on;
904			};
905
906			buck8_reg: BUCK8 {
907				regulator-name = "buck8";
908				regulator-min-microvolt = <800000>;
909				regulator-max-microvolt = <1400000>;
910				regulator-boot-on;
911				regulator-always-on;
912			};
913
914			ldo1_reg: LDO1 {
915				regulator-name = "ldo1";
916				regulator-min-microvolt = <3000000>;
917				regulator-max-microvolt = <3300000>;
918				regulator-boot-on;
919				/* leave on for snvs power button */
920				regulator-always-on;
921			};
922
923			ldo2_reg: LDO2 {
924				regulator-name = "ldo2";
925				regulator-min-microvolt = <900000>;
926				regulator-max-microvolt = <900000>;
927				regulator-boot-on;
928				/* leave on for snvs power button */
929				regulator-always-on;
930			};
931
932			ldo3_reg: LDO3 {
933				regulator-name = "ldo3";
934				regulator-min-microvolt = <1800000>;
935				regulator-max-microvolt = <3300000>;
936				regulator-boot-on;
937				regulator-always-on;
938			};
939
940			ldo4_reg: LDO4 {
941				regulator-name = "ldo4";
942				regulator-min-microvolt = <900000>;
943				regulator-max-microvolt = <1800000>;
944				regulator-boot-on;
945				regulator-always-on;
946			};
947
948			ldo5_reg: LDO5 {
949				/* VDD_PHY_0V9 - MIPI and HDMI domains */
950				regulator-name = "ldo5";
951				regulator-min-microvolt = <1800000>;
952				regulator-max-microvolt = <3300000>;
953				regulator-always-on;
954			};
955
956			ldo6_reg: LDO6 {
957				/* VDD_PHY_0V9 - MIPI, HDMI and USB domains */
958				regulator-name = "ldo6";
959				regulator-min-microvolt = <900000>;
960				regulator-max-microvolt = <1800000>;
961				regulator-boot-on;
962				regulator-always-on;
963			};
964
965			ldo7_reg: LDO7 {
966				/* VDD_PHY_3V3 - USB domain */
967				regulator-name = "ldo7";
968				regulator-min-microvolt = <1800000>;
969				regulator-max-microvolt = <3300000>;
970				regulator-boot-on;
971				regulator-always-on;
972			};
973		};
974	};
975
976	rtc@68 {
977		compatible = "microcrystal,rv4162";
978		reg = <0x68>;
979		pinctrl-names = "default";
980		pinctrl-0 = <&pinctrl_rtc>;
981		interrupt-parent = <&gpio1>;
982		interrupts = <9 IRQ_TYPE_LEVEL_LOW>;
983	};
984};
985
986&i2c2 {
987	clock-frequency = <384000>;
988	pinctrl-names = "default";
989	pinctrl-0 = <&pinctrl_i2c2>;
990	status = "okay";
991
992	magnetometer: magnetometer@1e	{
993		compatible = "st,lsm9ds1-magn";
994		reg = <0x1e>;
995		pinctrl-names = "default";
996		pinctrl-0 = <&pinctrl_mag>;
997		interrupt-parent = <&gpio3>;
998		interrupts = <22 IRQ_TYPE_LEVEL_HIGH>;
999		vdd-supply = <&reg_vdd_sen>;
1000		vddio-supply = <&reg_vdd_1v8>;
1001	};
1002
1003	regulator@3e {
1004		compatible = "ti,tps65132";
1005		reg = <0x3e>;
1006
1007		reg_lcd_avdd: outp {
1008			regulator-name = "LCD_AVDD";
1009			vin-supply = <&reg_lcd_3v4>;
1010		};
1011
1012		reg_lcd_avee: outn {
1013			regulator-name = "LCD_AVEE";
1014			vin-supply = <&reg_lcd_3v4>;
1015		};
1016	};
1017
1018	proximity: prox@60 {
1019		compatible = "vishay,vcnl4040";
1020		reg = <0x60>;
1021		pinctrl-names = "default";
1022		pinctrl-0 = <&pinctrl_prox>;
1023		interrupt-parent = <&gpio3>;
1024		interrupts = <7 IRQ_TYPE_LEVEL_LOW>;
1025	};
1026
1027	accel_gyro: accel-gyro@6a	{
1028		compatible = "st,lsm9ds1-imu";
1029		reg = <0x6a>;
1030		vdd-supply = <&reg_vdd_sen>;
1031		vddio-supply = <&reg_vdd_1v8>;
1032	};
1033};
1034
1035&i2c3 {
1036	clock-frequency = <384000>;
1037	pinctrl-names = "default";
1038	pinctrl-0 = <&pinctrl_i2c3>;
1039	status = "okay";
1040
1041	codec: audio-codec@1a {
1042		compatible = "wlf,wm8962";
1043		reg = <0x1a>;
1044		clocks = <&clk IMX8MQ_CLK_SAI2_ROOT>;
1045		assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1046		assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1047		assigned-clock-rates = <24576000>;
1048		#sound-dai-cells = <0>;
1049		mic-cfg = <0x200>;
1050		DCVDD-supply = <&reg_aud_1v8>;
1051		DBVDD-supply = <&reg_aud_1v8>;
1052		AVDD-supply = <&reg_aud_1v8>;
1053		CPVDD-supply = <&reg_aud_1v8>;
1054		MICVDD-supply = <&reg_mic_2v4>;
1055		PLLVDD-supply = <&reg_aud_1v8>;
1056		SPKVDD1-supply = <&reg_vsys_3v4>;
1057		SPKVDD2-supply = <&reg_vsys_3v4>;
1058		gpio-cfg = <
1059			0x0000 /* n/c */
1060			0x0001 /* gpio2, 1: default */
1061			0x0013 /* gpio3, 2: dmicclk */
1062			0x0000 /* n/c, 3: default */
1063			0x8014 /* gpio5, 4: dmic_dat */
1064			0x0000 /* gpio6, 5: default */
1065		>;
1066	};
1067
1068	camera_front: camera@20 {
1069		compatible = "hynix,hi846";
1070		reg = <0x20>;
1071		pinctrl-names = "default";
1072		pinctrl-0 = <&pinctrl_csi1>;
1073		clocks = <&clk IMX8MQ_CLK_CLKO2>;
1074		assigned-clocks = <&clk IMX8MQ_CLK_CLKO2>;
1075		assigned-clock-rates = <25000000>;
1076		reset-gpios = <&gpio1 25 GPIO_ACTIVE_LOW>;
1077		vdda-supply = <&reg_vcam_2v8>;
1078		vddd-supply = <&reg_vcam_1v2>;
1079		vddio-supply = <&reg_csi_1v8>;
1080		rotation = <90>;
1081		orientation = <0>;
1082
1083		port {
1084			camera1_ep: endpoint {
1085				data-lanes = <1 2>;
1086				link-frequencies = /bits/ 64
1087					<80000000 200000000 300000000>;
1088				remote-endpoint = <&mipi1_sensor_ep>;
1089			};
1090		};
1091	};
1092
1093	backlight@36 {
1094		compatible = "ti,lm36922";
1095		reg = <0x36>;
1096		pinctrl-names = "default";
1097		pinctrl-0 = <&pinctrl_bl>;
1098		#address-cells = <1>;
1099		#size-cells = <0>;
1100		enable-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
1101		vled-supply = <&reg_vsys_3v4>;
1102		ti,ovp-microvolt = <25000000>;
1103
1104		led_backlight: led@0 {
1105			reg = <0>;
1106			label = ":backlight";
1107			linux,default-trigger = "backlight";
1108			led-max-microamp = <20000>;
1109		};
1110	};
1111
1112	touchscreen@38 {
1113		compatible = "edt,edt-ft5506";
1114		reg = <0x38>;
1115		pinctrl-names = "default";
1116		pinctrl-0 = <&pinctrl_touch>;
1117		interrupt-parent = <&gpio1>;
1118		interrupts = <27 IRQ_TYPE_EDGE_FALLING>;
1119		touchscreen-size-x = <720>;
1120		touchscreen-size-y = <1440>;
1121		vcc-supply = <&reg_lcd_1v8>;
1122	};
1123};
1124
1125&i2c4 {
1126	clock-frequency = <384000>;
1127	pinctrl-names = "default";
1128	pinctrl-0 = <&pinctrl_i2c4>;
1129	status = "okay";
1130
1131	vcm@c {
1132		compatible = "dongwoon,dw9714";
1133		reg = <0x0c>;
1134		vcc-supply = <&reg_csi_1v8>;
1135	};
1136
1137	bat: fuel-gauge@36 {
1138		compatible = "maxim,max17055";
1139		reg = <0x36>;
1140		interrupt-parent = <&gpio3>;
1141		interrupts = <20 IRQ_TYPE_LEVEL_LOW>;
1142		pinctrl-names = "default";
1143		pinctrl-0 = <&pinctrl_gauge>;
1144		power-supplies = <&bq25895>;
1145		maxim,over-heat-temp = <700>;
1146		maxim,over-volt = <4500>;
1147		maxim,rsns-microohm = <5000>;
1148	};
1149
1150	bq25895: charger@6a {
1151		compatible = "ti,bq25895", "ti,bq25890";
1152		reg = <0x6a>;
1153		pinctrl-names = "default";
1154		pinctrl-0 = <&pinctrl_charger_in>;
1155		interrupt-parent = <&gpio3>;
1156		interrupts = <3 IRQ_TYPE_EDGE_FALLING>;
1157		ti,battery-regulation-voltage = <4208000>; /* uV */
1158		ti,termination-current = <128000>;  /* uA */
1159		ti,precharge-current = <128000>; /* uA */
1160		ti,minimum-sys-voltage = <3700000>; /* uV */
1161		ti,boost-voltage = <5000000>; /* uV */
1162		ti,boost-max-current = <1500000>; /* uA */
1163		monitored-battery = <&bat>;
1164		power-supplies = <&typec_pd>;
1165	};
1166};
1167
1168&lcdif {
1169	status = "okay";
1170};
1171
1172&mipi_csi1 {
1173	assigned-clock-rates = <266000000>, <200000000>, <66000000>;
1174	status = "okay";
1175
1176	ports {
1177		port@0 {
1178			reg = <0>;
1179
1180			mipi1_sensor_ep: endpoint {
1181				remote-endpoint = <&camera1_ep>;
1182				data-lanes = <1 2>;
1183			};
1184		};
1185	};
1186};
1187
1188&mipi_dsi {
1189	#address-cells = <1>;
1190	#size-cells = <0>;
1191	status = "okay";
1192
1193	lcd_panel: panel@0 {
1194		compatible = "mantix,mlaf057we51-x";
1195		reg = <0>;
1196		pinctrl-names = "default";
1197		pinctrl-0 = <&pinctrl_dsirst>;
1198		avdd-supply = <&reg_lcd_avdd>;
1199		avee-supply = <&reg_lcd_avee>;
1200		vddi-supply = <&reg_lcd_1v8>;
1201		backlight = <&backlight_dsi>;
1202		reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>;
1203		mantix,tp-rstn-gpios = <&gpio1 24 GPIO_ACTIVE_LOW>;
1204
1205		port {
1206			panel_in: endpoint {
1207				remote-endpoint = <&mipi_dsi_out>;
1208			};
1209		};
1210	};
1211
1212	ports {
1213		port@1 {
1214			reg = <1>;
1215
1216			mipi_dsi_out: endpoint {
1217				remote-endpoint = <&panel_in>;
1218			};
1219		};
1220	};
1221};
1222
1223&pgc_gpu {
1224	power-supply = <&buck3_reg>;
1225};
1226
1227&pgc_mipi {
1228	power-supply = <&ldo5_reg>;
1229};
1230
1231&pgc_vpu {
1232	power-supply = <&buck4_reg>;
1233};
1234
1235&pwm1 {
1236	pinctrl-names = "default";
1237	pinctrl-0 = <&pinctrl_haptic>;
1238	status = "okay";
1239};
1240
1241&pwm2 {
1242	pinctrl-names = "default";
1243	pinctrl-0 = <&pinctrl_led_b>;
1244	status = "okay";
1245};
1246
1247&pwm3 {
1248	pinctrl-names = "default";
1249	pinctrl-0 = <&pinctrl_led_r>;
1250	status = "okay";
1251};
1252
1253&pwm4 {
1254	pinctrl-names = "default";
1255	pinctrl-0 = <&pinctrl_led_g>;
1256	status = "okay";
1257};
1258
1259&sai2 {
1260	pinctrl-names = "default";
1261	pinctrl-0 = <&pinctrl_sai2>;
1262	assigned-clocks = <&clk IMX8MQ_CLK_SAI2>;
1263	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1264	assigned-clock-rates = <24576000>;
1265	status = "okay";
1266};
1267
1268&sai6 {
1269	pinctrl-names = "default";
1270	pinctrl-0 = <&pinctrl_sai6>;
1271	assigned-clocks = <&clk IMX8MQ_CLK_SAI6>;
1272	assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1_OUT>;
1273	assigned-clock-rates = <24576000>;
1274	fsl,sai-synchronous-rx;
1275	status = "okay";
1276};
1277
1278&snvs_pwrkey {
1279	status = "okay";
1280};
1281
1282&snvs_rtc {
1283	status = "disabled";
1284};
1285
1286&uart1 { /* console */
1287	pinctrl-names = "default";
1288	pinctrl-0 = <&pinctrl_uart1>;
1289	status = "okay";
1290};
1291
1292&uart2 { /* TPS - GPS - DEBUG */
1293	pinctrl-names = "default";
1294	pinctrl-0 = <&pinctrl_uart2>;
1295	status = "okay";
1296
1297	gnss {
1298		compatible = "globaltop,pa6h";
1299		vcc-supply = <&reg_gnss>;
1300		current-speed = <9600>;
1301	};
1302};
1303
1304&uart3 { /* SMC */
1305	pinctrl-names = "default";
1306	pinctrl-0 = <&pinctrl_uart3>;
1307	status = "okay";
1308};
1309
1310&uart4 { /* BT */
1311	pinctrl-names = "default";
1312	pinctrl-0 = <&pinctrl_uart4>;
1313	uart-has-rtscts;
1314	status = "okay";
1315};
1316
1317&usb3_phy0 {
1318	status = "okay";
1319};
1320
1321&usb3_phy1 {
1322	vbus-supply = <&reg_hub>;
1323	status = "okay";
1324};
1325
1326&usb_dwc3_0 {
1327	#address-cells = <1>;
1328	#size-cells = <0>;
1329	dr_mode = "otg";
1330	usb-role-switch;
1331	status = "okay";
1332
1333	port@0 {
1334		reg = <0>;
1335
1336		typec_hs: endpoint {
1337			remote-endpoint = <&usb_con_hs>;
1338		};
1339	};
1340
1341	port@1 {
1342		reg = <1>;
1343
1344		typec_ss: endpoint {
1345			remote-endpoint = <&usb_con_ss>;
1346		};
1347	};
1348};
1349
1350&usb_dwc3_1 {
1351	dr_mode = "host";
1352	status = "okay";
1353	#address-cells = <1>;
1354	#size-cells = <0>;
1355
1356	/* Microchip USB2642 */
1357	hub@1 {
1358		compatible = "usb424,2640";
1359		reg = <1>;
1360		#address-cells = <1>;
1361		#size-cells = <0>;
1362
1363		mass-storage@1 {
1364			compatible = "usb424,4041";
1365			reg = <1>;
1366		};
1367	};
1368};
1369
1370&usdhc1 {
1371	assigned-clocks = <&clk IMX8MQ_CLK_USDHC1>;
1372	assigned-clock-rates = <400000000>;
1373	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1374	pinctrl-0 = <&pinctrl_usdhc1>;
1375	pinctrl-1 = <&pinctrl_usdhc1_100mhz>;
1376	pinctrl-2 = <&pinctrl_usdhc1_200mhz>;
1377	bus-width = <8>;
1378	vmmc-supply = <&reg_vdd_3v3>;
1379	vqmmc-supply = <&reg_vdd_1v8>;
1380	non-removable;
1381	status = "okay";
1382};
1383
1384&usdhc2 {
1385	assigned-clocks = <&clk IMX8MQ_CLK_USDHC2>;
1386	assigned-clock-rates = <200000000>;
1387	pinctrl-names = "default", "state_100mhz", "state_200mhz";
1388	pinctrl-0 = <&pinctrl_usdhc2>;
1389	pinctrl-1 = <&pinctrl_usdhc2_100mhz>;
1390	pinctrl-2 = <&pinctrl_usdhc2_200mhz>;
1391	bus-width = <4>;
1392	vmmc-supply = <&reg_wifi_3v3>;
1393	mmc-pwrseq = <&usdhc2_pwrseq>;
1394	post-power-on-delay-ms = <20>;
1395	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
1396	max-frequency = <100000000>;
1397	disable-wp;
1398	cap-sdio-irq;
1399	keep-power-in-suspend;
1400	wakeup-source;
1401	status = "okay";
1402};
1403
1404&wdog1 {
1405	pinctrl-names = "default";
1406	pinctrl-0 = <&pinctrl_wdog>;
1407	fsl,ext-reset-output;
1408	status = "okay";
1409};
1410
1411&a53_opp_table {
1412	opp-1000000000 {
1413		opp-microvolt = <850000>;
1414	};
1415
1416	opp-1500000000 {
1417		opp-microvolt = <950000>;
1418	};
1419};
1420