1*8d13bc63SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2*8d13bc63SEmmanuel Vadot 3*8d13bc63SEmmanuel Vadot/dts-v1/; 4*8d13bc63SEmmanuel Vadot 5*8d13bc63SEmmanuel Vadot#include "imx8mp-skov-reva.dtsi" 6*8d13bc63SEmmanuel Vadot 7*8d13bc63SEmmanuel Vadot/ { 8*8d13bc63SEmmanuel Vadot model = "SKOV IMX8MP CPU revB - MI1010AIT-1CP1"; 9*8d13bc63SEmmanuel Vadot compatible = "skov,imx8mp-skov-revb-mi1010ait-1cp1", "fsl,imx8mp"; 10*8d13bc63SEmmanuel Vadot 11*8d13bc63SEmmanuel Vadot panel { 12*8d13bc63SEmmanuel Vadot compatible = "multi-inno,mi1010ait-1cp"; 13*8d13bc63SEmmanuel Vadot backlight = <&backlight>; 14*8d13bc63SEmmanuel Vadot power-supply = <®_tft_vcom>; 15*8d13bc63SEmmanuel Vadot 16*8d13bc63SEmmanuel Vadot port { 17*8d13bc63SEmmanuel Vadot in_lvds0: endpoint { 18*8d13bc63SEmmanuel Vadot remote-endpoint = <&ldb_lvds_ch0>; 19*8d13bc63SEmmanuel Vadot }; 20*8d13bc63SEmmanuel Vadot }; 21*8d13bc63SEmmanuel Vadot }; 22*8d13bc63SEmmanuel Vadot}; 23*8d13bc63SEmmanuel Vadot 24*8d13bc63SEmmanuel Vadot&backlight { 25*8d13bc63SEmmanuel Vadot status = "okay"; 26*8d13bc63SEmmanuel Vadot}; 27*8d13bc63SEmmanuel Vadot 28*8d13bc63SEmmanuel Vadot&i2c2 { 29*8d13bc63SEmmanuel Vadot clock-frequency = <100000>; 30*8d13bc63SEmmanuel Vadot pinctrl-names = "default"; 31*8d13bc63SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c2>; 32*8d13bc63SEmmanuel Vadot status = "okay"; 33*8d13bc63SEmmanuel Vadot 34*8d13bc63SEmmanuel Vadot touchscreen@38 { 35*8d13bc63SEmmanuel Vadot compatible = "edt,edt-ft5406"; 36*8d13bc63SEmmanuel Vadot reg = <0x38>; 37*8d13bc63SEmmanuel Vadot pinctrl-names = "default"; 38*8d13bc63SEmmanuel Vadot pinctrl-0 = <&pinctrl_touchscreen>; 39*8d13bc63SEmmanuel Vadot interrupts-extended = <&gpio4 28 IRQ_TYPE_EDGE_FALLING>; 40*8d13bc63SEmmanuel Vadot reset-gpios = <&gpio4 29 GPIO_ACTIVE_LOW>; 41*8d13bc63SEmmanuel Vadot touchscreen-size-x = <1280>; 42*8d13bc63SEmmanuel Vadot touchscreen-size-y = <800>; 43*8d13bc63SEmmanuel Vadot vcc-supply = <®_vdd_3v3>; 44*8d13bc63SEmmanuel Vadot iovcc-supply = <®_vdd_3v3>; 45*8d13bc63SEmmanuel Vadot wakeup-source; 46*8d13bc63SEmmanuel Vadot }; 47*8d13bc63SEmmanuel Vadot}; 48*8d13bc63SEmmanuel Vadot 49*8d13bc63SEmmanuel Vadot&lcdif2 { 50*8d13bc63SEmmanuel Vadot status = "okay"; 51*8d13bc63SEmmanuel Vadot}; 52*8d13bc63SEmmanuel Vadot 53*8d13bc63SEmmanuel Vadot&lvds_bridge { 54*8d13bc63SEmmanuel Vadot /* IMX8MP_CLK_MEDIA_LDB = IMX8MP_CLK_MEDIA_DISP2_PIX * 7 */ 55*8d13bc63SEmmanuel Vadot assigned-clock-rates = <482300000>; 56*8d13bc63SEmmanuel Vadot status = "okay"; 57*8d13bc63SEmmanuel Vadot 58*8d13bc63SEmmanuel Vadot ports { 59*8d13bc63SEmmanuel Vadot port@1 { 60*8d13bc63SEmmanuel Vadot ldb_lvds_ch0: endpoint { 61*8d13bc63SEmmanuel Vadot remote-endpoint = <&in_lvds0>; 62*8d13bc63SEmmanuel Vadot }; 63*8d13bc63SEmmanuel Vadot }; 64*8d13bc63SEmmanuel Vadot }; 65*8d13bc63SEmmanuel Vadot}; 66*8d13bc63SEmmanuel Vadot 67*8d13bc63SEmmanuel Vadot&media_blk_ctrl { 68*8d13bc63SEmmanuel Vadot /* currently it is not possible to let display clocks confugure 69*8d13bc63SEmmanuel Vadot * automatically, so we need to set them manually 70*8d13bc63SEmmanuel Vadot */ 71*8d13bc63SEmmanuel Vadot assigned-clock-rates = <500000000>, <200000000>, <0>, 72*8d13bc63SEmmanuel Vadot /* IMX8MP_CLK_MEDIA_DISP2_PIX = pixelclk of lvds panel */ 73*8d13bc63SEmmanuel Vadot <68900000>, 74*8d13bc63SEmmanuel Vadot /* IMX8MP_VIDEO_PLL1 = IMX8MP_CLK_MEDIA_LDB * 2 */ 75*8d13bc63SEmmanuel Vadot <964600000>; 76*8d13bc63SEmmanuel Vadot}; 77*8d13bc63SEmmanuel Vadot 78*8d13bc63SEmmanuel Vadot&pwm4 { 79*8d13bc63SEmmanuel Vadot status = "okay"; 80*8d13bc63SEmmanuel Vadot}; 81*8d13bc63SEmmanuel Vadot 82*8d13bc63SEmmanuel Vadot&pwm1 { 83*8d13bc63SEmmanuel Vadot status = "okay"; 84*8d13bc63SEmmanuel Vadot}; 85*8d13bc63SEmmanuel Vadot 86*8d13bc63SEmmanuel Vadot®_tft_vcom { 87*8d13bc63SEmmanuel Vadot regulator-min-microvolt = <3160000>; 88*8d13bc63SEmmanuel Vadot regulator-max-microvolt = <3160000>; 89*8d13bc63SEmmanuel Vadot voltage-table = <3160000 73>; 90*8d13bc63SEmmanuel Vadot status = "okay"; 91*8d13bc63SEmmanuel Vadot}; 92*8d13bc63SEmmanuel Vadot 93*8d13bc63SEmmanuel Vadot&iomuxc { 94*8d13bc63SEmmanuel Vadot pinctrl_i2c2: i2c2grp { 95*8d13bc63SEmmanuel Vadot fsl,pins = < 96*8d13bc63SEmmanuel Vadot MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 97*8d13bc63SEmmanuel Vadot MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 98*8d13bc63SEmmanuel Vadot >; 99*8d13bc63SEmmanuel Vadot }; 100*8d13bc63SEmmanuel Vadot}; 101