1*5f62a964SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*5f62a964SEmmanuel Vadot/* 3*5f62a964SEmmanuel Vadot * Copyright 2023 Boundary Devices 4*5f62a964SEmmanuel Vadot * Copyright 2024 Silicon Signals Pvt. Ltd. 5*5f62a964SEmmanuel Vadot * 6*5f62a964SEmmanuel Vadot * Author : Bhavin Sharma <bhavin.sharma@siliconsignals.io> 7*5f62a964SEmmanuel Vadot */ 8*5f62a964SEmmanuel Vadot 9*5f62a964SEmmanuel Vadot/dts-v1/; 10*5f62a964SEmmanuel Vadot 11*5f62a964SEmmanuel Vadot#include <dt-bindings/leds/common.h> 12*5f62a964SEmmanuel Vadot#include "imx8mp.dtsi" 13*5f62a964SEmmanuel Vadot 14*5f62a964SEmmanuel Vadot/ { 15*5f62a964SEmmanuel Vadot model = "Boundary Device Nitrogen8MP SMARC SoM"; 16*5f62a964SEmmanuel Vadot compatible = "boundary,imx8mp-nitrogen-smarc-som", "fsl,imx8mp"; 17*5f62a964SEmmanuel Vadot 18*5f62a964SEmmanuel Vadot chosen { 19*5f62a964SEmmanuel Vadot stdout-path = &uart2; 20*5f62a964SEmmanuel Vadot }; 21*5f62a964SEmmanuel Vadot 22*5f62a964SEmmanuel Vadot leds { 23*5f62a964SEmmanuel Vadot compatible = "gpio-leds"; 24*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 25*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_gpio_led>; 26*5f62a964SEmmanuel Vadot 27*5f62a964SEmmanuel Vadot led-0 { 28*5f62a964SEmmanuel Vadot function = LED_FUNCTION_POWER; 29*5f62a964SEmmanuel Vadot gpios = <&gpio1 10 GPIO_ACTIVE_HIGH>; 30*5f62a964SEmmanuel Vadot linux,default-trigger = "heartbeat"; 31*5f62a964SEmmanuel Vadot }; 32*5f62a964SEmmanuel Vadot }; 33*5f62a964SEmmanuel Vadot 34*5f62a964SEmmanuel Vadot reg_usdhc2_vmmc: regulator-usdhc2-vmmc { 35*5f62a964SEmmanuel Vadot compatible = "regulator-fixed"; 36*5f62a964SEmmanuel Vadot regulator-name = "VSD_3V3"; 37*5f62a964SEmmanuel Vadot regulator-min-microvolt = <3300000>; 38*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3300000>; 39*5f62a964SEmmanuel Vadot gpios = <&gpio2 19 GPIO_ACTIVE_HIGH>; 40*5f62a964SEmmanuel Vadot enable-active-high; 41*5f62a964SEmmanuel Vadot }; 42*5f62a964SEmmanuel Vadot}; 43*5f62a964SEmmanuel Vadot 44*5f62a964SEmmanuel Vadot&A53_0 { 45*5f62a964SEmmanuel Vadot cpu-supply = <&buck2>; 46*5f62a964SEmmanuel Vadot}; 47*5f62a964SEmmanuel Vadot 48*5f62a964SEmmanuel Vadot&A53_1 { 49*5f62a964SEmmanuel Vadot cpu-supply = <&buck2>; 50*5f62a964SEmmanuel Vadot}; 51*5f62a964SEmmanuel Vadot 52*5f62a964SEmmanuel Vadot&A53_2 { 53*5f62a964SEmmanuel Vadot cpu-supply = <&buck2>; 54*5f62a964SEmmanuel Vadot}; 55*5f62a964SEmmanuel Vadot 56*5f62a964SEmmanuel Vadot&A53_3 { 57*5f62a964SEmmanuel Vadot cpu-supply = <&buck2>; 58*5f62a964SEmmanuel Vadot}; 59*5f62a964SEmmanuel Vadot 60*5f62a964SEmmanuel Vadot&i2c1 { 61*5f62a964SEmmanuel Vadot clock-frequency = <400000>; 62*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 63*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c1>; 64*5f62a964SEmmanuel Vadot status = "okay"; 65*5f62a964SEmmanuel Vadot 66*5f62a964SEmmanuel Vadot pmic@25 { 67*5f62a964SEmmanuel Vadot compatible = "nxp,pca9450c"; 68*5f62a964SEmmanuel Vadot reg = <0x25>; 69*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 70*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_pmic>; 71*5f62a964SEmmanuel Vadot interrupt-parent = <&gpio1>; 72*5f62a964SEmmanuel Vadot interrupts = <14 IRQ_TYPE_LEVEL_LOW>; 73*5f62a964SEmmanuel Vadot 74*5f62a964SEmmanuel Vadot regulators { 75*5f62a964SEmmanuel Vadot buck1: BUCK1 { 76*5f62a964SEmmanuel Vadot regulator-name = "BUCK1"; 77*5f62a964SEmmanuel Vadot regulator-min-microvolt = <600000>; 78*5f62a964SEmmanuel Vadot regulator-max-microvolt = <2187500>; 79*5f62a964SEmmanuel Vadot regulator-boot-on; 80*5f62a964SEmmanuel Vadot regulator-always-on; 81*5f62a964SEmmanuel Vadot regulator-ramp-delay = <3125>; 82*5f62a964SEmmanuel Vadot }; 83*5f62a964SEmmanuel Vadot 84*5f62a964SEmmanuel Vadot buck2: BUCK2 { 85*5f62a964SEmmanuel Vadot regulator-name = "BUCK2"; 86*5f62a964SEmmanuel Vadot regulator-min-microvolt = <600000>; 87*5f62a964SEmmanuel Vadot regulator-max-microvolt = <2187500>; 88*5f62a964SEmmanuel Vadot regulator-boot-on; 89*5f62a964SEmmanuel Vadot regulator-always-on; 90*5f62a964SEmmanuel Vadot regulator-ramp-delay = <3125>; 91*5f62a964SEmmanuel Vadot nxp,dvs-run-voltage = <950000>; 92*5f62a964SEmmanuel Vadot nxp,dvs-standby-voltage = <850000>; 93*5f62a964SEmmanuel Vadot }; 94*5f62a964SEmmanuel Vadot 95*5f62a964SEmmanuel Vadot buck4: BUCK4 { 96*5f62a964SEmmanuel Vadot regulator-name = "BUCK4"; 97*5f62a964SEmmanuel Vadot regulator-min-microvolt = <600000>; 98*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3400000>; 99*5f62a964SEmmanuel Vadot regulator-boot-on; 100*5f62a964SEmmanuel Vadot regulator-always-on; 101*5f62a964SEmmanuel Vadot }; 102*5f62a964SEmmanuel Vadot 103*5f62a964SEmmanuel Vadot buck5: BUCK5 { 104*5f62a964SEmmanuel Vadot regulator-name = "BUCK5"; 105*5f62a964SEmmanuel Vadot regulator-min-microvolt = <600000>; 106*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3400000>; 107*5f62a964SEmmanuel Vadot regulator-boot-on; 108*5f62a964SEmmanuel Vadot regulator-always-on; 109*5f62a964SEmmanuel Vadot }; 110*5f62a964SEmmanuel Vadot 111*5f62a964SEmmanuel Vadot buck6: BUCK6 { 112*5f62a964SEmmanuel Vadot regulator-name = "BUCK6"; 113*5f62a964SEmmanuel Vadot regulator-min-microvolt = <600000>; 114*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3400000>; 115*5f62a964SEmmanuel Vadot regulator-boot-on; 116*5f62a964SEmmanuel Vadot regulator-always-on; 117*5f62a964SEmmanuel Vadot }; 118*5f62a964SEmmanuel Vadot 119*5f62a964SEmmanuel Vadot ldo1: LDO1 { 120*5f62a964SEmmanuel Vadot regulator-name = "LDO1"; 121*5f62a964SEmmanuel Vadot regulator-min-microvolt = <1600000>; 122*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3300000>; 123*5f62a964SEmmanuel Vadot regulator-boot-on; 124*5f62a964SEmmanuel Vadot regulator-always-on; 125*5f62a964SEmmanuel Vadot }; 126*5f62a964SEmmanuel Vadot 127*5f62a964SEmmanuel Vadot ldo2: LDO2 { 128*5f62a964SEmmanuel Vadot regulator-name = "LDO2"; 129*5f62a964SEmmanuel Vadot regulator-min-microvolt = <800000>; 130*5f62a964SEmmanuel Vadot regulator-max-microvolt = <1150000>; 131*5f62a964SEmmanuel Vadot regulator-boot-on; 132*5f62a964SEmmanuel Vadot regulator-always-on; 133*5f62a964SEmmanuel Vadot }; 134*5f62a964SEmmanuel Vadot 135*5f62a964SEmmanuel Vadot ldo3: LDO3 { 136*5f62a964SEmmanuel Vadot regulator-name = "LDO3"; 137*5f62a964SEmmanuel Vadot regulator-min-microvolt = <800000>; 138*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3300000>; 139*5f62a964SEmmanuel Vadot regulator-boot-on; 140*5f62a964SEmmanuel Vadot regulator-always-on; 141*5f62a964SEmmanuel Vadot }; 142*5f62a964SEmmanuel Vadot 143*5f62a964SEmmanuel Vadot ldo4: LDO4 { 144*5f62a964SEmmanuel Vadot regulator-name = "LDO4"; 145*5f62a964SEmmanuel Vadot regulator-min-microvolt = <800000>; 146*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3300000>; 147*5f62a964SEmmanuel Vadot regulator-boot-on; 148*5f62a964SEmmanuel Vadot regulator-always-on; 149*5f62a964SEmmanuel Vadot }; 150*5f62a964SEmmanuel Vadot 151*5f62a964SEmmanuel Vadot ldo5: LDO5 { 152*5f62a964SEmmanuel Vadot regulator-name = "LDO5"; 153*5f62a964SEmmanuel Vadot regulator-min-microvolt = <1800000>; 154*5f62a964SEmmanuel Vadot regulator-max-microvolt = <3300000>; 155*5f62a964SEmmanuel Vadot regulator-boot-on; 156*5f62a964SEmmanuel Vadot regulator-always-on; 157*5f62a964SEmmanuel Vadot }; 158*5f62a964SEmmanuel Vadot }; 159*5f62a964SEmmanuel Vadot }; 160*5f62a964SEmmanuel Vadot}; 161*5f62a964SEmmanuel Vadot 162*5f62a964SEmmanuel Vadot&i2c6 { 163*5f62a964SEmmanuel Vadot clock-frequency = <100000>; 164*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 165*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_i2c6>; 166*5f62a964SEmmanuel Vadot status = "okay"; 167*5f62a964SEmmanuel Vadot 168*5f62a964SEmmanuel Vadot mcp23018: gpio@20 { 169*5f62a964SEmmanuel Vadot compatible = "microchip,mcp23018"; 170*5f62a964SEmmanuel Vadot gpio-controller; 171*5f62a964SEmmanuel Vadot #gpio-cells = <0x2>; 172*5f62a964SEmmanuel Vadot reg = <0x20>; 173*5f62a964SEmmanuel Vadot interrupts-extended = <&gpio4 22 IRQ_TYPE_LEVEL_LOW>; 174*5f62a964SEmmanuel Vadot interrupt-controller; 175*5f62a964SEmmanuel Vadot #interrupt-cells = <0x2>; 176*5f62a964SEmmanuel Vadot microchip,irq-mirror; 177*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 178*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_mcp23018>; 179*5f62a964SEmmanuel Vadot reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; 180*5f62a964SEmmanuel Vadot }; 181*5f62a964SEmmanuel Vadot}; 182*5f62a964SEmmanuel Vadot 183*5f62a964SEmmanuel Vadot/* Console */ 184*5f62a964SEmmanuel Vadot&uart2 { 185*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 186*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_uart2>; 187*5f62a964SEmmanuel Vadot status = "okay"; 188*5f62a964SEmmanuel Vadot}; 189*5f62a964SEmmanuel Vadot 190*5f62a964SEmmanuel Vadot/* SD-card */ 191*5f62a964SEmmanuel Vadot&usdhc2 { 192*5f62a964SEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 193*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc2>; 194*5f62a964SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 195*5f62a964SEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 196*5f62a964SEmmanuel Vadot cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 197*5f62a964SEmmanuel Vadot vmmc-supply = <®_usdhc2_vmmc>; 198*5f62a964SEmmanuel Vadot bus-width = <4>; 199*5f62a964SEmmanuel Vadot status = "okay"; 200*5f62a964SEmmanuel Vadot}; 201*5f62a964SEmmanuel Vadot 202*5f62a964SEmmanuel Vadot/* eMMC */ 203*5f62a964SEmmanuel Vadot&usdhc1 { 204*5f62a964SEmmanuel Vadot pinctrl-names = "default", "state_100mhz", "state_200mhz"; 205*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_usdhc1>; 206*5f62a964SEmmanuel Vadot pinctrl-1 = <&pinctrl_usdhc1_100mhz>; 207*5f62a964SEmmanuel Vadot pinctrl-2 = <&pinctrl_usdhc1_200mhz>; 208*5f62a964SEmmanuel Vadot bus-width = <8>; 209*5f62a964SEmmanuel Vadot non-removable; 210*5f62a964SEmmanuel Vadot status = "okay"; 211*5f62a964SEmmanuel Vadot}; 212*5f62a964SEmmanuel Vadot 213*5f62a964SEmmanuel Vadot&wdog1 { 214*5f62a964SEmmanuel Vadot pinctrl-names = "default"; 215*5f62a964SEmmanuel Vadot pinctrl-0 = <&pinctrl_wdog>; 216*5f62a964SEmmanuel Vadot fsl,ext-reset-output; 217*5f62a964SEmmanuel Vadot status = "okay"; 218*5f62a964SEmmanuel Vadot}; 219*5f62a964SEmmanuel Vadot 220*5f62a964SEmmanuel Vadot&iomuxc { 221*5f62a964SEmmanuel Vadot pinctrl_gpio_led: gpioledgrp { 222*5f62a964SEmmanuel Vadot fsl,pins = < 223*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_GPIO1_IO10__GPIO1_IO10 0x19 224*5f62a964SEmmanuel Vadot >; 225*5f62a964SEmmanuel Vadot }; 226*5f62a964SEmmanuel Vadot 227*5f62a964SEmmanuel Vadot pinctrl_i2c1: i2c1grp { 228*5f62a964SEmmanuel Vadot fsl,pins = < 229*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL 0x400001c3 230*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_I2C1_SDA__I2C1_SDA 0x400001c3 231*5f62a964SEmmanuel Vadot >; 232*5f62a964SEmmanuel Vadot }; 233*5f62a964SEmmanuel Vadot 234*5f62a964SEmmanuel Vadot pinctrl_i2c6: i2c6grp { 235*5f62a964SEmmanuel Vadot fsl,pins = < 236*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SAI5_RXFS__I2C6_SCL 0x400001c3 237*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SAI5_RXC__I2C6_SDA 0x400001c3 238*5f62a964SEmmanuel Vadot >; 239*5f62a964SEmmanuel Vadot }; 240*5f62a964SEmmanuel Vadot 241*5f62a964SEmmanuel Vadot pinctrl_mcp23018: mcp23018grp { 242*5f62a964SEmmanuel Vadot fsl,pins = < 243*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x1c0 244*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x100 245*5f62a964SEmmanuel Vadot >; 246*5f62a964SEmmanuel Vadot }; 247*5f62a964SEmmanuel Vadot 248*5f62a964SEmmanuel Vadot pinctrl_pmic: pmicgrp { 249*5f62a964SEmmanuel Vadot fsl,pins = < 250*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_GPIO1_IO14__GPIO1_IO14 0x1c0 251*5f62a964SEmmanuel Vadot >; 252*5f62a964SEmmanuel Vadot }; 253*5f62a964SEmmanuel Vadot 254*5f62a964SEmmanuel Vadot pinctrl_uart2: uart2grp { 255*5f62a964SEmmanuel Vadot fsl,pins = < 256*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x40 257*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x40 258*5f62a964SEmmanuel Vadot >; 259*5f62a964SEmmanuel Vadot }; 260*5f62a964SEmmanuel Vadot 261*5f62a964SEmmanuel Vadot pinctrl_usdhc1: usdhc1grp { 262*5f62a964SEmmanuel Vadot fsl,pins = < 263*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x10 264*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x150 265*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x150 266*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x150 267*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x150 268*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x150 269*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4 0x150 270*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5 0x150 271*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6 0x150 272*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7 0x150 273*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE 0x10 274*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_RESET_B__USDHC1_RESET_B 0x140 275*5f62a964SEmmanuel Vadot >; 276*5f62a964SEmmanuel Vadot }; 277*5f62a964SEmmanuel Vadot 278*5f62a964SEmmanuel Vadot pinctrl_usdhc1_100mhz: usdhc1-100mhzgrp { 279*5f62a964SEmmanuel Vadot fsl,pins = < 280*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x14 281*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x154 282*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x154 283*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x154 284*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x154 285*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x154 286*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4 0x154 287*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5 0x154 288*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6 0x154 289*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7 0x154 290*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE 0x14 291*5f62a964SEmmanuel Vadot >; 292*5f62a964SEmmanuel Vadot }; 293*5f62a964SEmmanuel Vadot 294*5f62a964SEmmanuel Vadot pinctrl_usdhc1_200mhz: usdhc1-200mhzgrp { 295*5f62a964SEmmanuel Vadot fsl,pins = < 296*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x12 297*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x152 298*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x152 299*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x152 300*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x152 301*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x152 302*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA4__USDHC1_DATA4 0x152 303*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA5__USDHC1_DATA5 0x152 304*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA6__USDHC1_DATA6 0x152 305*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_DATA7__USDHC1_DATA7 0x152 306*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD1_STROBE__USDHC1_STROBE 0x12 307*5f62a964SEmmanuel Vadot >; 308*5f62a964SEmmanuel Vadot }; 309*5f62a964SEmmanuel Vadot 310*5f62a964SEmmanuel Vadot pinctrl_usdhc2: usdhc2grp { 311*5f62a964SEmmanuel Vadot fsl,pins = < 312*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 313*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 314*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 315*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 316*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 317*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 318*5f62a964SEmmanuel Vadot >; 319*5f62a964SEmmanuel Vadot }; 320*5f62a964SEmmanuel Vadot 321*5f62a964SEmmanuel Vadot pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 322*5f62a964SEmmanuel Vadot fsl,pins = < 323*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 324*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 325*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 326*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 327*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 328*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 329*5f62a964SEmmanuel Vadot >; 330*5f62a964SEmmanuel Vadot }; 331*5f62a964SEmmanuel Vadot 332*5f62a964SEmmanuel Vadot pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 333*5f62a964SEmmanuel Vadot fsl,pins = < 334*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 335*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 336*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 337*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 338*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 339*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 340*5f62a964SEmmanuel Vadot >; 341*5f62a964SEmmanuel Vadot }; 342*5f62a964SEmmanuel Vadot 343*5f62a964SEmmanuel Vadot pinctrl_wdog: wdoggrp { 344*5f62a964SEmmanuel Vadot fsl,pins = < 345*5f62a964SEmmanuel Vadot MX8MP_IOMUXC_GPIO1_IO02__WDOG1_WDOG_B 0x140 346*5f62a964SEmmanuel Vadot >; 347*5f62a964SEmmanuel Vadot }; 348*5f62a964SEmmanuel Vadot}; 349