xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8mp-dhcom-pdk2.dts (revision b077aed33b7b6aefca7b17ddb250cf521f938613)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright (C) 2022 Marek Vasut <marex@denx.de>
4 */
5
6/dts-v1/;
7
8#include <dt-bindings/leds/common.h>
9#include <dt-bindings/net/qca-ar803x.h>
10#include <dt-bindings/phy/phy-imx8-pcie.h>
11#include "imx8mp-dhcom-som.dtsi"
12
13/ {
14	model = "DH electronics i.MX8M Plus DHCOM Premium Developer Kit (2)";
15	compatible = "dh,imx8mp-dhcom-pdk2", "fsl,imx8mp";
16
17	chosen {
18		stdout-path = &uart1;
19	};
20
21	gpio-keys {
22		compatible = "gpio-keys";
23
24		button-0 {
25			gpios = <&gpio1 9 GPIO_ACTIVE_LOW>; /* GPIO A */
26			label = "TA1-GPIO-A";
27			linux,code = <KEY_A>;
28			pinctrl-0 = <&pinctrl_dhcom_a>;
29			pinctrl-names = "default";
30			wakeup-source;
31		};
32
33		button-1 {
34			gpios = <&gpio1 8 GPIO_ACTIVE_LOW>; /* GPIO B */
35			label = "TA2-GPIO-B";
36			linux,code = <KEY_B>;
37			pinctrl-0 = <&pinctrl_dhcom_b>;
38			pinctrl-names = "default";
39			wakeup-source;
40		};
41
42		button-2 {
43			gpios = <&gpio5 2 GPIO_ACTIVE_LOW>; /* GPIO C */
44			label = "TA3-GPIO-C";
45			linux,code = <KEY_C>;
46			pinctrl-0 = <&pinctrl_dhcom_c>;
47			pinctrl-names = "default";
48			wakeup-source;
49		};
50
51		button-3 {
52			gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; /* GPIO D */
53			label = "TA4-GPIO-D";
54			linux,code = <KEY_D>;
55			pinctrl-0 = <&pinctrl_dhcom_d>;
56			pinctrl-names = "default";
57			wakeup-source;
58		};
59	};
60
61	led {
62		compatible = "gpio-leds";
63
64		led-0 {
65			color = <LED_COLOR_ID_GREEN>;
66			default-state = "off";
67			function = LED_FUNCTION_INDICATOR;
68			gpios = <&gpio5 22 GPIO_ACTIVE_HIGH>; /* GPIO E */
69			pinctrl-0 = <&pinctrl_dhcom_e>;
70			pinctrl-names = "default";
71		};
72
73		led-1 {
74			color = <LED_COLOR_ID_GREEN>;
75			default-state = "off";
76			function = LED_FUNCTION_INDICATOR;
77			gpios = <&gpio5 23 GPIO_ACTIVE_HIGH>; /* GPIO F */
78			pinctrl-0 = <&pinctrl_dhcom_f>;
79			pinctrl-names = "default";
80		};
81
82		led-2 {
83			color = <LED_COLOR_ID_GREEN>;
84			default-state = "off";
85			function = LED_FUNCTION_INDICATOR;
86			gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; /* GPIO H */
87			pinctrl-0 = <&pinctrl_dhcom_h>;
88			pinctrl-names = "default";
89		};
90
91		led-3 {
92			color = <LED_COLOR_ID_GREEN>;
93			default-state = "off";
94			function = LED_FUNCTION_INDICATOR;
95			gpios = <&gpio1 5 GPIO_ACTIVE_HIGH>; /* GPIO I */
96			pinctrl-0 = <&pinctrl_dhcom_i>;
97			pinctrl-names = "default";
98		};
99	};
100};
101
102/*
103 * PDK2 carrier board uses SoM with KSZ9131 populated and connected to
104 * SoM EQoS ethernet RGMII interface. Remove the other SoM PHY DT node.
105 */
106/delete-node/ &ethphy0f;
107
108/*
109 * PDK2 carrier board has KSZ9021 PHY populated and connected to SoM FEC
110 * ethernet RGMII interface. The SoM is not populated with second FEC PHY.
111 */
112/delete-node/ &ethphy1f;
113
114&fec {	/* Second ethernet */
115	phy-handle = <&ethphypdk>;
116
117	mdio {
118		ethphypdk: ethernet-phy@7 { /* KSZ 9021 */
119			compatible = "ethernet-phy-ieee802.3-c22";
120			pinctrl-0 = <&pinctrl_ethphy1>;
121			pinctrl-names = "default";
122			interrupt-parent = <&gpio4>;
123			interrupts = <3 IRQ_TYPE_LEVEL_LOW>;
124			max-speed = <100>;
125			reg = <7>;
126			reset-assert-us = <1000>;
127			reset-deassert-us = <1000>;
128			reset-gpios = <&gpio4 2 GPIO_ACTIVE_LOW>;
129			rxc-skew-ps = <3000>;
130			rxd0-skew-ps = <0>;
131			rxd1-skew-ps = <0>;
132			rxd2-skew-ps = <0>;
133			rxd3-skew-ps = <0>;
134			rxdv-skew-ps = <0>;
135			txc-skew-ps = <3000>;
136			txd0-skew-ps = <0>;
137			txd1-skew-ps = <0>;
138			txd2-skew-ps = <0>;
139			txd3-skew-ps = <0>;
140			txen-skew-ps = <0>;
141		};
142	};
143};
144
145&flexcan1 {
146	status = "okay";
147};
148
149&usb3_1 {
150	fsl,over-current-active-low;
151};
152
153&iomuxc {
154	/*
155	 * GPIO_A,B,C,D are connected to buttons.
156	 * GPIO_E,F,H,I are connected to LEDs.
157	 * GPIO_M is connected to CLKOUT2.
158	 */
159	pinctrl-0 = <&pinctrl_hog_base
160		     &pinctrl_dhcom_g &pinctrl_dhcom_j
161		     &pinctrl_dhcom_k &pinctrl_dhcom_l
162		     &pinctrl_dhcom_int>;
163};
164