1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Copyright 2023 Logic PD, Inc dba Beacon EmbeddedWorks 4 */ 5 6/dts-v1/; 7 8#include <dt-bindings/usb/pd.h> 9#include <dt-bindings/phy/phy-imx8-pcie.h> 10#include "imx8mp.dtsi" 11#include "imx8mp-beacon-som.dtsi" 12 13/ { 14 model = "Beacon EmbeddedWorks i.MX8MPlus Development kit"; 15 compatible = "beacon,imx8mp-beacon-kit", "fsl,imx8mp"; 16 17 aliases { 18 ethernet0 = &eqos; 19 ethernet1 = &fec; 20 }; 21 22 chosen { 23 stdout-path = &uart2; 24 }; 25 26 connector { 27 compatible = "usb-c-connector"; 28 label = "USB-C"; 29 data-role = "dual"; 30 31 ports { 32 #address-cells = <1>; 33 #size-cells = <0>; 34 35 port@0 { 36 reg = <0>; 37 38 hs_ep: endpoint { 39 remote-endpoint = <&usb3_hs_ep>; 40 }; 41 }; 42 port@1 { 43 reg = <1>; 44 45 ss_ep: endpoint { 46 remote-endpoint = <&hd3ss3220_in_ep>; 47 }; 48 }; 49 }; 50 }; 51 52 gpio-keys { 53 compatible = "gpio-keys"; 54 autorepeat; 55 56 button-0 { 57 label = "btn0"; 58 linux,code = <BTN_0>; 59 gpios = <&pca6416_1 12 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 60 wakeup-source; 61 }; 62 63 button-1 { 64 label = "btn1"; 65 linux,code = <BTN_1>; 66 gpios = <&pca6416_1 13 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 67 wakeup-source; 68 }; 69 70 button-2 { 71 label = "btn2"; 72 linux,code = <BTN_2>; 73 gpios = <&pca6416_1 14 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 74 wakeup-source; 75 }; 76 77 button-3 { 78 label = "btn3"; 79 linux,code = <BTN_3>; 80 gpios = <&pca6416_1 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>; 81 wakeup-source; 82 }; 83 }; 84 85 leds { 86 compatible = "gpio-leds"; 87 pinctrl-names = "default"; 88 pinctrl-0 = <&pinctrl_led3>; 89 90 led-0 { 91 label = "gen_led0"; 92 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>; 93 default-state = "off"; 94 }; 95 96 led-1 { 97 label = "gen_led1"; 98 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>; 99 default-state = "off"; 100 }; 101 102 led-2 { 103 label = "gen_led2"; 104 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>; 105 default-state = "off"; 106 }; 107 108 led-3 { 109 label = "heartbeat"; 110 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 111 linux,default-trigger = "heartbeat"; 112 }; 113 }; 114 115 pcie0_refclk: clock-pcie { 116 compatible = "fixed-clock"; 117 #clock-cells = <0>; 118 clock-frequency = <100000000>; 119 }; 120 121 reg_audio: regulator-wm8962 { 122 compatible = "regulator-fixed"; 123 regulator-name = "3v3_aud"; 124 regulator-min-microvolt = <3300000>; 125 regulator-max-microvolt = <3300000>; 126 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>; 127 enable-active-high; 128 }; 129 130 reg_usdhc2_vmmc: regulator-usdhc2 { 131 compatible = "regulator-fixed"; 132 regulator-name = "VSD_3V3"; 133 regulator-min-microvolt = <3300000>; 134 regulator-max-microvolt = <3300000>; 135 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 136 enable-active-high; 137 startup-delay-us = <100>; 138 off-on-delay-us = <20000>; 139 }; 140 141 reg_usb1_host_vbus: regulator-usb1-vbus { 142 compatible = "regulator-fixed"; 143 regulator-name = "usb1_host_vbus"; 144 regulator-max-microvolt = <5000000>; 145 regulator-min-microvolt = <5000000>; 146 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>; 147 enable-active-high; 148 }; 149 150 sound-wm8962 { 151 compatible = "simple-audio-card"; 152 simple-audio-card,name = "wm8962"; 153 simple-audio-card,format = "i2s"; 154 simple-audio-card,widgets = "Headphone", "Headphones", 155 "Microphone", "Headset Mic", 156 "Speaker", "Speaker"; 157 simple-audio-card,routing = "Headphones", "HPOUTL", 158 "Headphones", "HPOUTR", 159 "Speaker", "SPKOUTL", 160 "Speaker", "SPKOUTR", 161 "Headset Mic", "MICBIAS", 162 "IN3R", "Headset Mic"; 163 164 simple-audio-card,cpu { 165 sound-dai = <&sai3>; 166 }; 167 168 simple-audio-card,codec { 169 sound-dai = <&wm8962>; 170 clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; 171 frame-master; 172 bitclock-master; 173 }; 174 }; 175}; 176 177&ecspi2 { 178 pinctrl-names = "default"; 179 pinctrl-0 = <&pinctrl_ecspi2>; 180 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 181 status = "okay"; 182 183 tpm: tpm@0 { 184 compatible = "infineon,slb9670"; 185 reg = <0>; 186 pinctrl-names = "default"; 187 pinctrl-0 = <&pinctrl_tpm>; 188 reset-gpios = <&gpio4 0 GPIO_ACTIVE_LOW>; 189 spi-max-frequency = <18500000>; 190 }; 191}; 192 193&fec { 194 pinctrl-names = "default"; 195 pinctrl-0 = <&pinctrl_fec>; 196 phy-mode = "rgmii-id"; 197 phy-handle = <ðphy1>; 198 fsl,magic-packet; 199 status = "okay"; 200 201 mdio { 202 #address-cells = <1>; 203 #size-cells = <0>; 204 205 ethphy1: ethernet-phy@3 { 206 compatible = "ethernet-phy-id0022.1640", 207 "ethernet-phy-ieee802.3-c22"; 208 reg = <3>; 209 reset-gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; 210 reset-assert-us = <10000>; 211 reset-deassert-us = <150000>; 212 interrupt-parent = <&gpio4>; 213 interrupts = <2 IRQ_TYPE_LEVEL_LOW>; 214 }; 215 }; 216}; 217 218&flexcan1 { 219 pinctrl-names = "default"; 220 pinctrl-0 = <&pinctrl_flexcan1>; 221 status = "okay"; 222}; 223 224&gpio2 { 225 usb-mux-hog { 226 gpio-hog; 227 gpios = <20 0>; 228 output-low; 229 line-name = "USB-C Mux En"; 230 }; 231}; 232 233&i2c2 { 234 clock-frequency = <384000>; 235 pinctrl-names = "default"; 236 pinctrl-0 = <&pinctrl_i2c2>; 237 status = "okay"; 238 239 pca6416_3: gpio@20 { 240 compatible = "nxp,pcal6416"; 241 reg = <0x20>; 242 gpio-controller; 243 #gpio-cells = <2>; 244 interrupt-parent = <&gpio4>; 245 interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 246 interrupt-controller; 247 #interrupt-cells = <2>; 248 }; 249}; 250 251&i2c3 { 252 /* Connected to USB Hub */ 253 usb-typec@52 { 254 compatible = "nxp,ptn5110"; 255 reg = <0x52>; 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_typec>; 258 interrupt-parent = <&gpio4>; 259 interrupts = <1 IRQ_TYPE_LEVEL_LOW>; 260 261 connector { 262 compatible = "usb-c-connector"; 263 label = "USB-C"; 264 power-role = "source"; 265 data-role = "host"; 266 source-pdos = <PDO_FIXED(5000, 3000, PDO_FIXED_USB_COMM)>; 267 }; 268 }; 269}; 270 271&i2c4 { 272 pinctrl-names = "default"; 273 pinctrl-0 = <&pinctrl_i2c4>; 274 clock-frequency = <384000>; 275 status = "okay"; 276 277 wm8962: audio-codec@1a { 278 compatible = "wlf,wm8962"; 279 reg = <0x1a>; 280 pinctrl-names = "default"; 281 pinctrl-0 = <&pinctrl_wm8962>; 282 clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; 283 assigned-clocks = <&clk IMX8MP_CLK_IPP_DO_CLKO1>; 284 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; 285 assigned-clock-rates = <22576000>; 286 DCVDD-supply = <®_audio>; 287 DBVDD-supply = <®_audio>; 288 AVDD-supply = <®_audio>; 289 CPVDD-supply = <®_audio>; 290 MICVDD-supply = <®_audio>; 291 PLLVDD-supply = <®_audio>; 292 SPKVDD1-supply = <®_audio>; 293 SPKVDD2-supply = <®_audio>; 294 gpio-cfg = < 295 0x0000 /* 0:Default */ 296 0x0000 /* 1:Default */ 297 0x0000 /* 2:FN_DMICCLK */ 298 0x0000 /* 3:Default */ 299 0x0000 /* 4:FN_DMICCDAT */ 300 0x0000 /* 5:Default */ 301 >; 302 #sound-dai-cells = <0>; 303 }; 304 305 pca6416: gpio@20 { 306 compatible = "nxp,pcal6416"; 307 reg = <0x20>; 308 pinctrl-names = "default"; 309 pinctrl-0 = <&pinctrl_pcal6414>; 310 gpio-controller; 311 #gpio-cells = <2>; 312 interrupt-parent = <&gpio4>; 313 interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 314 interrupt-controller; 315 #interrupt-cells = <2>; 316 }; 317 318 pca6416_1: gpio@21 { 319 compatible = "nxp,pcal6416"; 320 reg = <0x21>; 321 gpio-controller; 322 #gpio-cells = <2>; 323 interrupt-parent = <&gpio4>; 324 interrupts = <27 IRQ_TYPE_EDGE_FALLING>; 325 interrupt-controller; 326 #interrupt-cells = <2>; 327 328 usb-hub-hog { 329 gpio-hog; 330 gpios = <7 0>; 331 output-low; 332 line-name = "USB Hub Enable"; 333 }; 334 }; 335 336 usb-typec@47 { 337 compatible = "ti,hd3ss3220"; 338 reg = <0x47>; 339 pinctrl-names = "default"; 340 pinctrl-0 = <&pinctrl_hd3ss3220>; 341 interrupt-parent = <&gpio4>; 342 interrupts = <19 IRQ_TYPE_LEVEL_LOW>; 343 344 ports { 345 #address-cells = <1>; 346 #size-cells = <0>; 347 348 port@0 { 349 reg = <0>; 350 351 hd3ss3220_in_ep: endpoint { 352 remote-endpoint = <&ss_ep>; 353 }; 354 }; 355 356 port@1 { 357 reg = <1>; 358 359 hd3ss3220_out_ep: endpoint { 360 remote-endpoint = <&usb3_role_switch>; 361 }; 362 }; 363 }; 364 }; 365}; 366 367&pcie { 368 pinctrl-names = "default"; 369 pinctrl-0 = <&pinctrl_pcie>; 370 reset-gpio = <&gpio4 21 GPIO_ACTIVE_LOW>; 371 status = "okay"; 372}; 373 374&pcie_phy { 375 fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>; 376 clocks = <&pcie0_refclk>; 377 clock-names = "ref"; 378 status = "okay"; 379}; 380 381&sai3 { 382 pinctrl-names = "default"; 383 pinctrl-0 = <&pinctrl_sai3>; 384 assigned-clocks = <&clk IMX8MP_CLK_SAI3>, 385 <&clk IMX8MP_AUDIO_PLL2> ; 386 assigned-clock-parents = <&clk IMX8MP_AUDIO_PLL2_OUT>; 387 assigned-clock-rates = <12288000>, <361267200>; 388 fsl,sai-mclk-direction-output; 389 status = "okay"; 390}; 391 392&snvs_pwrkey { 393 status = "okay"; 394}; 395 396&uart2 { 397 pinctrl-names = "default"; 398 pinctrl-0 = <&pinctrl_uart2>; 399 status = "okay"; 400}; 401 402&uart3 { 403 pinctrl-names = "default"; 404 pinctrl-0 = <&pinctrl_uart3>; 405 assigned-clocks = <&clk IMX8MP_CLK_UART3>; 406 assigned-clock-parents = <&clk IMX8MP_SYS_PLL1_80M>; 407 uart-has-rtscts; 408 status = "okay"; 409}; 410 411&usb3_0 { 412 status = "okay"; 413}; 414 415&usb_dwc3_0 { 416 dr_mode = "otg"; 417 hnp-disable; 418 srp-disable; 419 adp-disable; 420 usb-role-switch; 421 status = "okay"; 422 423 ports { 424 #address-cells = <1>; 425 #size-cells = <0>; 426 427 port@0 { 428 reg = <0>; 429 usb3_hs_ep: endpoint { 430 remote-endpoint = <&hs_ep>; 431 }; 432 }; 433 port@1 { 434 reg = <1>; 435 usb3_role_switch: endpoint { 436 remote-endpoint = <&hd3ss3220_out_ep>; 437 }; 438 }; 439 }; 440}; 441 442&usb3_phy0 { 443 vbus-supply = <®_usb1_host_vbus>; 444 status = "okay"; 445}; 446 447&usb3_1 { 448 status = "okay"; 449}; 450 451&usb_dwc3_1 { 452 dr_mode = "host"; 453 status = "okay"; 454}; 455 456&usb3_phy1 { 457 status = "okay"; 458}; 459 460&usdhc2 { 461 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 462 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 463 pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>; 464 pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>; 465 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 466 vmmc-supply = <®_usdhc2_vmmc>; 467 bus-width = <4>; 468 status = "okay"; 469}; 470 471&iomuxc { 472 pinctrl_ecspi2: ecspi2grp { 473 fsl,pins = < 474 MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x82 475 MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x82 476 MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x82 477 MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x40000 478 >; 479 }; 480 481 pinctrl_fec: fecgrp { 482 fsl,pins = < 483 MX8MP_IOMUXC_SAI1_RXD2__ENET1_MDC 0x2 484 MX8MP_IOMUXC_SAI1_RXD3__ENET1_MDIO 0x2 485 MX8MP_IOMUXC_SAI1_RXD4__ENET1_RGMII_RD0 0x90 486 MX8MP_IOMUXC_SAI1_RXD5__ENET1_RGMII_RD1 0x90 487 MX8MP_IOMUXC_SAI1_RXD6__ENET1_RGMII_RD2 0x90 488 MX8MP_IOMUXC_SAI1_RXD7__ENET1_RGMII_RD3 0x90 489 MX8MP_IOMUXC_SAI1_TXC__ENET1_RGMII_RXC 0x90 490 MX8MP_IOMUXC_SAI1_TXFS__ENET1_RGMII_RX_CTL 0x90 491 MX8MP_IOMUXC_SAI1_TXD0__ENET1_RGMII_TD0 0x16 492 MX8MP_IOMUXC_SAI1_TXD1__ENET1_RGMII_TD1 0x16 493 MX8MP_IOMUXC_SAI1_TXD2__ENET1_RGMII_TD2 0x16 494 MX8MP_IOMUXC_SAI1_TXD3__ENET1_RGMII_TD3 0x16 495 MX8MP_IOMUXC_SAI1_TXD4__ENET1_RGMII_TX_CTL 0x16 496 MX8MP_IOMUXC_SAI1_TXD5__ENET1_RGMII_TXC 0x16 497 MX8MP_IOMUXC_SAI1_RXD0__GPIO4_IO02 0x140 498 MX8MP_IOMUXC_SAI1_TXD6__GPIO4_IO18 0x10 499 >; 500 }; 501 502 pinctrl_flexcan1: flexcan1grp { 503 fsl,pins = < 504 MX8MP_IOMUXC_SPDIF_RX__CAN1_RX 0x154 505 MX8MP_IOMUXC_SPDIF_TX__CAN1_TX 0x154 506 >; 507 }; 508 509 pinctrl_hd3ss3220: hd3ss3220grp { 510 fsl,pins = < 511 MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x140 512 >; 513 }; 514 515 pinctrl_i2c2: i2c2grp { 516 fsl,pins = < 517 MX8MP_IOMUXC_I2C2_SCL__I2C2_SCL 0x400001c2 518 MX8MP_IOMUXC_I2C2_SDA__I2C2_SDA 0x400001c2 519 >; 520 }; 521 522 pinctrl_i2c4: i2c4grp { 523 fsl,pins = < 524 MX8MP_IOMUXC_I2C4_SCL__I2C4_SCL 0x400001c2 525 MX8MP_IOMUXC_I2C4_SDA__I2C4_SDA 0x400001c2 526 >; 527 }; 528 529 pinctrl_led3: led3grp { 530 fsl,pins = < 531 MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x41 532 >; 533 }; 534 535 pinctrl_pcal6414: pcal6414-gpiogrp { 536 fsl,pins = < 537 MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x10 538 >; 539 }; 540 541 pinctrl_pcie: pciegrp { 542 fsl,pins = < 543 MX8MP_IOMUXC_GPIO1_IO05__GPIO1_IO05 0x10 /* PCIe_nDIS */ 544 MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x10 /* PCIe_nRST */ 545 >; 546 }; 547 548 pinctrl_reg_usdhc2_vmmc: regusdhc2vmmcgrp { 549 fsl,pins = < 550 MX8MP_IOMUXC_SD2_RESET_B__GPIO2_IO19 0x40 551 >; 552 }; 553 554 pinctrl_sai3: sai3grp { 555 fsl,pins = < 556 MX8MP_IOMUXC_SAI3_TXFS__AUDIOMIX_SAI3_TX_SYNC 0xd6 557 MX8MP_IOMUXC_SAI3_TXC__AUDIOMIX_SAI3_TX_BCLK 0xd6 558 MX8MP_IOMUXC_SAI3_RXD__AUDIOMIX_SAI3_RX_DATA00 0xd6 559 MX8MP_IOMUXC_SAI3_TXD__AUDIOMIX_SAI3_TX_DATA00 0xd6 560 MX8MP_IOMUXC_SAI3_MCLK__AUDIOMIX_SAI3_MCLK 0xd6 561 >; 562 }; 563 564 pinctrl_tpm: tpmgrp { 565 fsl,pins = < 566 MX8MP_IOMUXC_SAI1_RXFS__GPIO4_IO00 0x19 /* Reset */ 567 MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x1d6 /* IRQ */ 568 >; 569 }; 570 571 pinctrl_typec: typec1grp { 572 fsl,pins = < 573 MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0xc4 574 >; 575 }; 576 577 pinctrl_uart2: uart2grp { 578 fsl,pins = < 579 MX8MP_IOMUXC_UART2_RXD__UART2_DCE_RX 0x140 580 MX8MP_IOMUXC_UART2_TXD__UART2_DCE_TX 0x140 581 >; 582 }; 583 584 pinctrl_uart3: uart3grp { 585 fsl,pins = < 586 MX8MP_IOMUXC_ECSPI1_SCLK__UART3_DCE_RX 0x140 587 MX8MP_IOMUXC_ECSPI1_MOSI__UART3_DCE_TX 0x140 588 MX8MP_IOMUXC_ECSPI1_SS0__UART3_DCE_RTS 0x140 589 MX8MP_IOMUXC_ECSPI1_MISO__UART3_DCE_CTS 0x140 590 >; 591 }; 592 593 pinctrl_usdhc2: usdhc2grp { 594 fsl,pins = < 595 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190 596 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0 597 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0 598 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0 599 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0 600 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0 601 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 602 >; 603 }; 604 605 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 606 fsl,pins = < 607 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194 608 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4 609 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4 610 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4 611 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4 612 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4 613 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 614 >; 615 }; 616 617 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 618 fsl,pins = < 619 MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196 620 MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6 621 MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6 622 MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6 623 MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6 624 MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6 625 MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc0 626 >; 627 }; 628 629 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 630 fsl,pins = < 631 MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4 632 >; 633 }; 634 635 pinctrl_wm8962: wm8962grp { 636 fsl,pins = < 637 MX8MP_IOMUXC_GPIO1_IO14__CCM_CLKO1 0x59 638 >; 639 }; 640}; 641