1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2020 Compass Electronics Group, LLC 4 */ 5 6/ { 7 dmic_codec: dmic-codec { 8 compatible = "dmic-codec"; 9 num-channels = <1>; 10 #sound-dai-cells = <0>; 11 }; 12 13 leds { 14 compatible = "gpio-leds"; 15 16 led-0 { 17 label = "gen_led0"; 18 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>; 19 default-state = "off"; 20 }; 21 22 led-1 { 23 label = "gen_led1"; 24 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>; 25 default-state = "off"; 26 }; 27 28 led-2 { 29 label = "gen_led2"; 30 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>; 31 default-state = "off"; 32 }; 33 34 led-3 { 35 pinctrl-names = "default"; 36 pinctrl-0 = <&pinctrl_led3>; 37 label = "heartbeat"; 38 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 39 linux,default-trigger = "heartbeat"; 40 }; 41 }; 42 43 reg_audio: regulator-audio { 44 compatible = "regulator-fixed"; 45 regulator-name = "3v3_aud"; 46 regulator-min-microvolt = <3300000>; 47 regulator-max-microvolt = <3300000>; 48 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>; 49 enable-active-high; 50 }; 51 52 reg_camera: regulator-camera { 53 compatible = "regulator-fixed"; 54 regulator-name = "mipi_pwr"; 55 regulator-min-microvolt = <2800000>; 56 regulator-max-microvolt = <2800000>; 57 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>; 58 enable-active-high; 59 startup-delay-us = <100000>; 60 regulator-always-on; 61 }; 62 63 reg_usdhc2_vmmc: regulator-usdhc2 { 64 compatible = "regulator-fixed"; 65 regulator-name = "vsd_3v3"; 66 regulator-min-microvolt = <3300000>; 67 regulator-max-microvolt = <3300000>; 68 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 69 enable-active-high; 70 }; 71 72 reg_usb_otg_vbus: regulator-usb { 73 compatible = "regulator-fixed"; 74 pinctrl-names = "default"; 75 pinctrl-0 = <&pinctrl_reg_usb_otg>; 76 regulator-name = "usb_otg_vbus"; 77 regulator-min-microvolt = <5000000>; 78 regulator-max-microvolt = <5000000>; 79 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; 80 enable-active-high; 81 }; 82 83 sound-dmic { 84 compatible = "simple-audio-card"; 85 simple-audio-card,name = "dmic"; 86 simple-audio-card,format = "pdm"; 87 simple-audio-card,bitclock-master = <&dailink_master>; 88 simple-audio-card,frame-master = <&dailink_master>; 89 90 dailink_master: simple-audio-card,cpu { 91 sound-dai = <&micfil>; 92 }; 93 94 simple-audio-card,codec { 95 sound-dai = <&dmic_codec>; 96 }; 97 }; 98 99 sound-wm8962 { 100 compatible = "simple-audio-card"; 101 simple-audio-card,name = "wm8962"; 102 simple-audio-card,format = "i2s"; 103 simple-audio-card,widgets = "Headphone", "Headphones", 104 "Microphone", "Headset Mic", 105 "Speaker", "Speaker"; 106 simple-audio-card,routing = "Headphones", "HPOUTL", 107 "Headphones", "HPOUTR", 108 "Speaker", "SPKOUTL", 109 "Speaker", "SPKOUTR", 110 "Headset Mic", "MICBIAS", 111 "IN3R", "Headset Mic"; 112 113 simple-audio-card,cpu { 114 sound-dai = <&sai3>; 115 }; 116 117 simple-audio-card,codec { 118 sound-dai = <&wm8962>; 119 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>; 120 frame-master; 121 bitclock-master; 122 }; 123 }; 124}; 125 126&ecspi2 { 127 pinctrl-names = "default"; 128 pinctrl-0 = <&pinctrl_espi2>; 129 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 130 status = "okay"; 131 132 eeprom@0 { 133 compatible = "microchip,at25160bn", "atmel,at25"; 134 reg = <0>; 135 spi-max-frequency = <5000000>; 136 spi-cpha; 137 spi-cpol; 138 pagesize = <32>; 139 size = <2048>; 140 address-width = <16>; 141 }; 142}; 143 144&i2c2 { 145 clock-frequency = <384000>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_i2c2>; 148 status = "okay"; 149 150 camera@10 { 151 compatible = "ovti,ov5640"; 152 pinctrl-names = "default"; 153 pinctrl-0 = <&pinctrl_ov5640>; 154 reg = <0x10>; 155 clocks = <&clk IMX8MN_CLK_CLKO1>; 156 clock-names = "xclk"; 157 assigned-clocks = <&clk IMX8MN_CLK_CLKO1>; 158 assigned-clock-parents = <&clk IMX8MN_CLK_24M>; 159 assigned-clock-rates = <24000000>; 160 AVDD-supply = <®_camera>; /* 2.8v */ 161 powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 162 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; 163 164 port { 165 /* MIPI CSI-2 bus endpoint */ 166 ov5640_to_mipi_csi2: endpoint { 167 remote-endpoint = <&mipi_csi_in>; 168 clock-lanes = <0>; 169 data-lanes = <1 2>; 170 }; 171 }; 172 }; 173}; 174&i2c4 { 175 clock-frequency = <400000>; 176 pinctrl-names = "default"; 177 pinctrl-0 = <&pinctrl_i2c4>; 178 status = "okay"; 179 180 pca6416_0: gpio@20 { 181 compatible = "nxp,pcal6416"; 182 reg = <0x20>; 183 pinctrl-names = "default"; 184 pinctrl-0 = <&pinctrl_pcal6414>; 185 gpio-controller; 186 #gpio-cells = <2>; 187 interrupt-parent = <&gpio4>; 188 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 189 }; 190 191 pca6416_1: gpio@21 { 192 compatible = "nxp,pcal6416"; 193 reg = <0x21>; 194 gpio-controller; 195 #gpio-cells = <2>; 196 interrupt-parent = <&gpio4>; 197 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 198 }; 199 200 wm8962: audio-codec@1a { 201 compatible = "wlf,wm8962"; 202 reg = <0x1a>; 203 clocks = <&clk IMX8MN_CLK_SAI3_ROOT>; 204 DCVDD-supply = <®_audio>; 205 DBVDD-supply = <®_audio>; 206 AVDD-supply = <®_audio>; 207 CPVDD-supply = <®_audio>; 208 MICVDD-supply = <®_audio>; 209 PLLVDD-supply = <®_audio>; 210 SPKVDD1-supply = <®_audio>; 211 SPKVDD2-supply = <®_audio>; 212 gpio-cfg = < 213 0x0000 /* 0:Default */ 214 0x0000 /* 1:Default */ 215 0x0000 /* 2:FN_DMICCLK */ 216 0x0000 /* 3:Default */ 217 0x0000 /* 4:FN_DMICCDAT */ 218 0x0000 /* 5:Default */ 219 >; 220 #sound-dai-cells = <0>; 221 }; 222}; 223 224&isi { 225 status = "okay"; 226}; 227 228&easrc { 229 fsl,asrc-rate = <48000>; 230 status = "okay"; 231}; 232 233&mipi_csi { 234 status = "okay"; 235 236 ports { 237 port@0 { 238 mipi_csi_in: endpoint { 239 remote-endpoint = <&ov5640_to_mipi_csi2>; 240 data-lanes = <1 2>; 241 }; 242 }; 243 }; 244}; 245 246&micfil { 247 pinctrl-names = "default"; 248 pinctrl-0 = <&pinctrl_pdm>; 249 assigned-clocks = <&clk IMX8MN_CLK_PDM>; 250 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; 251 assigned-clock-rates = <49152000>; 252 status = "okay"; 253}; 254 255&sai3 { 256 pinctrl-names = "default"; 257 pinctrl-0 = <&pinctrl_sai3>; 258 assigned-clocks = <&clk IMX8MN_CLK_SAI3>; 259 assigned-clock-parents = <&clk IMX8MN_AUDIO_PLL1_OUT>; 260 assigned-clock-rates = <24576000>; 261 fsl,sai-mclk-direction-output; 262 status = "okay"; 263}; 264 265&snvs_pwrkey { 266 status = "okay"; 267}; 268 269&uart2 { /* console */ 270 pinctrl-names = "default"; 271 pinctrl-0 = <&pinctrl_uart2>; 272 status = "okay"; 273}; 274 275&uart3 { 276 pinctrl-names = "default"; 277 pinctrl-0 = <&pinctrl_uart3>; 278 assigned-clocks = <&clk IMX8MN_CLK_UART3>; 279 assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; 280 uart-has-rtscts; 281 status = "okay"; 282}; 283 284&usbotg1 { 285 vbus-supply = <®_usb_otg_vbus>; 286 disable-over-current; 287 dr_mode = "otg"; 288 status = "okay"; 289}; 290 291&usdhc2 { 292 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 293 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 294 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 295 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 296 bus-width = <4>; 297 vmmc-supply = <®_usdhc2_vmmc>; 298 status = "okay"; 299}; 300 301&iomuxc { 302 pinctrl_espi2: espi2grp { 303 fsl,pins = < 304 MX8MN_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 305 MX8MN_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 306 MX8MN_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 307 MX8MN_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x41 308 >; 309 }; 310 311 pinctrl_i2c2: i2c2grp { 312 fsl,pins = < 313 MX8MN_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 314 MX8MN_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 315 >; 316 }; 317 318 pinctrl_i2c4: i2c4grp { 319 fsl,pins = < 320 MX8MN_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 321 MX8MN_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 322 >; 323 }; 324 325 pinctrl_led3: led3grp { 326 fsl,pins = < 327 MX8MN_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41 328 >; 329 }; 330 331 pinctrl_ov5640: ov5640grp { 332 fsl,pins = < 333 MX8MN_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 334 MX8MN_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 335 MX8MN_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59 336 >; 337 }; 338 339 pinctrl_pcal6414: pcal6414-gpiogrp { 340 fsl,pins = < 341 MX8MN_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 342 >; 343 }; 344 345 pinctrl_pdm: pdmgrp { 346 fsl,pins = < 347 MX8MN_IOMUXC_SAI5_RXC_PDM_CLK 0xd6 348 MX8MN_IOMUXC_SAI5_RXD0_PDM_BIT_STREAM0 0xd6 349 >; 350 }; 351 352 pinctrl_reg_usb_otg: reg-otggrp { 353 fsl,pins = < 354 MX8MN_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 355 >; 356 }; 357 358 pinctrl_sai3: sai3grp { 359 fsl,pins = < 360 MX8MN_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 361 MX8MN_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 362 MX8MN_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 363 MX8MN_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 364 MX8MN_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 365 >; 366 }; 367 368 pinctrl_uart2: uart2grp { 369 fsl,pins = < 370 MX8MN_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 371 MX8MN_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 372 >; 373 }; 374 375 pinctrl_uart3: uart3grp { 376 fsl,pins = < 377 MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 378 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 379 MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B 0x40 380 MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40 381 >; 382 }; 383 384 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 385 fsl,pins = < 386 MX8MN_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41 387 MX8MN_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 388 >; 389 }; 390 391 pinctrl_usdhc2: usdhc2grp { 392 fsl,pins = < 393 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 394 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 395 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 396 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 397 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 398 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 399 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 400 >; 401 }; 402 403 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 404 fsl,pins = < 405 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 406 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 407 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 408 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 409 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 410 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 411 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 412 >; 413 }; 414 415 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 416 fsl,pins = < 417 MX8MN_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 418 MX8MN_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 419 MX8MN_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 420 MX8MN_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 421 MX8MN_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 422 MX8MN_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 423 MX8MN_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 424 >; 425 }; 426}; 427