xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/imx8mm-venice-gw72xx-0x-rs232-rts.dts (revision e6bfd18d21b225af6a0ed67ceeaf1293b7b9eba5)
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Copyright 2022 Gateworks Corporation
4 *
5 * GW72xx RS232 with RTS/CTS hardware flow control:
6 *  - GPIO4_0 rs485_en needs to be driven low (in-active)
7 *  - UART4_TX becomes RTS
8 *  - UART4_RX becomes CTS
9 */
10
11#include <dt-bindings/gpio/gpio.h>
12
13#include "imx8mm-pinfunc.h"
14
15/dts-v1/;
16/plugin/;
17
18&{/} {
19	compatible = "gw,imx8mm-gw72xx-0x";
20};
21
22&gpio4 {
23	rs485_en {
24		gpio-hog;
25		gpios = <0 GPIO_ACTIVE_HIGH>;
26		output-low;
27		line-name = "rs485_en";
28	};
29};
30
31&uart2 {
32	pinctrl-names = "default";
33	pinctrl-0 = <&pinctrl_uart2>;
34	rts-gpios = <&gpio5 29 GPIO_ACTIVE_LOW>;
35	cts-gpios = <&gpio5 28 GPIO_ACTIVE_LOW>;
36	uart-has-rtscts;
37	status = "okay";
38};
39
40&uart4 {
41	status = "disabled";
42};
43
44&iomuxc {
45	pinctrl_uart2: uart2grp {
46		fsl,pins = <
47			MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX     0x140
48			MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX     0x140
49			MX8MM_IOMUXC_UART4_TXD_GPIO5_IO29	0x140
50			MX8MM_IOMUXC_UART4_RXD_GPIO5_IO28	0x140
51		>;
52	};
53};
54