1*8d13bc63SEmmanuel Vadot// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2*8d13bc63SEmmanuel Vadot 3*8d13bc63SEmmanuel Vadot&gpu_2d { 4*8d13bc63SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_GPU2D_CORE>, 5*8d13bc63SEmmanuel Vadot <&clk IMX8MM_GPU_PLL_OUT>; 6*8d13bc63SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>; 7*8d13bc63SEmmanuel Vadot assigned-clock-rates = <0>, <1000000000>; 8*8d13bc63SEmmanuel Vadot}; 9*8d13bc63SEmmanuel Vadot 10*8d13bc63SEmmanuel Vadot&gpu_3d { 11*8d13bc63SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_GPU3D_CORE>, 12*8d13bc63SEmmanuel Vadot <&clk IMX8MM_GPU_PLL_OUT>; 13*8d13bc63SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_GPU_PLL_OUT>; 14*8d13bc63SEmmanuel Vadot assigned-clock-rates = <0>, <1000000000>; 15*8d13bc63SEmmanuel Vadot}; 16*8d13bc63SEmmanuel Vadot 17*8d13bc63SEmmanuel Vadot&vpu_blk_ctrl { 18*8d13bc63SEmmanuel Vadot assigned-clocks = <&clk IMX8MM_CLK_VPU_G1>, 19*8d13bc63SEmmanuel Vadot <&clk IMX8MM_CLK_VPU_G2>, 20*8d13bc63SEmmanuel Vadot <&clk IMX8MM_CLK_VPU_H1>, 21*8d13bc63SEmmanuel Vadot <&clk IMX8MM_VPU_PLL_OUT>; 22*8d13bc63SEmmanuel Vadot assigned-clock-parents = <&clk IMX8MM_SYS_PLL3_OUT>, 23*8d13bc63SEmmanuel Vadot <&clk IMX8MM_VPU_PLL_OUT>, 24*8d13bc63SEmmanuel Vadot <&clk IMX8MM_SYS_PLL3_OUT>; 25*8d13bc63SEmmanuel Vadot assigned-clock-rates = <750000000>, 26*8d13bc63SEmmanuel Vadot <700000000>, 27*8d13bc63SEmmanuel Vadot <750000000>, 28*8d13bc63SEmmanuel Vadot <700000000>; 29*8d13bc63SEmmanuel Vadot}; 30