1// SPDX-License-Identifier: GPL-2.0+ OR MIT 2/* 3 * Copyright (C) 2019 Kontron Electronics GmbH 4 */ 5 6/dts-v1/; 7 8#include "imx8mm-kontron-n801x-som.dtsi" 9 10/ { 11 model = "Kontron i.MX8MM N801X S"; 12 compatible = "kontron,imx8mm-n801x-s", "kontron,imx8mm-n801x-som", "fsl,imx8mm"; 13 14 aliases { 15 ethernet1 = &usbnet; 16 }; 17 18 /* fixed crystal dedicated to mcp2515 */ 19 osc_can: clock-osc-can { 20 compatible = "fixed-clock"; 21 #clock-cells = <0>; 22 clock-frequency = <16000000>; 23 clock-output-names = "osc-can"; 24 }; 25 26 leds { 27 compatible = "gpio-leds"; 28 pinctrl-names = "default"; 29 pinctrl-0 = <&pinctrl_gpio_led>; 30 31 led1 { 32 label = "led1"; 33 gpios = <&gpio4 17 GPIO_ACTIVE_LOW>; 34 linux,default-trigger = "heartbeat"; 35 }; 36 37 led2 { 38 label = "led2"; 39 gpios = <&gpio4 19 GPIO_ACTIVE_LOW>; 40 }; 41 42 led3 { 43 label = "led3"; 44 gpios = <&gpio4 18 GPIO_ACTIVE_LOW>; 45 }; 46 47 led4 { 48 label = "led4"; 49 gpios = <&gpio4 8 GPIO_ACTIVE_LOW>; 50 }; 51 52 led5 { 53 label = "led5"; 54 gpios = <&gpio4 9 GPIO_ACTIVE_LOW>; 55 }; 56 57 led6 { 58 label = "led6"; 59 gpios = <&gpio4 7 GPIO_ACTIVE_LOW>; 60 }; 61 }; 62 63 pwm-beeper { 64 compatible = "pwm-beeper"; 65 pwms = <&pwm2 0 5000 0>; 66 }; 67 68 reg_rst_eth2: regulator-rst-eth2 { 69 compatible = "regulator-fixed"; 70 regulator-name = "rst-usb-eth2"; 71 pinctrl-names = "default"; 72 pinctrl-0 = <&pinctrl_usb_eth2>; 73 gpio = <&gpio3 2 GPIO_ACTIVE_LOW>; 74 }; 75 76 reg_vdd_5v: regulator-5v { 77 compatible = "regulator-fixed"; 78 regulator-name = "vdd-5v"; 79 regulator-min-microvolt = <5000000>; 80 regulator-max-microvolt = <5000000>; 81 }; 82}; 83 84&ecspi2 { 85 pinctrl-names = "default"; 86 pinctrl-0 = <&pinctrl_ecspi2>; 87 cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>; 88 status = "okay"; 89 90 can0: can@0 { 91 compatible = "microchip,mcp2515"; 92 reg = <0>; 93 pinctrl-names = "default"; 94 pinctrl-0 = <&pinctrl_can>; 95 clocks = <&osc_can>; 96 interrupt-parent = <&gpio4>; 97 interrupts = <28 IRQ_TYPE_EDGE_FALLING>; 98 spi-max-frequency = <100000>; 99 vdd-supply = <®_vdd_3v3>; 100 xceiver-supply = <®_vdd_5v>; 101 }; 102}; 103 104&ecspi3 { 105 pinctrl-names = "default"; 106 pinctrl-0 = <&pinctrl_ecspi3>; 107 cs-gpios = <&gpio5 25 GPIO_ACTIVE_LOW>; 108 status = "okay"; 109}; 110 111&fec1 { 112 pinctrl-names = "default"; 113 pinctrl-0 = <&pinctrl_enet>; 114 phy-connection-type = "rgmii"; 115 phy-handle = <ðphy>; 116 status = "okay"; 117 118 mdio { 119 #address-cells = <1>; 120 #size-cells = <0>; 121 122 ethphy: ethernet-phy@0 { 123 reg = <0>; 124 reset-assert-us = <100>; 125 reset-deassert-us = <100>; 126 reset-gpios = <&gpio4 27 GPIO_ACTIVE_LOW>; 127 }; 128 }; 129}; 130 131&i2c4 { 132 clock-frequency = <100000>; 133 pinctrl-names = "default"; 134 pinctrl-0 = <&pinctrl_i2c4>; 135 status = "okay"; 136 137 rtc@32 { 138 compatible = "epson,rx8900"; 139 reg = <0x32>; 140 }; 141}; 142 143&pwm2 { 144 pinctrl-names = "default"; 145 pinctrl-0 = <&pinctrl_pwm2>; 146 status = "okay"; 147}; 148 149&uart1 { 150 pinctrl-names = "default"; 151 pinctrl-0 = <&pinctrl_uart1>; 152 uart-has-rtscts; 153 status = "okay"; 154}; 155 156&uart2 { 157 pinctrl-names = "default"; 158 pinctrl-0 = <&pinctrl_uart2>; 159 linux,rs485-enabled-at-boot-time; 160 uart-has-rtscts; 161 status = "okay"; 162}; 163 164&usbotg1 { 165 dr_mode = "otg"; 166 over-current-active-low; 167 status = "okay"; 168}; 169 170&usbotg2 { 171 dr_mode = "host"; 172 disable-over-current; 173 #address-cells = <1>; 174 #size-cells = <0>; 175 status = "okay"; 176 177 usb1@1 { 178 compatible = "usb424,9514"; 179 reg = <1>; 180 #address-cells = <1>; 181 #size-cells = <0>; 182 183 usbnet: usbether@1 { 184 compatible = "usb424,ec00"; 185 reg = <1>; 186 local-mac-address = [ 00 00 00 00 00 00 ]; 187 }; 188 }; 189}; 190 191&usdhc2 { 192 pinctrl-names = "default"; 193 pinctrl-0 = <&pinctrl_usdhc2>; 194 vmmc-supply = <®_vdd_3v3>; 195 vqmmc-supply = <®_nvcc_sd>; 196 cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>; 197 status = "okay"; 198}; 199 200&iomuxc { 201 pinctrl-names = "default"; 202 pinctrl-0 = <&pinctrl_gpio>; 203 204 pinctrl_can: cangrp { 205 fsl,pins = < 206 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x19 207 >; 208 }; 209 210 pinctrl_ecspi2: ecspi2grp { 211 fsl,pins = < 212 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 213 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 214 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 215 MX8MM_IOMUXC_ECSPI2_SS0_GPIO5_IO13 0x19 216 >; 217 }; 218 219 pinctrl_ecspi3: ecspi3grp { 220 fsl,pins = < 221 MX8MM_IOMUXC_UART2_RXD_ECSPI3_MISO 0x82 222 MX8MM_IOMUXC_UART1_TXD_ECSPI3_MOSI 0x82 223 MX8MM_IOMUXC_UART1_RXD_ECSPI3_SCLK 0x82 224 MX8MM_IOMUXC_UART2_TXD_GPIO5_IO25 0x19 225 >; 226 }; 227 228 pinctrl_enet: enetgrp { 229 fsl,pins = < 230 MX8MM_IOMUXC_ENET_MDC_ENET1_MDC 0x3 231 MX8MM_IOMUXC_ENET_MDIO_ENET1_MDIO 0x3 232 MX8MM_IOMUXC_ENET_TD3_ENET1_RGMII_TD3 0x1f 233 MX8MM_IOMUXC_ENET_TD2_ENET1_RGMII_TD2 0x1f 234 MX8MM_IOMUXC_ENET_TD1_ENET1_RGMII_TD1 0x1f 235 MX8MM_IOMUXC_ENET_TD0_ENET1_RGMII_TD0 0x1f 236 MX8MM_IOMUXC_ENET_RD3_ENET1_RGMII_RD3 0x91 237 MX8MM_IOMUXC_ENET_RD2_ENET1_RGMII_RD2 0x91 238 MX8MM_IOMUXC_ENET_RD1_ENET1_RGMII_RD1 0x91 239 MX8MM_IOMUXC_ENET_RD0_ENET1_RGMII_RD0 0x91 240 MX8MM_IOMUXC_ENET_TXC_ENET1_RGMII_TXC 0x1f 241 MX8MM_IOMUXC_ENET_RXC_ENET1_RGMII_RXC 0x91 242 MX8MM_IOMUXC_ENET_RX_CTL_ENET1_RGMII_RX_CTL 0x91 243 MX8MM_IOMUXC_ENET_TX_CTL_ENET1_RGMII_TX_CTL 0x1f 244 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 /* PHY RST */ 245 MX8MM_IOMUXC_SAI2_TXC_GPIO4_IO25 0x19 /* ETH IRQ */ 246 >; 247 }; 248 249 pinctrl_gpio_led: gpioledgrp { 250 fsl,pins = < 251 MX8MM_IOMUXC_NAND_READY_B_GPIO3_IO16 0x19 252 MX8MM_IOMUXC_SAI1_RXD5_GPIO4_IO7 0x19 253 MX8MM_IOMUXC_SAI1_RXD6_GPIO4_IO8 0x19 254 MX8MM_IOMUXC_SAI1_RXD7_GPIO4_IO9 0x19 255 MX8MM_IOMUXC_SAI1_TXD5_GPIO4_IO17 0x19 256 MX8MM_IOMUXC_SAI1_TXD6_GPIO4_IO18 0x19 257 MX8MM_IOMUXC_SAI1_TXD7_GPIO4_IO19 0x19 258 >; 259 }; 260 261 pinctrl_gpio: gpiogrp { 262 fsl,pins = < 263 MX8MM_IOMUXC_GPIO1_IO03_GPIO1_IO3 0x19 264 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 265 MX8MM_IOMUXC_GPIO1_IO09_GPIO1_IO9 0x19 266 MX8MM_IOMUXC_GPIO1_IO11_GPIO1_IO11 0x19 267 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 268 MX8MM_IOMUXC_GPIO1_IO08_GPIO1_IO8 0x19 269 MX8MM_IOMUXC_GPIO1_IO10_GPIO1_IO10 0x19 270 MX8MM_IOMUXC_SAI3_MCLK_GPIO5_IO2 0x19 271 >; 272 }; 273 274 pinctrl_i2c4: i2c4grp { 275 fsl,pins = < 276 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 277 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 278 >; 279 }; 280 281 pinctrl_pwm2: pwm2grp { 282 fsl,pins = < 283 MX8MM_IOMUXC_SPDIF_RX_PWM2_OUT 0x19 284 >; 285 }; 286 287 pinctrl_uart1: uart1grp { 288 fsl,pins = < 289 MX8MM_IOMUXC_SAI2_RXC_UART1_DCE_RX 0x140 290 MX8MM_IOMUXC_SAI2_RXFS_UART1_DCE_TX 0x140 291 MX8MM_IOMUXC_SAI2_RXD0_UART1_DCE_RTS_B 0x140 292 MX8MM_IOMUXC_SAI2_TXFS_UART1_DCE_CTS_B 0x140 293 >; 294 }; 295 296 pinctrl_uart2: uart2grp { 297 fsl,pins = < 298 MX8MM_IOMUXC_SAI3_TXFS_UART2_DCE_RX 0x140 299 MX8MM_IOMUXC_SAI3_TXC_UART2_DCE_TX 0x140 300 MX8MM_IOMUXC_SAI3_RXD_UART2_DCE_RTS_B 0x140 301 MX8MM_IOMUXC_SAI3_RXC_UART2_DCE_CTS_B 0x140 302 >; 303 }; 304 305 pinctrl_usb_eth2: usbeth2grp { 306 fsl,pins = < 307 MX8MM_IOMUXC_NAND_CE1_B_GPIO3_IO2 0x19 308 >; 309 }; 310 311 pinctrl_usdhc2: usdhc2grp { 312 fsl,pins = < 313 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 314 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 315 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 316 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 317 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 318 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 319 MX8MM_IOMUXC_SD2_CD_B_GPIO2_IO12 0x019 320 >; 321 }; 322}; 323