1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2/* 3 * Copyright 2020 Compass Electronics Group, LLC 4 */ 5 6/ { 7 leds { 8 compatible = "gpio-leds"; 9 10 led0 { 11 label = "gen_led0"; 12 gpios = <&pca6416_1 4 GPIO_ACTIVE_HIGH>; 13 default-state = "off"; 14 }; 15 16 led1 { 17 label = "gen_led1"; 18 gpios = <&pca6416_1 5 GPIO_ACTIVE_HIGH>; 19 default-state = "off"; 20 }; 21 22 led2 { 23 label = "gen_led2"; 24 gpios = <&pca6416_1 6 GPIO_ACTIVE_HIGH>; 25 default-state = "off"; 26 }; 27 28 led3 { 29 pinctrl-names = "default"; 30 pinctrl-0 = <&pinctrl_led3>; 31 label = "heartbeat"; 32 gpios = <&gpio4 28 GPIO_ACTIVE_HIGH>; 33 linux,default-trigger = "heartbeat"; 34 }; 35 }; 36 37 reg_audio: regulator-audio { 38 compatible = "regulator-fixed"; 39 regulator-name = "3v3_aud"; 40 regulator-min-microvolt = <3300000>; 41 regulator-max-microvolt = <3300000>; 42 gpio = <&pca6416_1 11 GPIO_ACTIVE_HIGH>; 43 enable-active-high; 44 }; 45 46 reg_usbotg1: regulator-usbotg1 { 47 compatible = "regulator-fixed"; 48 pinctrl-names = "default"; 49 pinctrl-0 = <&pinctrl_reg_usb_otg1>; 50 regulator-name = "usb_otg_vbus"; 51 regulator-min-microvolt = <5000000>; 52 regulator-max-microvolt = <5000000>; 53 gpio = <&gpio4 29 GPIO_ACTIVE_HIGH>; 54 enable-active-high; 55 }; 56 57 reg_camera: regulator-camera { 58 compatible = "regulator-fixed"; 59 regulator-name = "mipi_pwr"; 60 regulator-min-microvolt = <2800000>; 61 regulator-max-microvolt = <2800000>; 62 gpio = <&pca6416_1 0 GPIO_ACTIVE_HIGH>; 63 enable-active-high; 64 startup-delay-us = <100000>; 65 }; 66 67 reg_usdhc2_vmmc: regulator-usdhc2 { 68 compatible = "regulator-fixed"; 69 regulator-name = "VSD_3V3"; 70 regulator-min-microvolt = <3300000>; 71 regulator-max-microvolt = <3300000>; 72 gpio = <&gpio2 19 GPIO_ACTIVE_HIGH>; 73 enable-active-high; 74 }; 75 76 sound { 77 compatible = "fsl,imx-audio-wm8962"; 78 model = "wm8962-audio"; 79 audio-cpu = <&sai3>; 80 audio-codec = <&wm8962>; 81 audio-routing = 82 "Headphone Jack", "HPOUTL", 83 "Headphone Jack", "HPOUTR", 84 "Ext Spk", "SPKOUTL", 85 "Ext Spk", "SPKOUTR", 86 "AMIC", "MICBIAS", 87 "IN3R", "AMIC"; 88 }; 89}; 90 91&csi { 92 status = "okay"; 93}; 94 95&ecspi2 { 96 pinctrl-names = "default"; 97 pinctrl-0 = <&pinctrl_espi2>; 98 cs-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>; 99 status = "okay"; 100 101 eeprom@0 { 102 compatible = "microchip,at25160bn", "atmel,at25"; 103 reg = <0>; 104 spi-max-frequency = <5000000>; 105 spi-cpha; 106 spi-cpol; 107 pagesize = <32>; 108 size = <2048>; 109 address-width = <16>; 110 }; 111}; 112 113&i2c2 { 114 clock-frequency = <400000>; 115 pinctrl-names = "default"; 116 pinctrl-0 = <&pinctrl_i2c2>; 117 status = "okay"; 118 119 camera@3c { 120 compatible = "ovti,ov5640"; 121 pinctrl-names = "default"; 122 pinctrl-0 = <&pinctrl_ov5640>; 123 reg = <0x3c>; 124 clocks = <&clk IMX8MM_CLK_CLKO1>; 125 clock-names = "xclk"; 126 assigned-clocks = <&clk IMX8MM_CLK_CLKO1>; 127 assigned-clock-parents = <&clk IMX8MM_CLK_24M>; 128 assigned-clock-rates = <24000000>; 129 AVDD-supply = <®_camera>; /* 2.8v */ 130 powerdown-gpios = <&gpio1 7 GPIO_ACTIVE_HIGH>; 131 reset-gpios = <&gpio1 6 GPIO_ACTIVE_LOW>; 132 133 port { 134 /* MIPI CSI-2 bus endpoint */ 135 ov5640_to_mipi_csi2: endpoint { 136 remote-endpoint = <&imx8mm_mipi_csi_in>; 137 clock-lanes = <0>; 138 data-lanes = <1 2>; 139 }; 140 }; 141 }; 142}; 143 144&i2c4 { 145 clock-frequency = <400000>; 146 pinctrl-names = "default"; 147 pinctrl-0 = <&pinctrl_i2c4>; 148 status = "okay"; 149 150 wm8962: audio-codec@1a { 151 compatible = "wlf,wm8962"; 152 reg = <0x1a>; 153 clocks = <&clk IMX8MM_CLK_SAI3_ROOT>; 154 DCVDD-supply = <®_audio>; 155 DBVDD-supply = <®_audio>; 156 AVDD-supply = <®_audio>; 157 CPVDD-supply = <®_audio>; 158 MICVDD-supply = <®_audio>; 159 PLLVDD-supply = <®_audio>; 160 SPKVDD1-supply = <®_audio>; 161 SPKVDD2-supply = <®_audio>; 162 gpio-cfg = < 163 0x0000 /* 0:Default */ 164 0x0000 /* 1:Default */ 165 0x0000 /* 2:FN_DMICCLK */ 166 0x0000 /* 3:Default */ 167 0x0000 /* 4:FN_DMICCDAT */ 168 0x0000 /* 5:Default */ 169 >; 170 }; 171 172 pca6416_0: gpio@20 { 173 compatible = "nxp,pcal6416"; 174 reg = <0x20>; 175 pinctrl-names = "default"; 176 pinctrl-0 = <&pinctrl_pcal6414>; 177 gpio-controller; 178 #gpio-cells = <2>; 179 interrupt-parent = <&gpio4>; 180 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 181 }; 182 183 pca6416_1: gpio@21 { 184 compatible = "nxp,pcal6416"; 185 reg = <0x21>; 186 gpio-controller; 187 #gpio-cells = <2>; 188 interrupt-parent = <&gpio4>; 189 interrupts = <27 IRQ_TYPE_LEVEL_LOW>; 190 }; 191}; 192 193&mipi_csi { 194 status = "okay"; 195 ports { 196 port@0 { 197 imx8mm_mipi_csi_in: endpoint { 198 remote-endpoint = <&ov5640_to_mipi_csi2>; 199 data-lanes = <1 2>; 200 }; 201 }; 202 }; 203}; 204 205&sai3 { 206 pinctrl-names = "default"; 207 pinctrl-0 = <&pinctrl_sai3>; 208 assigned-clocks = <&clk IMX8MM_CLK_SAI3>; 209 assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; 210 assigned-clock-rates = <24576000>; 211 fsl,sai-mclk-direction-output; 212 status = "okay"; 213}; 214 215&snvs_pwrkey { 216 status = "okay"; 217}; 218 219&uart2 { /* console */ 220 pinctrl-names = "default"; 221 pinctrl-0 = <&pinctrl_uart2>; 222 status = "okay"; 223}; 224 225&uart3 { 226 pinctrl-names = "default"; 227 pinctrl-0 = <&pinctrl_uart3>; 228 assigned-clocks = <&clk IMX8MM_CLK_UART3>; 229 assigned-clock-parents = <&clk IMX8MM_SYS_PLL1_80M>; 230 status = "okay"; 231}; 232 233&usbotg1 { 234 vbus-supply = <®_usbotg1>; 235 disable-over-current; 236 dr_mode="otg"; 237 status = "okay"; 238}; 239 240&usbotg2 { 241 pinctrl-names = "default"; 242 disable-over-current; 243 dr_mode="host"; 244 status = "okay"; 245}; 246 247&usbphynop2 { 248 reset-gpios = <&pca6416_1 7 GPIO_ACTIVE_HIGH>; 249}; 250 251&usdhc2 { 252 pinctrl-names = "default", "state_100mhz", "state_200mhz"; 253 pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>; 254 pinctrl-1 = <&pinctrl_usdhc2_100mhz>; 255 pinctrl-2 = <&pinctrl_usdhc2_200mhz>; 256 bus-width = <4>; 257 vmmc-supply = <®_usdhc2_vmmc>; 258 status = "okay"; 259}; 260 261&iomuxc { 262 pinctrl_espi2: espi2grp { 263 fsl,pins = < 264 MX8MM_IOMUXC_ECSPI2_SCLK_ECSPI2_SCLK 0x82 265 MX8MM_IOMUXC_ECSPI2_MOSI_ECSPI2_MOSI 0x82 266 MX8MM_IOMUXC_ECSPI2_MISO_ECSPI2_MISO 0x82 267 MX8MM_IOMUXC_ECSPI1_SS0_GPIO5_IO9 0x41 268 >; 269 }; 270 271 pinctrl_i2c2: i2c2grp { 272 fsl,pins = < 273 MX8MM_IOMUXC_I2C2_SCL_I2C2_SCL 0x400001c3 274 MX8MM_IOMUXC_I2C2_SDA_I2C2_SDA 0x400001c3 275 >; 276 }; 277 278 pinctrl_i2c4: i2c4grp { 279 fsl,pins = < 280 MX8MM_IOMUXC_I2C4_SCL_I2C4_SCL 0x400001c3 281 MX8MM_IOMUXC_I2C4_SDA_I2C4_SDA 0x400001c3 282 >; 283 }; 284 285 pinctrl_led3: led3grp { 286 fsl,pins = < 287 MX8MM_IOMUXC_SAI3_RXFS_GPIO4_IO28 0x41 288 >; 289 }; 290 291 pinctrl_ov5640: ov5640grp { 292 fsl,pins = < 293 MX8MM_IOMUXC_GPIO1_IO07_GPIO1_IO7 0x19 294 MX8MM_IOMUXC_GPIO1_IO06_GPIO1_IO6 0x19 295 MX8MM_IOMUXC_GPIO1_IO14_CCMSRCGPCMIX_CLKO1 0x59 296 >; 297 }; 298 299 pinctrl_pcal6414: pcal6414-gpiogrp { 300 fsl,pins = < 301 MX8MM_IOMUXC_SAI2_MCLK_GPIO4_IO27 0x19 302 >; 303 }; 304 305 pinctrl_reg_usb_otg1: usbotg1grp { 306 fsl,pins = < 307 MX8MM_IOMUXC_SAI3_RXC_GPIO4_IO29 0x19 308 >; 309 }; 310 311 pinctrl_sai3: sai3grp { 312 fsl,pins = < 313 MX8MM_IOMUXC_SAI3_TXFS_SAI3_TX_SYNC 0xd6 314 MX8MM_IOMUXC_SAI3_TXC_SAI3_TX_BCLK 0xd6 315 MX8MM_IOMUXC_SAI3_MCLK_SAI3_MCLK 0xd6 316 MX8MM_IOMUXC_SAI3_TXD_SAI3_TX_DATA0 0xd6 317 MX8MM_IOMUXC_SAI3_RXD_SAI3_RX_DATA0 0xd6 318 >; 319 }; 320 321 pinctrl_uart2: uart2grp { 322 fsl,pins = < 323 MX8MM_IOMUXC_UART2_RXD_UART2_DCE_RX 0x140 324 MX8MM_IOMUXC_UART2_TXD_UART2_DCE_TX 0x140 325 >; 326 }; 327 328 pinctrl_uart3: uart3grp { 329 fsl,pins = < 330 MX8MM_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 331 MX8MM_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 332 >; 333 }; 334 335 pinctrl_usdhc2_gpio: usdhc2gpiogrp { 336 fsl,pins = < 337 MX8MM_IOMUXC_SD2_CD_B_USDHC2_CD_B 0x41 338 MX8MM_IOMUXC_SD2_RESET_B_GPIO2_IO19 0x41 339 >; 340 }; 341 342 pinctrl_usdhc2: usdhc2grp { 343 fsl,pins = < 344 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x190 345 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d0 346 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d0 347 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d0 348 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d0 349 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d0 350 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 351 >; 352 }; 353 354 pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp { 355 fsl,pins = < 356 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x194 357 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d4 358 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d4 359 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d4 360 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d4 361 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d4 362 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 363 >; 364 }; 365 366 pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp { 367 fsl,pins = < 368 MX8MM_IOMUXC_SD2_CLK_USDHC2_CLK 0x196 369 MX8MM_IOMUXC_SD2_CMD_USDHC2_CMD 0x1d6 370 MX8MM_IOMUXC_SD2_DATA0_USDHC2_DATA0 0x1d6 371 MX8MM_IOMUXC_SD2_DATA1_USDHC2_DATA1 0x1d6 372 MX8MM_IOMUXC_SD2_DATA2_USDHC2_DATA2 0x1d6 373 MX8MM_IOMUXC_SD2_DATA3_USDHC2_DATA3 0x1d6 374 MX8MM_IOMUXC_GPIO1_IO04_USDHC2_VSELECT 0x1d0 375 >; 376 }; 377}; 378