1// SPDX-License-Identifier: (GPL-2.0 OR MIT) 2// 3// Device Tree file for LX2160ARDB 4// 5// Copyright 2018-2020 NXP 6 7/dts-v1/; 8 9#include "fsl-lx2160a.dtsi" 10 11/ { 12 model = "NXP Layerscape LX2160ARDB"; 13 compatible = "fsl,lx2160a-rdb", "fsl,lx2160a"; 14 15 aliases { 16 crypto = &crypto; 17 mmc0 = &esdhc0; 18 mmc1 = &esdhc1; 19 serial0 = &uart0; 20 }; 21 22 chosen { 23 stdout-path = "serial0:115200n8"; 24 }; 25 26 sb_3v3: regulator-sb3v3 { 27 compatible = "regulator-fixed"; 28 regulator-name = "MC34717-3.3VSB"; 29 regulator-min-microvolt = <3300000>; 30 regulator-max-microvolt = <3300000>; 31 regulator-boot-on; 32 regulator-always-on; 33 }; 34}; 35 36&crypto { 37 status = "okay"; 38}; 39 40&dpmac3 { 41 phy-handle = <&aquantia_phy1>; 42 phy-connection-type = "usxgmii"; 43 managed = "in-band-status"; 44}; 45 46&dpmac4 { 47 phy-handle = <&aquantia_phy2>; 48 phy-connection-type = "usxgmii"; 49 managed = "in-band-status"; 50}; 51 52&dpmac17 { 53 phy-handle = <&rgmii_phy1>; 54 phy-connection-type = "rgmii-id"; 55}; 56 57&dpmac18 { 58 phy-handle = <&rgmii_phy2>; 59 phy-connection-type = "rgmii-id"; 60}; 61 62&emdio1 { 63 status = "okay"; 64 65 rgmii_phy1: ethernet-phy@1 { 66 /* AR8035 PHY */ 67 compatible = "ethernet-phy-id004d.d072"; 68 reg = <0x1>; 69 eee-broken-1000t; 70 }; 71 72 rgmii_phy2: ethernet-phy@2 { 73 /* AR8035 PHY */ 74 compatible = "ethernet-phy-id004d.d072"; 75 reg = <0x2>; 76 eee-broken-1000t; 77 }; 78 79 aquantia_phy1: ethernet-phy@4 { 80 /* AQR107 PHY */ 81 compatible = "ethernet-phy-ieee802.3-c45"; 82 reg = <0x4>; 83 }; 84 85 aquantia_phy2: ethernet-phy@5 { 86 /* AQR107 PHY */ 87 compatible = "ethernet-phy-ieee802.3-c45"; 88 reg = <0x5>; 89 }; 90}; 91 92&can0 { 93 status = "okay"; 94 95 can-transceiver { 96 max-bitrate = <5000000>; 97 }; 98}; 99 100&can1 { 101 status = "okay"; 102 103 can-transceiver { 104 max-bitrate = <5000000>; 105 }; 106}; 107 108&esdhc0 { 109 sd-uhs-sdr104; 110 sd-uhs-sdr50; 111 sd-uhs-sdr25; 112 sd-uhs-sdr12; 113 status = "okay"; 114}; 115 116&esdhc1 { 117 mmc-hs200-1_8v; 118 mmc-hs400-1_8v; 119 bus-width = <8>; 120 status = "okay"; 121}; 122 123&fspi { 124 status = "okay"; 125 126 mt35xu512aba0: flash@0 { 127 #address-cells = <1>; 128 #size-cells = <1>; 129 compatible = "jedec,spi-nor"; 130 m25p,fast-read; 131 spi-max-frequency = <50000000>; 132 reg = <0>; 133 spi-rx-bus-width = <8>; 134 spi-tx-bus-width = <8>; 135 }; 136 137 mt35xu512aba1: flash@1 { 138 #address-cells = <1>; 139 #size-cells = <1>; 140 compatible = "jedec,spi-nor"; 141 m25p,fast-read; 142 spi-max-frequency = <50000000>; 143 reg = <1>; 144 spi-rx-bus-width = <8>; 145 spi-tx-bus-width = <8>; 146 }; 147}; 148 149&i2c0 { 150 status = "okay"; 151 152 i2c-mux@77 { 153 compatible = "nxp,pca9547"; 154 reg = <0x77>; 155 #address-cells = <1>; 156 #size-cells = <0>; 157 158 i2c@2 { 159 #address-cells = <1>; 160 #size-cells = <0>; 161 reg = <0x2>; 162 163 power-monitor@40 { 164 compatible = "ti,ina220"; 165 reg = <0x40>; 166 shunt-resistor = <500>; 167 }; 168 }; 169 170 i2c@3 { 171 #address-cells = <1>; 172 #size-cells = <0>; 173 reg = <0x3>; 174 175 temperature-sensor@4c { 176 compatible = "nxp,sa56004"; 177 reg = <0x4c>; 178 vcc-supply = <&sb_3v3>; 179 }; 180 181 temperature-sensor@4d { 182 compatible = "nxp,sa56004"; 183 reg = <0x4d>; 184 vcc-supply = <&sb_3v3>; 185 }; 186 }; 187 }; 188}; 189 190&i2c4 { 191 status = "okay"; 192 193 rtc@51 { 194 compatible = "nxp,pcf2129"; 195 reg = <0x51>; 196 /* IRQ_RTC_B -> IRQ08, active low */ 197 interrupts-extended = <&extirq 8 IRQ_TYPE_LEVEL_LOW>; 198 }; 199}; 200 201&pcs_mdio3 { 202 status = "okay"; 203}; 204 205&pcs_mdio4 { 206 status = "okay"; 207}; 208 209&sata0 { 210 status = "okay"; 211}; 212 213&sata1 { 214 status = "okay"; 215}; 216 217&sata2 { 218 status = "okay"; 219}; 220 221&sata3 { 222 status = "okay"; 223}; 224 225&uart0 { 226 status = "okay"; 227}; 228 229&uart1 { 230 status = "okay"; 231}; 232 233&usb0 { 234 status = "okay"; 235}; 236 237&usb1 { 238 status = "okay"; 239}; 240