1// SPDX-License-Identifier: (GPL-2.0+ OR MIT) 2/* 3 * Device Tree file for NXP LS1028A RDB Board. 4 * 5 * Copyright 2018 NXP 6 * 7 * Harninder Rai <harninder.rai@nxp.com> 8 * 9 */ 10 11/dts-v1/; 12#include "fsl-ls1028a.dtsi" 13 14/ { 15 model = "LS1028A RDB Board"; 16 compatible = "fsl,ls1028a-rdb", "fsl,ls1028a"; 17 18 aliases { 19 crypto = &crypto; 20 serial0 = &duart0; 21 serial1 = &duart1; 22 mmc0 = &esdhc; 23 mmc1 = &esdhc1; 24 rtc1 = &ftm_alarm0; 25 }; 26 27 chosen { 28 stdout-path = "serial0:115200n8"; 29 }; 30 31 memory@80000000 { 32 device_type = "memory"; 33 reg = <0x0 0x80000000 0x1 0x0000000>; 34 }; 35 36 sys_mclk: clock-mclk { 37 compatible = "fixed-clock"; 38 #clock-cells = <0>; 39 clock-frequency = <25000000>; 40 }; 41 42 reg_1p8v: regulator-1p8v { 43 compatible = "regulator-fixed"; 44 regulator-name = "1P8V"; 45 regulator-min-microvolt = <1800000>; 46 regulator-max-microvolt = <1800000>; 47 regulator-always-on; 48 }; 49 50 sb_3v3: regulator-sb3v3 { 51 compatible = "regulator-fixed"; 52 regulator-name = "3v3_vbus"; 53 regulator-min-microvolt = <3300000>; 54 regulator-max-microvolt = <3300000>; 55 regulator-boot-on; 56 regulator-always-on; 57 }; 58 59 sound { 60 compatible = "simple-audio-card"; 61 simple-audio-card,format = "i2s"; 62 simple-audio-card,widgets = 63 "Microphone", "Microphone Jack", 64 "Headphone", "Headphone Jack", 65 "Speaker", "Speaker Ext", 66 "Line", "Line In Jack"; 67 simple-audio-card,routing = 68 "MIC_IN", "Microphone Jack", 69 "Microphone Jack", "Mic Bias", 70 "LINE_IN", "Line In Jack", 71 "Headphone Jack", "HP_OUT", 72 "Speaker Ext", "LINE_OUT"; 73 74 simple-audio-card,cpu { 75 sound-dai = <&sai4>; 76 frame-master; 77 bitclock-master; 78 }; 79 80 simple-audio-card,codec { 81 sound-dai = <&sgtl5000>; 82 frame-master; 83 bitclock-master; 84 system-clock-frequency = <25000000>; 85 }; 86 }; 87}; 88 89&can0 { 90 status = "okay"; 91 92 can-transceiver { 93 max-bitrate = <5000000>; 94 }; 95}; 96 97&can1 { 98 status = "okay"; 99 100 can-transceiver { 101 max-bitrate = <5000000>; 102 }; 103}; 104 105&esdhc { 106 sd-uhs-sdr104; 107 sd-uhs-sdr50; 108 sd-uhs-sdr25; 109 sd-uhs-sdr12; 110 status = "okay"; 111}; 112 113&esdhc1 { 114 mmc-hs200-1_8v; 115 mmc-hs400-1_8v; 116 bus-width = <8>; 117 status = "okay"; 118}; 119 120&fspi { 121 status = "okay"; 122 123 mt35xu02g0: flash@0 { 124 compatible = "jedec,spi-nor"; 125 #address-cells = <1>; 126 #size-cells = <1>; 127 spi-max-frequency = <50000000>; 128 /* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */ 129 spi-rx-bus-width = <8>; /* 8 SPI Rx lines */ 130 spi-tx-bus-width = <1>; /* 1 SPI Tx line */ 131 reg = <0>; 132 }; 133}; 134 135&i2c0 { 136 status = "okay"; 137 138 i2c-mux@77 { 139 compatible = "nxp,pca9847"; 140 reg = <0x77>; 141 #address-cells = <1>; 142 #size-cells = <0>; 143 144 i2c@1 { 145 #address-cells = <1>; 146 #size-cells = <0>; 147 reg = <0x1>; 148 149 sgtl5000: audio-codec@a { 150 #sound-dai-cells = <0>; 151 compatible = "fsl,sgtl5000"; 152 reg = <0xa>; 153 VDDA-supply = <®_1p8v>; 154 VDDIO-supply = <®_1p8v>; 155 clocks = <&sys_mclk>; 156 sclk-strength = <3>; 157 }; 158 }; 159 160 i2c@2 { 161 #address-cells = <1>; 162 #size-cells = <0>; 163 reg = <0x02>; 164 165 current-monitor@40 { 166 compatible = "ti,ina220"; 167 reg = <0x40>; 168 shunt-resistor = <500>; 169 }; 170 }; 171 172 i2c@3 { 173 #address-cells = <1>; 174 #size-cells = <0>; 175 reg = <0x3>; 176 177 temperature-sensor@4c { 178 compatible = "nxp,sa56004"; 179 reg = <0x4c>; 180 vcc-supply = <&sb_3v3>; 181 }; 182 183 rtc@51 { 184 compatible = "nxp,pcf2129"; 185 reg = <0x51>; 186 }; 187 }; 188 }; 189}; 190 191&duart0 { 192 status = "okay"; 193}; 194 195&duart1 { 196 status = "okay"; 197}; 198 199&enetc_mdio_pf3 { 200 /* VSC8514 QSGMII quad PHY */ 201 qsgmii_phy0: ethernet-phy@10 { 202 reg = <0x10>; 203 }; 204 205 qsgmii_phy1: ethernet-phy@11 { 206 reg = <0x11>; 207 }; 208 209 qsgmii_phy2: ethernet-phy@12 { 210 reg = <0x12>; 211 }; 212 213 qsgmii_phy3: ethernet-phy@13 { 214 reg = <0x13>; 215 }; 216}; 217 218&enetc_port0 { 219 phy-handle = <&sgmii_phy0>; 220 phy-connection-type = "sgmii"; 221 managed = "in-band-status"; 222 status = "okay"; 223 224 mdio { 225 #address-cells = <1>; 226 #size-cells = <0>; 227 sgmii_phy0: ethernet-phy@2 { 228 reg = <0x2>; 229 }; 230 }; 231}; 232 233&enetc_port2 { 234 status = "okay"; 235}; 236 237&mscc_felix { 238 status = "okay"; 239}; 240 241&mscc_felix_port0 { 242 label = "swp0"; 243 managed = "in-band-status"; 244 phy-handle = <&qsgmii_phy0>; 245 phy-mode = "qsgmii"; 246 status = "okay"; 247}; 248 249&mscc_felix_port1 { 250 label = "swp1"; 251 managed = "in-band-status"; 252 phy-handle = <&qsgmii_phy1>; 253 phy-mode = "qsgmii"; 254 status = "okay"; 255}; 256 257&mscc_felix_port2 { 258 label = "swp2"; 259 managed = "in-band-status"; 260 phy-handle = <&qsgmii_phy2>; 261 phy-mode = "qsgmii"; 262 status = "okay"; 263}; 264 265&mscc_felix_port3 { 266 label = "swp3"; 267 managed = "in-band-status"; 268 phy-handle = <&qsgmii_phy3>; 269 phy-mode = "qsgmii"; 270 status = "okay"; 271}; 272 273&mscc_felix_port4 { 274 ethernet = <&enetc_port2>; 275 status = "okay"; 276}; 277 278&sai4 { 279 status = "okay"; 280}; 281 282&sata { 283 status = "okay"; 284}; 285 286&usb1 { 287 dr_mode = "otg"; 288}; 289