xref: /freebsd/sys/contrib/device-tree/src/arm64/freescale/fsl-ls1028a-qds.dts (revision e67e85659c0de33e617e5fbf1028c6e8b49eee53) 
1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * Device Tree file for NXP LS1028A QDS Board.
4 *
5 * Copyright 2018 NXP
6 *
7 * Harninder Rai <harninder.rai@nxp.com>
8 *
9 */
10
11/dts-v1/;
12
13#include "fsl-ls1028a.dtsi"
14
15/ {
16	model = "LS1028A QDS Board";
17	compatible = "fsl,ls1028a-qds", "fsl,ls1028a";
18
19	aliases {
20		crypto = &crypto;
21		gpio0 = &gpio1;
22		gpio1 = &gpio2;
23		gpio2 = &gpio3;
24		serial0 = &duart0;
25		serial1 = &duart1;
26		mmc0 = &esdhc;
27		mmc1 = &esdhc1;
28		rtc1 = &ftm_alarm1;
29	};
30
31	chosen {
32		stdout-path = "serial0:115200n8";
33	};
34
35	memory@80000000 {
36		device_type = "memory";
37		reg = <0x0 0x80000000 0x1 0x00000000>;
38	};
39
40	sys_mclk: clock-mclk {
41		compatible = "fixed-clock";
42		#clock-cells = <0>;
43		clock-frequency = <25000000>;
44	};
45
46	reg_1p8v: regulator-1p8v {
47		compatible = "regulator-fixed";
48		regulator-name = "1P8V";
49		regulator-min-microvolt = <1800000>;
50		regulator-max-microvolt = <1800000>;
51		regulator-always-on;
52	};
53
54	sb_3v3: regulator-sb3v3 {
55		compatible = "regulator-fixed";
56		regulator-name = "3v3_vbus";
57		regulator-min-microvolt = <3300000>;
58		regulator-max-microvolt = <3300000>;
59		regulator-boot-on;
60		regulator-always-on;
61	};
62
63	sound {
64		compatible = "simple-audio-card";
65		simple-audio-card,format = "i2s";
66		simple-audio-card,widgets =
67			"Microphone", "Microphone Jack",
68			"Headphone", "Headphone Jack",
69			"Speaker", "Speaker Ext",
70			"Line", "Line In Jack";
71		simple-audio-card,routing =
72			"MIC_IN", "Microphone Jack",
73			"Microphone Jack", "Mic Bias",
74			"LINE_IN", "Line In Jack",
75			"Headphone Jack", "HP_OUT",
76			"Speaker Ext", "LINE_OUT";
77
78		simple-audio-card,cpu {
79			sound-dai = <&sai1>;
80			frame-master;
81			bitclock-master;
82		};
83
84		simple-audio-card,codec {
85			sound-dai = <&sgtl5000>;
86			frame-master;
87			bitclock-master;
88			system-clock-frequency = <25000000>;
89		};
90	};
91
92	mdio-mux {
93		compatible = "mdio-mux-multiplexer";
94		mux-controls = <&mux 0>;
95		mdio-parent-bus = <&enetc_mdio_pf3>;
96		#address-cells=<1>;
97		#size-cells = <0>;
98
99		/* on-board RGMII PHY */
100		mdio@0 {
101			#address-cells = <1>;
102			#size-cells = <0>;
103			reg = <0>;
104
105			qds_phy1: ethernet-phy@5 {
106				/* Atheros 8035 */
107				reg = <5>;
108			};
109		};
110	};
111};
112
113&can0 {
114	status = "okay";
115};
116
117&can1 {
118	status = "okay";
119};
120
121&dspi0 {
122	bus-num = <0>;
123	status = "okay";
124
125	flash@0 {
126		#address-cells = <1>;
127		#size-cells = <1>;
128		compatible = "jedec,spi-nor";
129		spi-cpol;
130		spi-cpha;
131		reg = <0>;
132		spi-max-frequency = <10000000>;
133	};
134
135	flash@1 {
136		#address-cells = <1>;
137		#size-cells = <1>;
138		compatible = "jedec,spi-nor";
139		spi-cpol;
140		spi-cpha;
141		reg = <1>;
142		spi-max-frequency = <10000000>;
143	};
144
145	flash@2 {
146		#address-cells = <1>;
147		#size-cells = <1>;
148		compatible = "jedec,spi-nor";
149		spi-cpol;
150		spi-cpha;
151		reg = <2>;
152		spi-max-frequency = <10000000>;
153	};
154};
155
156&dspi1 {
157	bus-num = <1>;
158	status = "okay";
159
160	flash@0 {
161		#address-cells = <1>;
162		#size-cells = <1>;
163		compatible = "jedec,spi-nor";
164		spi-cpol;
165		spi-cpha;
166		reg = <0>;
167		spi-max-frequency = <10000000>;
168	};
169
170	flash@1 {
171		#address-cells = <1>;
172		#size-cells = <1>;
173		compatible = "jedec,spi-nor";
174		spi-cpol;
175		spi-cpha;
176		reg = <1>;
177		spi-max-frequency = <10000000>;
178	};
179
180	flash@2 {
181		#address-cells = <1>;
182		#size-cells = <1>;
183		compatible = "jedec,spi-nor";
184		spi-cpol;
185		spi-cpha;
186		reg = <2>;
187		spi-max-frequency = <10000000>;
188	};
189};
190
191&dspi2 {
192	bus-num = <2>;
193	status = "okay";
194
195	flash@0 {
196		#address-cells = <1>;
197		#size-cells = <1>;
198		compatible = "jedec,spi-nor";
199		spi-cpol;
200		spi-cpha;
201		reg = <0>;
202		spi-max-frequency = <10000000>;
203	};
204};
205
206&duart0 {
207	status = "okay";
208};
209
210&duart1 {
211	status = "okay";
212};
213
214&enetc_port1 {
215	phy-handle = <&qds_phy1>;
216	phy-mode = "rgmii-id";
217	status = "okay";
218};
219
220&enetc_port2 {
221	status = "okay";
222};
223
224&esdhc {
225	status = "okay";
226};
227
228&esdhc1 {
229	status = "okay";
230};
231
232&fspi {
233	status = "okay";
234
235	mt35xu02g0: flash@0 {
236		compatible = "jedec,spi-nor";
237		#address-cells = <1>;
238		#size-cells = <1>;
239		spi-max-frequency = <50000000>;
240		/* The following setting enables 1-1-8 (CMD-ADDR-DATA) mode */
241		spi-rx-bus-width = <8>; /* 8 SPI Rx lines */
242		spi-tx-bus-width = <1>; /* 1 SPI Tx line */
243		reg = <0>;
244	};
245};
246
247&ftm_alarm1 {
248	status = "okay";
249};
250
251&i2c0 {
252	status = "okay";
253
254	i2c-mux@77 {
255		compatible = "nxp,pca9547";
256		reg = <0x77>;
257		#address-cells = <1>;
258		#size-cells = <0>;
259
260		i2c@2 {
261			#address-cells = <1>;
262			#size-cells = <0>;
263			reg = <0x2>;
264
265			current-monitor@40 {
266				compatible = "ti,ina220";
267				reg = <0x40>;
268				shunt-resistor = <1000>;
269			};
270
271			current-monitor@41 {
272				compatible = "ti,ina220";
273				reg = <0x41>;
274				shunt-resistor = <1000>;
275			};
276		};
277
278		i2c@3 {
279			#address-cells = <1>;
280			#size-cells = <0>;
281			reg = <0x3>;
282
283			temperature-sensor@4c {
284				compatible = "nxp,sa56004";
285				reg = <0x4c>;
286				vcc-supply = <&sb_3v3>;
287			};
288
289			eeprom@56 {
290				compatible = "atmel,24c512";
291				reg = <0x56>;
292			};
293
294			eeprom@57 {
295				compatible = "atmel,24c512";
296				reg = <0x57>;
297			};
298		};
299
300		i2c@5 {
301			#address-cells = <1>;
302			#size-cells = <0>;
303			reg = <0x5>;
304
305			sgtl5000: audio-codec@a {
306				#sound-dai-cells = <0>;
307				compatible = "fsl,sgtl5000";
308				reg = <0xa>;
309				VDDA-supply = <&reg_1p8v>;
310				VDDIO-supply = <&reg_1p8v>;
311				clocks = <&sys_mclk>;
312			};
313		};
314	};
315
316	fpga@66 {
317		compatible = "fsl,ls1028aqds-fpga", "fsl,fpga-qixis-i2c",
318			     "simple-mfd";
319		reg = <0x66>;
320
321		mux: mux-controller {
322			compatible = "reg-mux";
323			#mux-control-cells = <1>;
324			mux-reg-masks = <0x54 0xf0>; /* 0: reg 0x54, bits 7:4 */
325		};
326	};
327
328};
329
330&i2c1 {
331	status = "okay";
332
333	rtc@51 {
334		compatible = "nxp,pcf2129";
335		reg = <0x51>;
336	};
337};
338
339&lpuart0 {
340	status = "okay";
341};
342
343&lpuart1 {
344	status = "okay";
345};
346
347&mscc_felix_port4 {
348	ethernet = <&enetc_port2>;
349	status = "okay";
350};
351
352&sai1 {
353	status = "okay";
354};
355
356&sata {
357	status = "okay";
358};
359
360&usb0 {
361	status = "okay";
362};
363
364&usb1 {
365	status = "okay";
366};
367