1// SPDX-License-Identifier: GPL-2.0+ 2/* 3 * Device Tree file for the Kontron SMARC-sAL28 board on a SMARC Eval 2.0 4 * carrier (ADS2). 5 * 6 * Copyright (C) 2019 Michael Walle <michael@walle.cc> 7 * 8 */ 9 10/dts-v1/; 11#include "fsl-ls1028a-kontron-sl28.dts" 12 13/ { 14 model = "Kontron SMARC-sAL28 (Single PHY) on SMARC Eval 2.0 carrier"; 15 compatible = "kontron,sl28-var3-ads2", "kontron,sl28-var3", 16 "kontron,sl28", "fsl,ls1028a"; 17 18 sound { 19 #address-cells = <1>; 20 #size-cells = <0>; 21 compatible = "simple-audio-card"; 22 simple-audio-card,widgets = 23 "Headphone", "Headphone Jack", 24 "Line", "Line Out Jack", 25 "Microphone", "Microphone Jack", 26 "Line", "Line In Jack"; 27 simple-audio-card,routing = 28 "Line Out Jack", "LINEOUTR", 29 "Line Out Jack", "LINEOUTL", 30 "Headphone Jack", "HPOUTR", 31 "Headphone Jack", "HPOUTL", 32 "IN1L", "Line In Jack", 33 "IN1R", "Line In Jack", 34 "Microphone Jack", "MICBIAS", 35 "IN2L", "Microphone Jack", 36 "IN2R", "Microphone Jack"; 37 simple-audio-card,mclk-fs = <256>; 38 39 simple-audio-card,dai-link@0 { 40 reg = <0>; 41 bitclock-master = <&dailink0_master>; 42 frame-master = <&dailink0_master>; 43 format = "i2s"; 44 45 cpu { 46 sound-dai = <&sai6>; 47 }; 48 49 dailink0_master: codec { 50 sound-dai = <&wm8904>; 51 }; 52 }; 53 54 simple-audio-card,dai-link@1 { 55 reg = <1>; 56 bitclock-master = <&dailink1_master>; 57 frame-master = <&dailink1_master>; 58 format = "i2s"; 59 60 cpu { 61 sound-dai = <&sai5>; 62 }; 63 64 dailink1_master: codec { 65 sound-dai = <&wm8904>; 66 }; 67 }; 68 }; 69}; 70 71&dspi2 { 72 flash@0 { 73 compatible = "jedec,spi-nor"; 74 m25p,fast-read; 75 spi-max-frequency = <100000000>; 76 reg = <0>; 77 }; 78}; 79 80&i2c3 { 81 eeprom@57 { 82 compatible = "atmel,24c64"; 83 reg = <0x57>; 84 pagesize = <32>; 85 }; 86}; 87 88&i2c4 { 89 status = "okay"; 90 91 wm8904: audio-codec@1a { 92 #sound-dai-cells = <0>; 93 compatible = "wlf,wm8904"; 94 reg = <0x1a>; 95 clocks = <&mclk>; 96 clock-names = "mclk"; 97 assigned-clocks = <&mclk>; 98 assigned-clock-rates = <1250000>; 99 }; 100}; 101 102&sai5 { 103 status = "okay"; 104}; 105 106&sai6 { 107 status = "okay"; 108}; 109 110&soc { 111 mclk: clock-mclk@f130080 { 112 compatible = "fsl,vf610-sai-clock"; 113 reg = <0x0 0xf130080 0x0 0x80>; 114 clocks = <&clockgen 4 1>; 115 #clock-cells = <0>; 116 }; 117}; 118